xref: /llvm-project/llvm/test/CodeGen/X86/apx/long-instruction-fixup.ll (revision 37293e69e6362e3559c1a4e1ac62b53f2b0edb0a)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
3
4define i32 @add32mi_GS() {
5; CHECK-LABEL: add32mi_GS:
6; CHECK:       # %bb.0: # %entry
7; CHECK-NEXT:    movl %gs:255, %eax
8; CHECK-NEXT:    addl $123456, %eax # imm = 0x1E240
9; CHECK-NEXT:    retq
10entry:
11  %a= inttoptr i32 255 to ptr addrspace(256)
12  %t = load i32, ptr addrspace(256) %a
13  %add = add i32 %t, 123456
14  ret i32 %add
15}
16
17define i64 @add64mi_FS() {
18; CHECK-LABEL: add64mi_FS:
19; CHECK:       # %bb.0: # %entry
20; CHECK-NEXT:    movq %fs:255, %rax
21; CHECK-NEXT:    addq $123456, %rax # imm = 0x1E240
22; CHECK-NEXT:    retq
23entry:
24  %a= inttoptr i64 255 to ptr addrspace(257)
25  %t = load i64, ptr addrspace(257) %a
26  %add = add i64 %t, 123456
27  ret i64 %add
28}
29
30define i32 @sub32mi_GS() {
31; CHECK-LABEL: sub32mi_GS:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    movl %gs:255, %eax
34; CHECK-NEXT:    addl $129, %eax
35; CHECK-NEXT:    retq
36entry:
37  %a= inttoptr i32 255 to ptr addrspace(256)
38  %t = load i32, ptr addrspace(256) %a
39  %sub = sub i32 %t, -129
40  ret i32 %sub
41}
42
43define i64 @sub64mi_FS() {
44; CHECK-LABEL: sub64mi_FS:
45; CHECK:       # %bb.0: # %entry
46; CHECK-NEXT:    movq %fs:255, %rax
47; CHECK-NEXT:    subq $-2147483648, %rax # imm = 0x80000000
48; CHECK-NEXT:    retq
49entry:
50  %a= inttoptr i64 255 to ptr addrspace(257)
51  %t = load i64, ptr addrspace(257) %a
52  %sub = sub i64 %t, -2147483648
53  ret i64 %sub
54}
55
56define i32 @and32mi_GS() {
57; CHECK-LABEL: and32mi_GS:
58; CHECK:       # %bb.0: # %entry
59; CHECK-NEXT:    movl %gs:255, %eax
60; CHECK-NEXT:    andl $-129, %eax
61; CHECK-NEXT:    retq
62entry:
63  %a= inttoptr i32 255 to ptr addrspace(256)
64  %t = load i32, ptr addrspace(256) %a
65  %and = and i32 %t, -129
66  ret i32 %and
67}
68
69define i64 @and64mi_FS() {
70; CHECK-LABEL: and64mi_FS:
71; CHECK:       # %bb.0: # %entry
72; CHECK-NEXT:    movq %fs:255, %rax
73; CHECK-NEXT:    andq $-2147483648, %rax # imm = 0x80000000
74; CHECK-NEXT:    retq
75entry:
76  %a= inttoptr i64 255 to ptr addrspace(257)
77  %t = load i64, ptr addrspace(257) %a
78  %and = and i64 %t, -2147483648
79  ret i64 %and
80}
81
82define i32 @or32mi_GS() {
83; CHECK-LABEL: or32mi_GS:
84; CHECK:       # %bb.0: # %entry
85; CHECK-NEXT:    movl %gs:255, %eax
86; CHECK-NEXT:    orl $-129, %eax
87; CHECK-NEXT:    retq
88entry:
89  %a= inttoptr i32 255 to ptr addrspace(256)
90  %t = load i32, ptr addrspace(256) %a
91  %or = or i32 %t, -129
92  ret i32 %or
93}
94
95define i64 @or64mi_FS() {
96; CHECK-LABEL: or64mi_FS:
97; CHECK:       # %bb.0: # %entry
98; CHECK-NEXT:    movq %fs:255, %rax
99; CHECK-NEXT:    orq $-2147483648, %rax # imm = 0x80000000
100; CHECK-NEXT:    retq
101entry:
102  %a= inttoptr i64 255 to ptr addrspace(257)
103  %t = load i64, ptr addrspace(257) %a
104  %or = or i64 %t, -2147483648
105  ret i64 %or
106}
107
108define i32 @xor32mi_GS() {
109; CHECK-LABEL: xor32mi_GS:
110; CHECK:       # %bb.0: # %entry
111; CHECK-NEXT:    movl %gs:255, %eax
112; CHECK-NEXT:    xorl $-129, %eax
113; CHECK-NEXT:    retq
114entry:
115  %a= inttoptr i32 255 to ptr addrspace(256)
116  %t = load i32, ptr addrspace(256) %a
117  %xor = xor i32 %t, -129
118  ret i32 %xor
119}
120
121define i64 @xor64mi_FS() {
122; CHECK-LABEL: xor64mi_FS:
123; CHECK:       # %bb.0: # %entry
124; CHECK-NEXT:    movq %fs:255, %rax
125; CHECK-NEXT:    xorq $-2147483648, %rax # imm = 0x80000000
126; CHECK-NEXT:    retq
127entry:
128  %a= inttoptr i64 255 to ptr addrspace(257)
129  %t = load i64, ptr addrspace(257) %a
130  %xor = xor i64 %t, -2147483648
131  ret i64 %xor
132}
133
134define i32 @adc32mi_GS(i32 %x, i32 %y) {
135; CHECK-LABEL: adc32mi_GS:
136; CHECK:       # %bb.0: # %entry
137; CHECK-NEXT:    cmpl %edi, %esi
138; CHECK-NEXT:    movl %gs:255, %eax
139; CHECK-NEXT:    adcl $123456, %eax # imm = 0x1E240
140; CHECK-NEXT:    retq
141entry:
142  %a = inttoptr i32 255 to ptr addrspace(256)
143  %t = load i32, ptr addrspace(256) %a
144  %s = add i32 %t, 123456
145  %k = icmp ugt i32 %x, %y
146  %z = zext i1 %k to i32
147  %r = add i32 %s, %z
148  ret i32 %r
149}
150
151define i64 @adc64mi_FS(i64 %x, i64 %y) {
152; CHECK-LABEL: adc64mi_FS:
153; CHECK:       # %bb.0: # %entry
154; CHECK-NEXT:    cmpq %rdi, %rsi
155; CHECK-NEXT:    movq %fs:255, %rax
156; CHECK-NEXT:    adcq $123456, %rax # imm = 0x1E240
157; CHECK-NEXT:    retq
158entry:
159  %a = inttoptr i64 255 to ptr addrspace(257)
160  %t = load i64, ptr addrspace(257) %a
161  %s = add i64 %t, 123456
162  %k = icmp ugt i64 %x, %y
163  %z = zext i1 %k to i64
164  %r = add i64 %s, %z
165  ret i64 %r
166}
167
168define i32 @sbb32mi_GS(i32 %x, i32 %y) {
169; CHECK-LABEL: sbb32mi_GS:
170; CHECK:       # %bb.0: # %entry
171; CHECK-NEXT:    cmpl %edi, %esi
172; CHECK-NEXT:    sbbl $0, %gs:255, %eax
173; CHECK-NEXT:    addl $-123456, %eax # imm = 0xFFFE1DC0
174; CHECK-NEXT:    retq
175entry:
176  %a= inttoptr i32 255 to ptr addrspace(256)
177  %t = load i32, ptr addrspace(256) %a
178  %s = sub i32 %t, 123456
179  %k = icmp ugt i32 %x, %y
180  %z = zext i1 %k to i32
181  %r = sub i32 %s, %z
182  ret i32 %r
183}
184
185define i64 @sbb64mi_FS(i64 %x, i64 %y) {
186; CHECK-LABEL: sbb64mi_FS:
187; CHECK:       # %bb.0: # %entry
188; CHECK-NEXT:    cmpq %rdi, %rsi
189; CHECK-NEXT:    sbbq $0, %fs:255, %rax
190; CHECK-NEXT:    addq $-123456, %rax # imm = 0xFFFE1DC0
191; CHECK-NEXT:    retq
192entry:
193  %a= inttoptr i64 255 to ptr addrspace(257)
194  %t = load i64, ptr addrspace(257) %a
195  %s = sub i64 %t, 123456
196  %k = icmp ugt i64 %x, %y
197  %z = zext i1 %k to i64
198  %r = sub i64 %s, %z
199  ret i64 %r
200}
201
202define i32 @add32mi8_GS() {
203; CHECK-LABEL: add32mi8_GS:
204; CHECK:       # %bb.0: # %entry
205; CHECK-NEXT:    addl $127, %gs:255, %eax
206; CHECK-NEXT:    retq
207entry:
208  %a= inttoptr i32 255 to ptr addrspace(256)
209  %t = load i32, ptr addrspace(256) %a
210  %add = add i32 %t, 127
211  ret i32 %add
212}
213
214define i32 @add32mi_GS_Disp0(ptr addrspace(256) %a, i32 %i) {
215; CHECK-LABEL: add32mi_GS_Disp0:
216; CHECK:       # %bb.0: # %entry
217; CHECK-NEXT:    movslq %esi, %rax
218; CHECK-NEXT:    addl $123456, %gs:(%rdi,%rax,4), %eax # imm = 0x1E240
219; CHECK-NEXT:    retq
220entry:
221  %arrayidx = getelementptr inbounds i32, ptr addrspace(256) %a, i32 %i
222  %t = load i32, ptr addrspace(256) %arrayidx
223  %add = add i32 %t, 123456
224  ret i32 %add
225}
226
227define i32 @add32mi_GS_Disp8(ptr addrspace(256) %a, i32 %i) {
228; CHECK-LABEL: add32mi_GS_Disp8:
229; CHECK:       # %bb.0: # %entry
230; CHECK-NEXT:    movslq %esi, %rax
231; CHECK-NEXT:    addl $123456, %gs:123(%rdi,%rax,4), %eax # imm = 0x1E240
232; CHECK-NEXT:    retq
233entry:
234  %arrayidx = getelementptr inbounds i32, ptr addrspace(256) %a, i32 %i
235  %add.ptr = getelementptr inbounds i8, ptr addrspace(256) %arrayidx, i32 123
236  %t = load i32, ptr addrspace(256) %add.ptr
237  %add = add i32 %t, 123456
238  ret i32 %add
239}
240
241define i32 @add32mi_GS_Disp32(ptr addrspace(256) %a, i32 %i) {
242; CHECK-LABEL: add32mi_GS_Disp32:
243; CHECK:       # %bb.0: # %entry
244; CHECK-NEXT:    movslq %esi, %rax
245; CHECK-NEXT:    movl %gs:1234(%rdi,%rax,4), %eax
246; CHECK-NEXT:    addl $123456, %eax # imm = 0x1E240
247; CHECK-NEXT:    retq
248entry:
249  %arrayidx = getelementptr inbounds i32, ptr addrspace(256) %a, i32 %i
250  %add.ptr = getelementptr inbounds i8, ptr addrspace(256) %arrayidx, i32 1234
251  %t = load i32, ptr addrspace(256) %add.ptr
252  %add = add i32 %t, 123456
253  ret i32 %add
254}
255