xref: /llvm-project/llvm/test/CodeGen/X86/apx/inc.ll (revision 20683de70e43fa73536ac1e8ce4082604048d040)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
4
5define i8 @inc8r(i8 noundef %a) {
6; CHECK-LABEL: inc8r:
7; CHECK:       # %bb.0: # %entry
8; CHECK-NEXT:    incb %dil, %al
9; CHECK-NEXT:    retq
10;
11; NF-LABEL: inc8r:
12; NF:       # %bb.0: # %entry
13; NF-NEXT:    {nf} incb %dil, %al
14; NF-NEXT:    retq
15entry:
16  %inc = add i8 %a, 1
17  ret i8 %inc
18}
19
20define i16 @inc16r(i16 noundef %a) {
21; CHECK-LABEL: inc16r:
22; CHECK:       # %bb.0: # %entry
23; CHECK-NEXT:    incw %di, %ax
24; CHECK-NEXT:    retq
25;
26; NF-LABEL: inc16r:
27; NF:       # %bb.0: # %entry
28; NF-NEXT:    {nf} incw %di, %ax
29; NF-NEXT:    retq
30entry:
31  %inc = add i16 %a, 1
32  ret i16 %inc
33}
34
35define i32 @inc32r(i32 noundef %a) {
36; CHECK-LABEL: inc32r:
37; CHECK:       # %bb.0: # %entry
38; CHECK-NEXT:    incl %edi, %eax
39; CHECK-NEXT:    retq
40;
41; NF-LABEL: inc32r:
42; NF:       # %bb.0: # %entry
43; NF-NEXT:    {nf} incl %edi, %eax
44; NF-NEXT:    retq
45entry:
46  %inc = add i32 %a, 1
47  ret i32 %inc
48}
49
50define i64 @inc64r(i64 noundef %a) {
51; CHECK-LABEL: inc64r:
52; CHECK:       # %bb.0: # %entry
53; CHECK-NEXT:    incq %rdi, %rax
54; CHECK-NEXT:    retq
55;
56; NF-LABEL: inc64r:
57; NF:       # %bb.0: # %entry
58; NF-NEXT:    {nf} incq %rdi, %rax
59; NF-NEXT:    retq
60entry:
61  %inc = add i64 %a, 1
62  ret i64 %inc
63}
64
65define i8 @inc8m(ptr %ptr) {
66; CHECK-LABEL: inc8m:
67; CHECK:       # %bb.0: # %entry
68; CHECK-NEXT:    incb (%rdi), %al
69; CHECK-NEXT:    retq
70;
71; NF-LABEL: inc8m:
72; NF:       # %bb.0: # %entry
73; NF-NEXT:    {nf} incb (%rdi), %al
74; NF-NEXT:    retq
75entry:
76  %a = load i8, ptr %ptr
77  %inc = add i8 %a, 1
78  ret i8 %inc
79}
80
81define i16 @inc16m(ptr %ptr) {
82; CHECK-LABEL: inc16m:
83; CHECK:       # %bb.0: # %entry
84; CHECK-NEXT:    incw (%rdi), %ax
85; CHECK-NEXT:    retq
86;
87; NF-LABEL: inc16m:
88; NF:       # %bb.0: # %entry
89; NF-NEXT:    {nf} incw (%rdi), %ax
90; NF-NEXT:    retq
91entry:
92  %a = load i16, ptr %ptr
93  %inc = add i16 %a, 1
94  ret i16 %inc
95}
96
97define i32 @inc32m(ptr %ptr) {
98; CHECK-LABEL: inc32m:
99; CHECK:       # %bb.0: # %entry
100; CHECK-NEXT:    incl (%rdi), %eax
101; CHECK-NEXT:    retq
102;
103; NF-LABEL: inc32m:
104; NF:       # %bb.0: # %entry
105; NF-NEXT:    {nf} incl (%rdi), %eax
106; NF-NEXT:    retq
107entry:
108  %a = load i32, ptr %ptr
109  %inc = add i32 %a, 1
110  ret i32 %inc
111}
112
113define i64 @inc64m(ptr %ptr) {
114; CHECK-LABEL: inc64m:
115; CHECK:       # %bb.0: # %entry
116; CHECK-NEXT:    incq (%rdi), %rax
117; CHECK-NEXT:    retq
118;
119; NF-LABEL: inc64m:
120; NF:       # %bb.0: # %entry
121; NF-NEXT:    {nf} incq (%rdi), %rax
122; NF-NEXT:    retq
123entry:
124  %a = load i64, ptr %ptr
125  %inc = add i64 %a, 1
126  ret i64 %inc
127}
128
129define i8 @uinc8r(i8 noundef %a) {
130; CHECK-LABEL: uinc8r:
131; CHECK:       # %bb.0: # %entry
132; CHECK-NEXT:    incb %dil, %al
133; CHECK-NEXT:    movzbl %al, %eax
134; CHECK-NEXT:    movl $255, %ecx
135; CHECK-NEXT:    cmovel %ecx, %eax
136; CHECK-NEXT:    # kill: def $al killed $al killed $eax
137; CHECK-NEXT:    retq
138;
139; NF-LABEL: uinc8r:
140; NF:       # %bb.0: # %entry
141; NF-NEXT:    incb %dil, %al
142; NF-NEXT:    movzbl %al, %eax
143; NF-NEXT:    movl $255, %ecx
144; NF-NEXT:    cmovel %ecx, %eax
145; NF-NEXT:    # kill: def $al killed $al killed $eax
146; NF-NEXT:    retq
147entry:
148  %inc = call i8 @llvm.uadd.sat.i8(i8 %a, i8 1)
149  ret i8 %inc
150}
151
152define i16 @uinc16r(i16 noundef %a) {
153; CHECK-LABEL: uinc16r:
154; CHECK:       # %bb.0: # %entry
155; CHECK-NEXT:    incw %di, %ax
156; CHECK-NEXT:    movl $65535, %ecx # imm = 0xFFFF
157; CHECK-NEXT:    cmovel %ecx, %eax
158; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
159; CHECK-NEXT:    retq
160;
161; NF-LABEL: uinc16r:
162; NF:       # %bb.0: # %entry
163; NF-NEXT:    incw %di, %ax
164; NF-NEXT:    movl $65535, %ecx # imm = 0xFFFF
165; NF-NEXT:    cmovel %ecx, %eax
166; NF-NEXT:    # kill: def $ax killed $ax killed $eax
167; NF-NEXT:    retq
168entry:
169  %inc = call i16 @llvm.uadd.sat.i16(i16 %a, i16 1)
170  ret i16 %inc
171}
172
173define i32 @uinc32r(i32 noundef %a) {
174; CHECK-LABEL: uinc32r:
175; CHECK:       # %bb.0: # %entry
176; CHECK-NEXT:    incl %edi, %eax
177; CHECK-NEXT:    movl $-1, %ecx
178; CHECK-NEXT:    cmovel %ecx, %eax
179; CHECK-NEXT:    retq
180;
181; NF-LABEL: uinc32r:
182; NF:       # %bb.0: # %entry
183; NF-NEXT:    incl %edi, %eax
184; NF-NEXT:    movl $-1, %ecx
185; NF-NEXT:    cmovel %ecx, %eax
186; NF-NEXT:    retq
187entry:
188  %inc = call i32 @llvm.uadd.sat.i32(i32 %a, i32 1)
189  ret i32 %inc
190}
191
192define i64 @uinc64r(i64 noundef %a) {
193; CHECK-LABEL: uinc64r:
194; CHECK:       # %bb.0: # %entry
195; CHECK-NEXT:    incq %rdi, %rax
196; CHECK-NEXT:    movq $-1, %rcx
197; CHECK-NEXT:    cmoveq %rcx, %rax
198; CHECK-NEXT:    retq
199;
200; NF-LABEL: uinc64r:
201; NF:       # %bb.0: # %entry
202; NF-NEXT:    incq %rdi, %rax
203; NF-NEXT:    movq $-1, %rcx
204; NF-NEXT:    cmoveq %rcx, %rax
205; NF-NEXT:    retq
206entry:
207  %inc = call i64 @llvm.uadd.sat.i64(i64 %a, i64 1)
208  ret i64 %inc
209}
210
211declare i8 @llvm.uadd.sat.i8(i8, i8)
212declare i16 @llvm.uadd.sat.i16(i16, i16)
213declare i32 @llvm.uadd.sat.i32(i32, i32)
214declare i64 @llvm.uadd.sat.i64(i64, i64)
215
216define void @inc8m_legacy(ptr %ptr) {
217; CHECK-LABEL: inc8m_legacy:
218; CHECK:       # %bb.0: # %entry
219; CHECK-NEXT:    incb (%rdi)
220; CHECK-NEXT:    retq
221;
222; NF-LABEL: inc8m_legacy:
223; NF:       # %bb.0: # %entry
224; NF-NEXT:    incb (%rdi)
225; NF-NEXT:    retq
226entry:
227  %a = load i8, ptr %ptr
228  %inc = add i8 %a, 1
229  store i8 %inc, ptr %ptr
230  ret void
231}
232
233define void @inc16m_legacy(ptr %ptr) {
234; CHECK-LABEL: inc16m_legacy:
235; CHECK:       # %bb.0: # %entry
236; CHECK-NEXT:    incw (%rdi)
237; CHECK-NEXT:    retq
238;
239; NF-LABEL: inc16m_legacy:
240; NF:       # %bb.0: # %entry
241; NF-NEXT:    incw (%rdi)
242; NF-NEXT:    retq
243entry:
244  %a = load i16, ptr %ptr
245  %inc = add i16 %a, 1
246  store i16 %inc, ptr %ptr
247  ret void
248}
249
250define void @inc32m_legacy(ptr %ptr) {
251; CHECK-LABEL: inc32m_legacy:
252; CHECK:       # %bb.0: # %entry
253; CHECK-NEXT:    incl (%rdi)
254; CHECK-NEXT:    retq
255;
256; NF-LABEL: inc32m_legacy:
257; NF:       # %bb.0: # %entry
258; NF-NEXT:    incl (%rdi)
259; NF-NEXT:    retq
260entry:
261  %a = load i32, ptr %ptr
262  %inc = add i32 %a, 1
263  store i32 %inc, ptr %ptr
264  ret void
265}
266
267define void @inc64m_legacy(ptr %ptr) {
268; CHECK-LABEL: inc64m_legacy:
269; CHECK:       # %bb.0: # %entry
270; CHECK-NEXT:    incq (%rdi)
271; CHECK-NEXT:    retq
272;
273; NF-LABEL: inc64m_legacy:
274; NF:       # %bb.0: # %entry
275; NF-NEXT:    incq (%rdi)
276; NF-NEXT:    retq
277entry:
278  %a = load i64, ptr %ptr
279  %inc = add i64 %a, 1
280  store i64 %inc, ptr %ptr
281  ret void
282}
283