xref: /llvm-project/llvm/test/CodeGen/X86/apx/and.ll (revision f30188797453fc9bccb0ba9e8bdb8fd47369dfa7)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
4
5define i8 @and8rr(i8 noundef %a, i8 noundef %b) {
6; CHECK-LABEL: and8rr:
7; CHECK:       # %bb.0: # %entry
8; CHECK-NEXT:    andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
9; CHECK-NEXT:    # kill: def $al killed $al killed $eax
10; CHECK-NEXT:    retq # encoding: [0xc3]
11;
12; NF-LABEL: and8rr:
13; NF:       # %bb.0: # %entry
14; NF-NEXT:    {nf} andl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x21,0xf7]
15; NF-NEXT:    # kill: def $al killed $al killed $eax
16; NF-NEXT:    retq # encoding: [0xc3]
17entry:
18    %and = and i8 %a, %b
19    ret i8 %and
20}
21
22define i16 @and16rr(i16 noundef %a, i16 noundef %b) {
23; CHECK-LABEL: and16rr:
24; CHECK:       # %bb.0: # %entry
25; CHECK-NEXT:    andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
26; CHECK-NEXT:    # kill: def $ax killed $ax killed $eax
27; CHECK-NEXT:    retq # encoding: [0xc3]
28;
29; NF-LABEL: and16rr:
30; NF:       # %bb.0: # %entry
31; NF-NEXT:    {nf} andl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x21,0xf7]
32; NF-NEXT:    # kill: def $ax killed $ax killed $eax
33; NF-NEXT:    retq # encoding: [0xc3]
34entry:
35    %and = and i16 %a, %b
36    ret i16 %and
37}
38
39define i32 @and32rr(i32 noundef %a, i32 noundef %b) {
40; CHECK-LABEL: and32rr:
41; CHECK:       # %bb.0: # %entry
42; CHECK-NEXT:    andl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x21,0xf7]
43; CHECK-NEXT:    retq # encoding: [0xc3]
44;
45; NF-LABEL: and32rr:
46; NF:       # %bb.0: # %entry
47; NF-NEXT:    {nf} andl %esi, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x21,0xf7]
48; NF-NEXT:    retq # encoding: [0xc3]
49entry:
50    %and = and i32 %a, %b
51    ret i32 %and
52}
53
54define i64 @and64rr(i64 noundef %a, i64 noundef %b) {
55; CHECK-LABEL: and64rr:
56; CHECK:       # %bb.0: # %entry
57; CHECK-NEXT:    andq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x21,0xf7]
58; CHECK-NEXT:    retq # encoding: [0xc3]
59;
60; NF-LABEL: and64rr:
61; NF:       # %bb.0: # %entry
62; NF-NEXT:    {nf} andq %rsi, %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x21,0xf7]
63; NF-NEXT:    retq # encoding: [0xc3]
64entry:
65    %and = and i64 %a, %b
66    ret i64 %and
67}
68
69define i8 @and8rm(i8 noundef %a, ptr %b) {
70; CHECK-LABEL: and8rm:
71; CHECK:       # %bb.0: # %entry
72; CHECK-NEXT:    andb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x22,0x3e]
73; CHECK-NEXT:    retq # encoding: [0xc3]
74;
75; NF-LABEL: and8rm:
76; NF:       # %bb.0: # %entry
77; NF-NEXT:    {nf} andb (%rsi), %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x22,0x3e]
78; NF-NEXT:    retq # encoding: [0xc3]
79entry:
80    %t = load i8, ptr %b
81    %and = and i8 %a, %t
82    ret i8 %and
83}
84
85define i16 @and16rm(i16 noundef %a, ptr %b) {
86; CHECK-LABEL: and16rm:
87; CHECK:       # %bb.0: # %entry
88; CHECK-NEXT:    andw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x23,0x3e]
89; CHECK-NEXT:    retq # encoding: [0xc3]
90;
91; NF-LABEL: and16rm:
92; NF:       # %bb.0: # %entry
93; NF-NEXT:    {nf} andw (%rsi), %di, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x23,0x3e]
94; NF-NEXT:    retq # encoding: [0xc3]
95entry:
96    %t = load i16, ptr %b
97    %and = and i16 %a, %t
98    ret i16 %and
99}
100
101define i32 @and32rm(i32 noundef %a, ptr %b) {
102; CHECK-LABEL: and32rm:
103; CHECK:       # %bb.0: # %entry
104; CHECK-NEXT:    andl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x23,0x3e]
105; CHECK-NEXT:    retq # encoding: [0xc3]
106;
107; NF-LABEL: and32rm:
108; NF:       # %bb.0: # %entry
109; NF-NEXT:    {nf} andl (%rsi), %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x23,0x3e]
110; NF-NEXT:    retq # encoding: [0xc3]
111entry:
112    %t = load i32, ptr %b
113    %and = and i32 %a, %t
114    ret i32 %and
115}
116
117define i64 @and64rm(i64 noundef %a, ptr %b) {
118; CHECK-LABEL: and64rm:
119; CHECK:       # %bb.0: # %entry
120; CHECK-NEXT:    andq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x23,0x3e]
121; CHECK-NEXT:    retq # encoding: [0xc3]
122;
123; NF-LABEL: and64rm:
124; NF:       # %bb.0: # %entry
125; NF-NEXT:    {nf} andq (%rsi), %rdi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x23,0x3e]
126; NF-NEXT:    retq # encoding: [0xc3]
127entry:
128    %t = load i64, ptr %b
129    %and = and i64 %a, %t
130    ret i64 %and
131}
132
133define i16 @and16ri8(i16 noundef %a) {
134; CHECK-LABEL: and16ri8:
135; CHECK:       # %bb.0: # %entry
136; CHECK-NEXT:    andw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xe7,0x7b]
137; CHECK-NEXT:    retq # encoding: [0xc3]
138;
139; NF-LABEL: and16ri8:
140; NF:       # %bb.0: # %entry
141; NF-NEXT:    {nf} andw $123, %di, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x83,0xe7,0x7b]
142; NF-NEXT:    retq # encoding: [0xc3]
143entry:
144    %and = and i16 %a, 123
145    ret i16 %and
146}
147
148define i32 @and32ri8(i32 noundef %a) {
149; CHECK-LABEL: and32ri8:
150; CHECK:       # %bb.0: # %entry
151; CHECK-NEXT:    andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xe7,0x7b]
152; CHECK-NEXT:    retq # encoding: [0xc3]
153;
154; NF-LABEL: and32ri8:
155; NF:       # %bb.0: # %entry
156; NF-NEXT:    {nf} andl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xe7,0x7b]
157; NF-NEXT:    retq # encoding: [0xc3]
158entry:
159    %and = and i32 %a, 123
160    ret i32 %and
161}
162
163define i64 @and64ri8(i64 noundef %a) {
164; CHECK-LABEL: and64ri8:
165; CHECK:       # %bb.0: # %entry
166; CHECK-NEXT:    andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xe7,0x7b]
167; CHECK-NEXT:    retq # encoding: [0xc3]
168;
169; NF-LABEL: and64ri8:
170; NF:       # %bb.0: # %entry
171; NF-NEXT:    {nf} andl $123, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0xe7,0x7b]
172; NF-NEXT:    retq # encoding: [0xc3]
173entry:
174    %and = and i64 %a, 123
175    ret i64 %and
176}
177
178define i8 @and8ri(i8 noundef %a) {
179; CHECK-LABEL: and8ri:
180; CHECK:       # %bb.0: # %entry
181; CHECK-NEXT:    andb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xe7,0x7b]
182; CHECK-NEXT:    retq # encoding: [0xc3]
183;
184; NF-LABEL: and8ri:
185; NF:       # %bb.0: # %entry
186; NF-NEXT:    {nf} andb $123, %dil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0xe7,0x7b]
187; NF-NEXT:    retq # encoding: [0xc3]
188entry:
189    %and = and i8 %a, 123
190    ret i8 %and
191}
192
193define i16 @and16ri(i16 noundef %a) {
194; CHECK-LABEL: and16ri:
195; CHECK:       # %bb.0: # %entry
196; CHECK-NEXT:    andw $1234, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xe7,0xd2,0x04]
197; CHECK-NEXT:    # imm = 0x4D2
198; CHECK-NEXT:    retq # encoding: [0xc3]
199;
200; NF-LABEL: and16ri:
201; NF:       # %bb.0: # %entry
202; NF-NEXT:    {nf} andw $1234, %di, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x81,0xe7,0xd2,0x04]
203; NF-NEXT:    # imm = 0x4D2
204; NF-NEXT:    retq # encoding: [0xc3]
205entry:
206    %and = and i16 %a, 1234
207    ret i16 %and
208}
209
210define i32 @and32ri(i32 noundef %a) {
211; CHECK-LABEL: and32ri:
212; CHECK:       # %bb.0: # %entry
213; CHECK-NEXT:    andl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
214; CHECK-NEXT:    # imm = 0x1E240
215; CHECK-NEXT:    retq # encoding: [0xc3]
216;
217; NF-LABEL: and32ri:
218; NF:       # %bb.0: # %entry
219; NF-NEXT:    {nf} andl $123456, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xe7,0x40,0xe2,0x01,0x00]
220; NF-NEXT:    # imm = 0x1E240
221; NF-NEXT:    retq # encoding: [0xc3]
222entry:
223    %and = and i32 %a, 123456
224    ret i32 %and
225}
226
227define i64 @and64ri(i64 noundef %a) {
228; CHECK-LABEL: and64ri:
229; CHECK:       # %bb.0: # %entry
230; CHECK-NEXT:    andl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x40,0xe2,0x01,0x00]
231; CHECK-NEXT:    # imm = 0x1E240
232; CHECK-NEXT:    retq # encoding: [0xc3]
233;
234; NF-LABEL: and64ri:
235; NF:       # %bb.0: # %entry
236; NF-NEXT:    {nf} andl $123456, %edi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0xe7,0x40,0xe2,0x01,0x00]
237; NF-NEXT:    # imm = 0x1E240
238; NF-NEXT:    retq # encoding: [0xc3]
239entry:
240    %and = and i64 %a, 123456
241    ret i64 %and
242}
243
244define i8 @and8mr(ptr %a, i8 noundef %b) {
245; CHECK-LABEL: and8mr:
246; CHECK:       # %bb.0: # %entry
247; CHECK-NEXT:    andb (%rdi), %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x22,0x37]
248; CHECK-NEXT:    retq # encoding: [0xc3]
249;
250; NF-LABEL: and8mr:
251; NF:       # %bb.0: # %entry
252; NF-NEXT:    {nf} andb (%rdi), %sil, %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x22,0x37]
253; NF-NEXT:    retq # encoding: [0xc3]
254entry:
255  %t= load i8, ptr %a
256  %and = and i8 %t, %b
257  ret i8 %and
258}
259
260define i16 @and16mr(ptr %a, i16 noundef %b) {
261; CHECK-LABEL: and16mr:
262; CHECK:       # %bb.0: # %entry
263; CHECK-NEXT:    andw (%rdi), %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x23,0x37]
264; CHECK-NEXT:    retq # encoding: [0xc3]
265;
266; NF-LABEL: and16mr:
267; NF:       # %bb.0: # %entry
268; NF-NEXT:    {nf} andw (%rdi), %si, %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x23,0x37]
269; NF-NEXT:    retq # encoding: [0xc3]
270entry:
271  %t= load i16, ptr %a
272  %and = and i16 %t, %b
273  ret i16 %and
274}
275
276define i32 @and32mr(ptr %a, i32 noundef %b) {
277; CHECK-LABEL: and32mr:
278; CHECK:       # %bb.0: # %entry
279; CHECK-NEXT:    andl (%rdi), %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x23,0x37]
280; CHECK-NEXT:    retq # encoding: [0xc3]
281;
282; NF-LABEL: and32mr:
283; NF:       # %bb.0: # %entry
284; NF-NEXT:    {nf} andl (%rdi), %esi, %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x23,0x37]
285; NF-NEXT:    retq # encoding: [0xc3]
286entry:
287  %t= load i32, ptr %a
288  %and = and i32 %t, %b
289  ret i32 %and
290}
291
292define i64 @and64mr(ptr %a, i64 noundef %b) {
293; CHECK-LABEL: and64mr:
294; CHECK:       # %bb.0: # %entry
295; CHECK-NEXT:    andq (%rdi), %rsi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x23,0x37]
296; CHECK-NEXT:    retq # encoding: [0xc3]
297;
298; NF-LABEL: and64mr:
299; NF:       # %bb.0: # %entry
300; NF-NEXT:    {nf} andq (%rdi), %rsi, %rax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0xfc,0x1c,0x23,0x37]
301; NF-NEXT:    retq # encoding: [0xc3]
302entry:
303  %t= load i64, ptr %a
304  %and = and i64 %t, %b
305  ret i64 %and
306}
307
308define i16 @and16mi8(ptr %a) {
309; CHECK-LABEL: and16mi8:
310; CHECK:       # %bb.0: # %entry
311; CHECK-NEXT:    andw $123, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x27,0x7b]
312; CHECK-NEXT:    retq # encoding: [0xc3]
313;
314; NF-LABEL: and16mi8:
315; NF:       # %bb.0: # %entry
316; NF-NEXT:    {nf} andw $123, (%rdi), %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x83,0x27,0x7b]
317; NF-NEXT:    retq # encoding: [0xc3]
318entry:
319  %t= load i16, ptr %a
320  %and = and i16 %t, 123
321  ret i16 %and
322}
323
324define i32 @and32mi8(ptr %a) {
325; CHECK-LABEL: and32mi8:
326; CHECK:       # %bb.0: # %entry
327; CHECK-NEXT:    andl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x27,0x7b]
328; CHECK-NEXT:    retq # encoding: [0xc3]
329;
330; NF-LABEL: and32mi8:
331; NF:       # %bb.0: # %entry
332; NF-NEXT:    {nf} andl $123, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x83,0x27,0x7b]
333; NF-NEXT:    retq # encoding: [0xc3]
334entry:
335  %t= load i32, ptr %a
336  %and = and i32 %t, 123
337  ret i32 %and
338}
339
340define i64 @and64mi8(ptr %a) {
341; CHECK-LABEL: and64mi8:
342; CHECK:       # %bb.0: # %entry
343; CHECK-NEXT:    movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
344; CHECK-NEXT:    andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b]
345; CHECK-NEXT:    retq # encoding: [0xc3]
346;
347; NF-LABEL: and64mi8:
348; NF:       # %bb.0: # %entry
349; NF-NEXT:    movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
350; NF-NEXT:    andl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xe0,0x7b]
351; NF-NEXT:    retq # encoding: [0xc3]
352entry:
353  %t= load i64, ptr %a
354  %and = and i64 %t, 123
355  ret i64 %and
356}
357
358define i8 @and8mi(ptr %a) {
359; CHECK-LABEL: and8mi:
360; CHECK:       # %bb.0: # %entry
361; CHECK-NEXT:    andb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x27,0x7b]
362; CHECK-NEXT:    retq # encoding: [0xc3]
363;
364; NF-LABEL: and8mi:
365; NF:       # %bb.0: # %entry
366; NF-NEXT:    {nf} andb $123, (%rdi), %al # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x80,0x27,0x7b]
367; NF-NEXT:    retq # encoding: [0xc3]
368entry:
369  %t= load i8, ptr %a
370  %and = and i8 %t, 123
371  ret i8 %and
372}
373
374define i16 @and16mi(ptr %a) {
375; CHECK-LABEL: and16mi:
376; CHECK:       # %bb.0: # %entry
377; CHECK-NEXT:    andw $1234, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x27,0xd2,0x04]
378; CHECK-NEXT:    # imm = 0x4D2
379; CHECK-NEXT:    retq # encoding: [0xc3]
380;
381; NF-LABEL: and16mi:
382; NF:       # %bb.0: # %entry
383; NF-NEXT:    {nf} andw $1234, (%rdi), %ax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7d,0x1c,0x81,0x27,0xd2,0x04]
384; NF-NEXT:    # imm = 0x4D2
385; NF-NEXT:    retq # encoding: [0xc3]
386entry:
387  %t= load i16, ptr %a
388  %and = and i16 %t, 1234
389  ret i16 %and
390}
391
392define i32 @and32mi(ptr %a) {
393; CHECK-LABEL: and32mi:
394; CHECK:       # %bb.0: # %entry
395; CHECK-NEXT:    andl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x27,0x40,0xe2,0x01,0x00]
396; CHECK-NEXT:    # imm = 0x1E240
397; CHECK-NEXT:    retq # encoding: [0xc3]
398;
399; NF-LABEL: and32mi:
400; NF:       # %bb.0: # %entry
401; NF-NEXT:    {nf} andl $123456, (%rdi), %eax # EVEX TO EVEX Compression encoding: [0x62,0xf4,0x7c,0x1c,0x81,0x27,0x40,0xe2,0x01,0x00]
402; NF-NEXT:    # imm = 0x1E240
403; NF-NEXT:    retq # encoding: [0xc3]
404entry:
405  %t= load i32, ptr %a
406  %and = and i32 %t, 123456
407  ret i32 %and
408}
409
410define i64 @and64mi(ptr %a) {
411; CHECK-LABEL: and64mi:
412; CHECK:       # %bb.0: # %entry
413; CHECK-NEXT:    movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
414; CHECK-NEXT:    andl $123456, %eax # EVEX TO LEGACY Compression encoding: [0x25,0x40,0xe2,0x01,0x00]
415; CHECK-NEXT:    # imm = 0x1E240
416; CHECK-NEXT:    retq # encoding: [0xc3]
417;
418; NF-LABEL: and64mi:
419; NF:       # %bb.0: # %entry
420; NF-NEXT:    movq (%rdi), %rax # encoding: [0x48,0x8b,0x07]
421; NF-NEXT:    andl $123456, %eax # EVEX TO LEGACY Compression encoding: [0x25,0x40,0xe2,0x01,0x00]
422; NF-NEXT:    # imm = 0x1E240
423; NF-NEXT:    retq # encoding: [0xc3]
424entry:
425  %t= load i64, ptr %a
426  %and = and i64 %t, 123456
427  ret i64 %and
428}
429
430@d64 = dso_local global i64 0
431
432define i1 @andflag8rr(i8 %a, i8 %b) {
433; CHECK-LABEL: andflag8rr:
434; CHECK:       # %bb.0:
435; CHECK-NEXT:    notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
436; CHECK-NEXT:    andb %al, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x20,0xc7]
437; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
438; CHECK-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
439; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
440; CHECK-NEXT:    retq # encoding: [0xc3]
441;
442; NF-LABEL: andflag8rr:
443; NF:       # %bb.0:
444; NF-NEXT:    notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
445; NF-NEXT:    andb %al, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x20,0xc7]
446; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
447; NF-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
448; NF-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
449; NF-NEXT:    retq # encoding: [0xc3]
450  %xor = xor i8 %b, -1
451  %v0 = and i8 %a, %xor  ; 0xff << 50
452  %v1 = icmp eq i8 %v0, 0
453  store i8 %v0, ptr @d64
454  ret i1 %v1
455}
456
457define i1 @andflag16rr(i16 %a, i16 %b) {
458; CHECK-LABEL: andflag16rr:
459; CHECK:       # %bb.0:
460; CHECK-NEXT:    notw %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xf7,0xd6]
461; CHECK-NEXT:    andw %ax, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x21,0xc7]
462; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
463; CHECK-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
464; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
465; CHECK-NEXT:    retq # encoding: [0xc3]
466;
467; NF-LABEL: andflag16rr:
468; NF:       # %bb.0:
469; NF-NEXT:    notw %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xf7,0xd6]
470; NF-NEXT:    andw %ax, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x21,0xc7]
471; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
472; NF-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
473; NF-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
474; NF-NEXT:    retq # encoding: [0xc3]
475  %xor = xor i16 %b, -1
476  %v0 = and i16 %a, %xor  ; 0xff << 50
477  %v1 = icmp eq i16 %v0, 0
478  store i16 %v0, ptr @d64
479  ret i1 %v1
480}
481
482define i1 @andflag32rr(i32 %a, i32 %b) {
483; CHECK-LABEL: andflag32rr:
484; CHECK:       # %bb.0:
485; CHECK-NEXT:    andl %edi, %esi # EVEX TO LEGACY Compression encoding: [0x21,0xfe]
486; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
487; CHECK-NEXT:    movl %esi, d64(%rip) # encoding: [0x89,0x35,A,A,A,A]
488; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
489; CHECK-NEXT:    retq # encoding: [0xc3]
490;
491; NF-LABEL: andflag32rr:
492; NF:       # %bb.0:
493; NF-NEXT:    andl %edi, %esi # EVEX TO LEGACY Compression encoding: [0x21,0xfe]
494; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
495; NF-NEXT:    movl %esi, d64(%rip) # encoding: [0x89,0x35,A,A,A,A]
496; NF-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
497; NF-NEXT:    retq # encoding: [0xc3]
498  %v0 = and i32 %a, %b  ; 0xff << 50
499  %v1 = icmp eq i32 %v0, 0
500  store i32 %v0, ptr @d64
501  ret i1 %v1
502}
503
504define i1 @andflag64rr(i64 %a, i64 %b) {
505; CHECK-LABEL: andflag64rr:
506; CHECK:       # %bb.0:
507; CHECK-NEXT:    andq %rdi, %rsi # EVEX TO LEGACY Compression encoding: [0x48,0x21,0xfe]
508; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
509; CHECK-NEXT:    movq %rsi, d64(%rip) # encoding: [0x48,0x89,0x35,A,A,A,A]
510; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
511; CHECK-NEXT:    retq # encoding: [0xc3]
512;
513; NF-LABEL: andflag64rr:
514; NF:       # %bb.0:
515; NF-NEXT:    andq %rdi, %rsi # EVEX TO LEGACY Compression encoding: [0x48,0x21,0xfe]
516; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
517; NF-NEXT:    movq %rsi, d64(%rip) # encoding: [0x48,0x89,0x35,A,A,A,A]
518; NF-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
519; NF-NEXT:    retq # encoding: [0xc3]
520  %v0 = and i64 %a, %b  ; 0xff << 50
521  %v1 = icmp eq i64 %v0, 0
522  store i64 %v0, ptr @d64
523  ret i1 %v1
524}
525
526define i1 @andflag8rm(ptr %ptr, i8 %b) {
527; CHECK-LABEL: andflag8rm:
528; CHECK:       # %bb.0:
529; CHECK-NEXT:    notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
530; CHECK-NEXT:    andb (%rdi), %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x22,0x07]
531; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
532; CHECK-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
533; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
534; CHECK-NEXT:    retq # encoding: [0xc3]
535;
536; NF-LABEL: andflag8rm:
537; NF:       # %bb.0:
538; NF-NEXT:    notb %sil, %al # encoding: [0x62,0xf4,0x7c,0x18,0xf6,0xd6]
539; NF-NEXT:    andb (%rdi), %al, %cl # encoding: [0x62,0xf4,0x74,0x18,0x22,0x07]
540; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
541; NF-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
542; NF-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
543; NF-NEXT:    retq # encoding: [0xc3]
544  %a = load i8, ptr %ptr
545  %xor = xor i8 %b, -1
546  %v0 = and i8 %a, %xor  ; 0xff << 50
547  %v1 = icmp eq i8 %v0, 0
548  store i8 %v0, ptr @d64
549  ret i1 %v1
550}
551
552define i1 @andflag16rm(ptr %ptr, i16 %b) {
553; CHECK-LABEL: andflag16rm:
554; CHECK:       # %bb.0:
555; CHECK-NEXT:    notw %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xf7,0xd6]
556; CHECK-NEXT:    andw (%rdi), %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x23,0x07]
557; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
558; CHECK-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
559; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
560; CHECK-NEXT:    retq # encoding: [0xc3]
561;
562; NF-LABEL: andflag16rm:
563; NF:       # %bb.0:
564; NF-NEXT:    notw %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0xf7,0xd6]
565; NF-NEXT:    andw (%rdi), %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x23,0x07]
566; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
567; NF-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
568; NF-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
569; NF-NEXT:    retq # encoding: [0xc3]
570  %a = load i16, ptr %ptr
571  %xor = xor i16 %b, -1
572  %v0 = and i16 %a, %xor  ; 0xff << 50
573  %v1 = icmp eq i16 %v0, 0
574  store i16 %v0, ptr @d64
575  ret i1 %v1
576}
577
578define i1 @andflag32rm(ptr %ptr, i32 %b) {
579; CHECK-LABEL: andflag32rm:
580; CHECK:       # %bb.0:
581; CHECK-NEXT:    andl (%rdi), %esi # EVEX TO LEGACY Compression encoding: [0x23,0x37]
582; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
583; CHECK-NEXT:    movl %esi, d64(%rip) # encoding: [0x89,0x35,A,A,A,A]
584; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
585; CHECK-NEXT:    retq # encoding: [0xc3]
586;
587; NF-LABEL: andflag32rm:
588; NF:       # %bb.0:
589; NF-NEXT:    andl (%rdi), %esi # EVEX TO LEGACY Compression encoding: [0x23,0x37]
590; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
591; NF-NEXT:    movl %esi, d64(%rip) # encoding: [0x89,0x35,A,A,A,A]
592; NF-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
593; NF-NEXT:    retq # encoding: [0xc3]
594  %a = load i32, ptr %ptr
595  %v0 = and i32 %a, %b  ; 0xff << 50
596  %v1 = icmp eq i32 %v0, 0
597  store i32 %v0, ptr @d64
598  ret i1 %v1
599}
600
601define i1 @andflag64rm(ptr %ptr, i64 %b) {
602; CHECK-LABEL: andflag64rm:
603; CHECK:       # %bb.0:
604; CHECK-NEXT:    andq (%rdi), %rsi # EVEX TO LEGACY Compression encoding: [0x48,0x23,0x37]
605; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
606; CHECK-NEXT:    movq %rsi, d64(%rip) # encoding: [0x48,0x89,0x35,A,A,A,A]
607; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
608; CHECK-NEXT:    retq # encoding: [0xc3]
609;
610; NF-LABEL: andflag64rm:
611; NF:       # %bb.0:
612; NF-NEXT:    andq (%rdi), %rsi # EVEX TO LEGACY Compression encoding: [0x48,0x23,0x37]
613; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
614; NF-NEXT:    movq %rsi, d64(%rip) # encoding: [0x48,0x89,0x35,A,A,A,A]
615; NF-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
616; NF-NEXT:    retq # encoding: [0xc3]
617  %a = load i64, ptr %ptr
618  %v0 = and i64 %a, %b  ; 0xff << 50
619  %v1 = icmp eq i64 %v0, 0
620  store i64 %v0, ptr @d64
621  ret i1 %v1
622}
623
624define i1 @andflag8ri(i8 %a) {
625; CHECK-LABEL: andflag8ri:
626; CHECK:       # %bb.0:
627; CHECK-NEXT:    andb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xe7,0x84]
628; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
629; CHECK-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
630; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
631; CHECK-NEXT:    retq # encoding: [0xc3]
632;
633; NF-LABEL: andflag8ri:
634; NF:       # %bb.0:
635; NF-NEXT:    andb $-124, %dil, %cl # encoding: [0x62,0xf4,0x74,0x18,0x80,0xe7,0x84]
636; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
637; NF-NEXT:    movb %cl, d64(%rip) # encoding: [0x88,0x0d,A,A,A,A]
638; NF-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
639; NF-NEXT:    retq # encoding: [0xc3]
640  %xor = xor i8 123, -1
641  %v0 = and i8 %a, %xor  ; 0xff << 50
642  %v1 = icmp eq i8 %v0, 0
643  store i8 %v0, ptr @d64
644  ret i1 %v1
645}
646
647define i1 @andflag16ri(i16 %a) {
648; CHECK-LABEL: andflag16ri:
649; CHECK:       # %bb.0:
650; CHECK-NEXT:    andw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xe7,0x2d,0xfb]
651; CHECK-NEXT:    # imm = 0xFB2D
652; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
653; CHECK-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
654; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
655; CHECK-NEXT:    retq # encoding: [0xc3]
656;
657; NF-LABEL: andflag16ri:
658; NF:       # %bb.0:
659; NF-NEXT:    andw $-1235, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xe7,0x2d,0xfb]
660; NF-NEXT:    # imm = 0xFB2D
661; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
662; NF-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
663; NF-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
664; NF-NEXT:    retq # encoding: [0xc3]
665  %xor = xor i16 1234, -1
666  %v0 = and i16 %a, %xor  ; 0xff << 50
667  %v1 = icmp eq i16 %v0, 0
668  store i16 %v0, ptr @d64
669  ret i1 %v1
670}
671
672define i1 @andflag32ri(i32 %a) {
673; CHECK-LABEL: andflag32ri:
674; CHECK:       # %bb.0:
675; CHECK-NEXT:    andl $123456, %edi # EVEX TO LEGACY Compression encoding: [0x81,0xe7,0x40,0xe2,0x01,0x00]
676; CHECK-NEXT:    # imm = 0x1E240
677; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
678; CHECK-NEXT:    movl %edi, d64(%rip) # encoding: [0x89,0x3d,A,A,A,A]
679; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
680; CHECK-NEXT:    retq # encoding: [0xc3]
681;
682; NF-LABEL: andflag32ri:
683; NF:       # %bb.0:
684; NF-NEXT:    andl $123456, %edi # EVEX TO LEGACY Compression encoding: [0x81,0xe7,0x40,0xe2,0x01,0x00]
685; NF-NEXT:    # imm = 0x1E240
686; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
687; NF-NEXT:    movl %edi, d64(%rip) # encoding: [0x89,0x3d,A,A,A,A]
688; NF-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
689; NF-NEXT:    retq # encoding: [0xc3]
690  %v0 = and i32 %a, 123456  ; 0xff << 50
691  %v1 = icmp eq i32 %v0, 0
692  store i32 %v0, ptr @d64
693  ret i1 %v1
694}
695
696define i1 @andflag64ri(i64 %a) {
697; CHECK-LABEL: andflag64ri:
698; CHECK:       # %bb.0:
699; CHECK-NEXT:    andq $123456, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0x81,0xe7,0x40,0xe2,0x01,0x00]
700; CHECK-NEXT:    # imm = 0x1E240
701; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
702; CHECK-NEXT:    movq %rdi, d64(%rip) # encoding: [0x48,0x89,0x3d,A,A,A,A]
703; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
704; CHECK-NEXT:    retq # encoding: [0xc3]
705;
706; NF-LABEL: andflag64ri:
707; NF:       # %bb.0:
708; NF-NEXT:    andq $123456, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0x81,0xe7,0x40,0xe2,0x01,0x00]
709; NF-NEXT:    # imm = 0x1E240
710; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
711; NF-NEXT:    movq %rdi, d64(%rip) # encoding: [0x48,0x89,0x3d,A,A,A,A]
712; NF-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
713; NF-NEXT:    retq # encoding: [0xc3]
714  %v0 = and i64 %a, 123456  ; 0xff << 50
715  %v1 = icmp eq i64 %v0, 0
716  store i64 %v0, ptr @d64
717  ret i1 %v1
718}
719
720define i1 @andflag16ri8(i16 %a) {
721; CHECK-LABEL: andflag16ri8:
722; CHECK:       # %bb.0:
723; CHECK-NEXT:    andw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xe7,0x84]
724; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
725; CHECK-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
726; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
727; CHECK-NEXT:    retq # encoding: [0xc3]
728;
729; NF-LABEL: andflag16ri8:
730; NF:       # %bb.0:
731; NF-NEXT:    andw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xe7,0x84]
732; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
733; NF-NEXT:    movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
734; NF-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
735; NF-NEXT:    retq # encoding: [0xc3]
736  %xor = xor i16 123, -1
737  %v0 = and i16 %a, %xor  ; 0xff << 50
738  %v1 = icmp eq i16 %v0, 0
739  store i16 %v0, ptr @d64
740  ret i1 %v1
741}
742
743define i1 @andflag32ri8(i32 %a) {
744; CHECK-LABEL: andflag32ri8:
745; CHECK:       # %bb.0:
746; CHECK-NEXT:    andl $123, %edi # EVEX TO LEGACY Compression encoding: [0x83,0xe7,0x7b]
747; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
748; CHECK-NEXT:    movl %edi, d64(%rip) # encoding: [0x89,0x3d,A,A,A,A]
749; CHECK-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
750; CHECK-NEXT:    retq # encoding: [0xc3]
751;
752; NF-LABEL: andflag32ri8:
753; NF:       # %bb.0:
754; NF-NEXT:    andl $123, %edi # EVEX TO LEGACY Compression encoding: [0x83,0xe7,0x7b]
755; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
756; NF-NEXT:    movl %edi, d64(%rip) # encoding: [0x89,0x3d,A,A,A,A]
757; NF-NEXT:    # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
758; NF-NEXT:    retq # encoding: [0xc3]
759  %v0 = and i32 %a, 123  ; 0xff << 50
760  %v1 = icmp eq i32 %v0, 0
761  store i32 %v0, ptr @d64
762  ret i1 %v1
763}
764
765define i1 @andflag64ri8(i64 %a) {
766; CHECK-LABEL: andflag64ri8:
767; CHECK:       # %bb.0:
768; CHECK-NEXT:    andq $123, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xe7,0x7b]
769; CHECK-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
770; CHECK-NEXT:    movq %rdi, d64(%rip) # encoding: [0x48,0x89,0x3d,A,A,A,A]
771; CHECK-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
772; CHECK-NEXT:    retq # encoding: [0xc3]
773;
774; NF-LABEL: andflag64ri8:
775; NF:       # %bb.0:
776; NF-NEXT:    andq $123, %rdi # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xe7,0x7b]
777; NF-NEXT:    sete %al # encoding: [0x0f,0x94,0xc0]
778; NF-NEXT:    movq %rdi, d64(%rip) # encoding: [0x48,0x89,0x3d,A,A,A,A]
779; NF-NEXT:    # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
780; NF-NEXT:    retq # encoding: [0xc3]
781  %v0 = and i64 %a, 123  ; 0xff << 50
782  %v1 = icmp eq i64 %v0, 0
783  store i64 %v0, ptr @d64
784  ret i1 %v1
785}
786
787define void @and8mr_legacy(ptr %a, i8 noundef %b) {
788; CHECK-LABEL: and8mr_legacy:
789; CHECK:       # %bb.0: # %entry
790; CHECK-NEXT:    andb %sil, (%rdi) # encoding: [0x40,0x20,0x37]
791; CHECK-NEXT:    retq # encoding: [0xc3]
792;
793; NF-LABEL: and8mr_legacy:
794; NF:       # %bb.0: # %entry
795; NF-NEXT:    andb %sil, (%rdi) # encoding: [0x40,0x20,0x37]
796; NF-NEXT:    retq # encoding: [0xc3]
797entry:
798  %t= load i8, ptr %a
799  %and = and i8 %t, %b
800  store i8 %and, ptr %a
801  ret void
802}
803
804define void @and16mr_legacy(ptr %a, i16 noundef %b) {
805; CHECK-LABEL: and16mr_legacy:
806; CHECK:       # %bb.0: # %entry
807; CHECK-NEXT:    andw %si, (%rdi) # encoding: [0x66,0x21,0x37]
808; CHECK-NEXT:    retq # encoding: [0xc3]
809;
810; NF-LABEL: and16mr_legacy:
811; NF:       # %bb.0: # %entry
812; NF-NEXT:    andw %si, (%rdi) # encoding: [0x66,0x21,0x37]
813; NF-NEXT:    retq # encoding: [0xc3]
814entry:
815  %t= load i16, ptr %a
816  %and = and i16 %t, %b
817  store i16 %and, ptr %a
818  ret void
819}
820
821define void @and32mr_legacy(ptr %a, i32 noundef %b) {
822; CHECK-LABEL: and32mr_legacy:
823; CHECK:       # %bb.0: # %entry
824; CHECK-NEXT:    andl %esi, (%rdi) # encoding: [0x21,0x37]
825; CHECK-NEXT:    retq # encoding: [0xc3]
826;
827; NF-LABEL: and32mr_legacy:
828; NF:       # %bb.0: # %entry
829; NF-NEXT:    andl %esi, (%rdi) # encoding: [0x21,0x37]
830; NF-NEXT:    retq # encoding: [0xc3]
831entry:
832  %t= load i32, ptr %a
833  %and = and i32 %t, %b
834  store i32 %and, ptr %a
835  ret void
836}
837
838define void @and64mr_legacy(ptr %a, i64 noundef %b) {
839; CHECK-LABEL: and64mr_legacy:
840; CHECK:       # %bb.0: # %entry
841; CHECK-NEXT:    andq %rsi, (%rdi) # encoding: [0x48,0x21,0x37]
842; CHECK-NEXT:    retq # encoding: [0xc3]
843;
844; NF-LABEL: and64mr_legacy:
845; NF:       # %bb.0: # %entry
846; NF-NEXT:    andq %rsi, (%rdi) # encoding: [0x48,0x21,0x37]
847; NF-NEXT:    retq # encoding: [0xc3]
848entry:
849  %t= load i64, ptr %a
850  %and = and i64 %t, %b
851  store i64 %and, ptr %a
852  ret void
853}
854
855define void @and8mi_legacy(ptr %a) {
856; CHECK-LABEL: and8mi_legacy:
857; CHECK:       # %bb.0: # %entry
858; CHECK-NEXT:    andb $123, (%rdi) # encoding: [0x80,0x27,0x7b]
859; CHECK-NEXT:    retq # encoding: [0xc3]
860;
861; NF-LABEL: and8mi_legacy:
862; NF:       # %bb.0: # %entry
863; NF-NEXT:    andb $123, (%rdi) # encoding: [0x80,0x27,0x7b]
864; NF-NEXT:    retq # encoding: [0xc3]
865entry:
866  %t= load i8, ptr %a
867  %and = and i8 %t, 123
868  store i8 %and, ptr %a
869  ret void
870}
871
872define void @and16mi_legacy(ptr %a) {
873; CHECK-LABEL: and16mi_legacy:
874; CHECK:       # %bb.0: # %entry
875; CHECK-NEXT:    andw $1234, (%rdi) # encoding: [0x66,0x81,0x27,0xd2,0x04]
876; CHECK-NEXT:    # imm = 0x4D2
877; CHECK-NEXT:    retq # encoding: [0xc3]
878;
879; NF-LABEL: and16mi_legacy:
880; NF:       # %bb.0: # %entry
881; NF-NEXT:    andw $1234, (%rdi) # encoding: [0x66,0x81,0x27,0xd2,0x04]
882; NF-NEXT:    # imm = 0x4D2
883; NF-NEXT:    retq # encoding: [0xc3]
884entry:
885  %t= load i16, ptr %a
886  %and = and i16 %t, 1234
887  store i16 %and, ptr %a
888  ret void
889}
890
891define void @and32mi_legacy(ptr %a) {
892; CHECK-LABEL: and32mi_legacy:
893; CHECK:       # %bb.0: # %entry
894; CHECK-NEXT:    andl $123456, (%rdi) # encoding: [0x81,0x27,0x40,0xe2,0x01,0x00]
895; CHECK-NEXT:    # imm = 0x1E240
896; CHECK-NEXT:    retq # encoding: [0xc3]
897;
898; NF-LABEL: and32mi_legacy:
899; NF:       # %bb.0: # %entry
900; NF-NEXT:    andl $123456, (%rdi) # encoding: [0x81,0x27,0x40,0xe2,0x01,0x00]
901; NF-NEXT:    # imm = 0x1E240
902; NF-NEXT:    retq # encoding: [0xc3]
903entry:
904  %t= load i32, ptr %a
905  %and = and i32 %t, 123456
906  store i32 %and, ptr %a
907  ret void
908}
909
910define void @and64mi_legacy(ptr %a) {
911; CHECK-LABEL: and64mi_legacy:
912; CHECK:       # %bb.0: # %entry
913; CHECK-NEXT:    andq $123456, (%rdi) # encoding: [0x48,0x81,0x27,0x40,0xe2,0x01,0x00]
914; CHECK-NEXT:    # imm = 0x1E240
915; CHECK-NEXT:    retq # encoding: [0xc3]
916;
917; NF-LABEL: and64mi_legacy:
918; NF:       # %bb.0: # %entry
919; NF-NEXT:    andq $123456, (%rdi) # encoding: [0x48,0x81,0x27,0x40,0xe2,0x01,0x00]
920; NF-NEXT:    # imm = 0x1E240
921; NF-NEXT:    retq # encoding: [0xc3]
922entry:
923  %t= load i64, ptr %a
924  %and = and i64 %t, 123456
925  store i64 %and, ptr %a
926  ret void
927}
928