1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s 3 4define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind { 5; CHECK-LABEL: adc8rr: 6; CHECK: # %bb.0: 7; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1] 8; CHECK-NEXT: adcb %sil, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x10,0xf7] 9; CHECK-NEXT: retq # encoding: [0xc3] 10 %s = add i8 %a, %b 11 %k = icmp ugt i8 %x, %y 12 %z = zext i1 %k to i8 13 %r = add i8 %s, %z 14 ret i8 %r 15} 16 17define i16 @adc16rr(i16 %a, i16 %b, i16 %x, i16 %y) nounwind { 18; CHECK-LABEL: adc16rr: 19; CHECK: # %bb.0: 20; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1] 21; CHECK-NEXT: adcw %si, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x11,0xf7] 22; CHECK-NEXT: retq # encoding: [0xc3] 23 %s = add i16 %a, %b 24 %k = icmp ugt i16 %x, %y 25 %z = zext i1 %k to i16 26 %r = add i16 %s, %z 27 ret i16 %r 28} 29 30define i32 @adc32rr(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { 31; CHECK-LABEL: adc32rr: 32; CHECK: # %bb.0: 33; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1] 34; CHECK-NEXT: adcl %esi, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x11,0xf7] 35; CHECK-NEXT: retq # encoding: [0xc3] 36 %s = add i32 %a, %b 37 %k = icmp ugt i32 %x, %y 38 %z = zext i1 %k to i32 39 %r = add i32 %s, %z 40 ret i32 %r 41} 42 43define i64 @adc64rr(i64 %a, i64 %b, i64 %x, i64 %y) nounwind { 44; CHECK-LABEL: adc64rr: 45; CHECK: # %bb.0: 46; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1] 47; CHECK-NEXT: adcq %rsi, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x11,0xf7] 48; CHECK-NEXT: retq # encoding: [0xc3] 49 %s = add i64 %a, %b 50 %k = icmp ugt i64 %x, %y 51 %z = zext i1 %k to i64 52 %r = add i64 %s, %z 53 ret i64 %r 54} 55 56define i8 @adc8rm(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { 57; CHECK-LABEL: adc8rm: 58; CHECK: # %bb.0: 59; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1] 60; CHECK-NEXT: adcb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x12,0x3e] 61; CHECK-NEXT: retq # encoding: [0xc3] 62 %b = load i8, ptr %ptr 63 %s = add i8 %a, %b 64 %k = icmp ugt i8 %x, %y 65 %z = zext i1 %k to i8 66 %r = add i8 %s, %z 67 ret i8 %r 68} 69 70define i16 @adc16rm(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { 71; CHECK-LABEL: adc16rm: 72; CHECK: # %bb.0: 73; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1] 74; CHECK-NEXT: adcw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x13,0x3e] 75; CHECK-NEXT: retq # encoding: [0xc3] 76 %b = load i16, ptr %ptr 77 %s = add i16 %a, %b 78 %k = icmp ugt i16 %x, %y 79 %z = zext i1 %k to i16 80 %r = add i16 %s, %z 81 ret i16 %r 82} 83 84define i32 @adc32rm(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { 85; CHECK-LABEL: adc32rm: 86; CHECK: # %bb.0: 87; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1] 88; CHECK-NEXT: adcl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x13,0x3e] 89; CHECK-NEXT: retq # encoding: [0xc3] 90 %b = load i32, ptr %ptr 91 %s = add i32 %a, %b 92 %k = icmp ugt i32 %x, %y 93 %z = zext i1 %k to i32 94 %r = add i32 %s, %z 95 ret i32 %r 96} 97 98define i64 @adc64rm(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { 99; CHECK-LABEL: adc64rm: 100; CHECK: # %bb.0: 101; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1] 102; CHECK-NEXT: adcq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x13,0x3e] 103; CHECK-NEXT: retq # encoding: [0xc3] 104 %b = load i64, ptr %ptr 105 %s = add i64 %a, %b 106 %k = icmp ugt i64 %x, %y 107 %z = zext i1 %k to i64 108 %r = add i64 %s, %z 109 ret i64 %r 110} 111 112define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind { 113; CHECK-LABEL: adc16ri8: 114; CHECK: # %bb.0: 115; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2] 116; CHECK-NEXT: adcw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xd7,0x7b] 117; CHECK-NEXT: retq # encoding: [0xc3] 118 %s = add i16 %a, 123 119 %k = icmp ugt i16 %x, %y 120 %z = zext i1 %k to i16 121 %r = add i16 %s, %z 122 ret i16 %r 123} 124 125define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind { 126; CHECK-LABEL: adc32ri8: 127; CHECK: # %bb.0: 128; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2] 129; CHECK-NEXT: adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xd7,0x7b] 130; CHECK-NEXT: retq # encoding: [0xc3] 131 %s = add i32 %a, 123 132 %k = icmp ugt i32 %x, %y 133 %z = zext i1 %k to i32 134 %r = add i32 %s, %z 135 ret i32 %r 136} 137 138define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind { 139; CHECK-LABEL: adc64ri8: 140; CHECK: # %bb.0: 141; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2] 142; CHECK-NEXT: adcq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xd7,0x7b] 143; CHECK-NEXT: retq # encoding: [0xc3] 144 %s = add i64 %a, 123 145 %k = icmp ugt i64 %x, %y 146 %z = zext i1 %k to i64 147 %r = add i64 %s, %z 148 ret i64 %r 149} 150 151define i8 @adc8ri(i8 %a, i8 %x, i8 %y) nounwind { 152; CHECK-LABEL: adc8ri: 153; CHECK: # %bb.0: 154; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2] 155; CHECK-NEXT: adcb $123, %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0xd7,0x7b] 156; CHECK-NEXT: retq # encoding: [0xc3] 157 %s = add i8 %a, 123 158 %k = icmp ugt i8 %x, %y 159 %z = zext i1 %k to i8 160 %r = add i8 %s, %z 161 ret i8 %r 162} 163 164define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind { 165; CHECK-LABEL: adc16ri: 166; CHECK: # %bb.0: 167; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2] 168; CHECK-NEXT: adcw $1234, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0xd2,0x04] 169; CHECK-NEXT: # imm = 0x4D2 170; CHECK-NEXT: retq # encoding: [0xc3] 171 %s = add i16 %a, 1234 172 %k = icmp ugt i16 %x, %y 173 %z = zext i1 %k to i16 174 %r = add i16 %s, %z 175 ret i16 %r 176} 177 178define i32 @adc32ri(i32 %a, i32 %x, i32 %y) nounwind { 179; CHECK-LABEL: adc32ri: 180; CHECK: # %bb.0: 181; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2] 182; CHECK-NEXT: adcl $123456, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00] 183; CHECK-NEXT: # imm = 0x1E240 184; CHECK-NEXT: retq # encoding: [0xc3] 185 %s = add i32 %a, 123456 186 %k = icmp ugt i32 %x, %y 187 %z = zext i1 %k to i32 188 %r = add i32 %s, %z 189 ret i32 %r 190} 191 192define i64 @adc64ri(i64 %a, i64 %x, i64 %y) nounwind { 193; CHECK-LABEL: adc64ri: 194; CHECK: # %bb.0: 195; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2] 196; CHECK-NEXT: adcq $123456, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x40,0xe2,0x01,0x00] 197; CHECK-NEXT: # imm = 0x1E240 198; CHECK-NEXT: retq # encoding: [0xc3] 199 %s = add i64 %a, 123456 200 %k = icmp ugt i64 %x, %y 201 %z = zext i1 %k to i64 202 %r = add i64 %s, %z 203 ret i64 %r 204} 205 206define i8 @adc8mr(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { 207; CHECK-LABEL: adc8mr: 208; CHECK: # %bb.0: 209; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1] 210; CHECK-NEXT: adcb (%rsi), %dil, %al # encoding: [0x62,0xf4,0x7c,0x18,0x12,0x3e] 211; CHECK-NEXT: retq # encoding: [0xc3] 212 %b = load i8, ptr %ptr 213 %s = add i8 %b, %a 214 %k = icmp ugt i8 %x, %y 215 %z = zext i1 %k to i8 216 %r = add i8 %s, %z 217 ret i8 %r 218} 219 220define i16 @adc16mr(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { 221; CHECK-LABEL: adc16mr: 222; CHECK: # %bb.0: 223; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1] 224; CHECK-NEXT: adcw (%rsi), %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x13,0x3e] 225; CHECK-NEXT: retq # encoding: [0xc3] 226 %b = load i16, ptr %ptr 227 %s = add i16 %b, %a 228 %k = icmp ugt i16 %x, %y 229 %z = zext i1 %k to i16 230 %r = add i16 %s, %z 231 ret i16 %r 232} 233 234define i32 @adc32mr(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { 235; CHECK-LABEL: adc32mr: 236; CHECK: # %bb.0: 237; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1] 238; CHECK-NEXT: adcl (%rsi), %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x13,0x3e] 239; CHECK-NEXT: retq # encoding: [0xc3] 240 %b = load i32, ptr %ptr 241 %s = add i32 %b, %a 242 %k = icmp ugt i32 %x, %y 243 %z = zext i1 %k to i32 244 %r = add i32 %s, %z 245 ret i32 %r 246} 247 248define i64 @adc64mr(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { 249; CHECK-LABEL: adc64mr: 250; CHECK: # %bb.0: 251; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1] 252; CHECK-NEXT: adcq (%rsi), %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x13,0x3e] 253; CHECK-NEXT: retq # encoding: [0xc3] 254 %b = load i64, ptr %ptr 255 %s = add i64 %b, %a 256 %k = icmp ugt i64 %x, %y 257 %z = zext i1 %k to i64 258 %r = add i64 %s, %z 259 ret i64 %r 260} 261 262define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind { 263; CHECK-LABEL: adc16mi8: 264; CHECK: # %bb.0: 265; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2] 266; CHECK-NEXT: adcw $123, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x17,0x7b] 267; CHECK-NEXT: retq # encoding: [0xc3] 268 %a = load i16, ptr %ptr 269 %s = add i16 %a, 123 270 %k = icmp ugt i16 %x, %y 271 %z = zext i1 %k to i16 272 %r = add i16 %s, %z 273 ret i16 %r 274} 275 276define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind { 277; CHECK-LABEL: adc32mi8: 278; CHECK: # %bb.0: 279; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2] 280; CHECK-NEXT: adcl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x17,0x7b] 281; CHECK-NEXT: retq # encoding: [0xc3] 282 %a = load i32, ptr %ptr 283 %s = add i32 %a, 123 284 %k = icmp ugt i32 %x, %y 285 %z = zext i1 %k to i32 286 %r = add i32 %s, %z 287 ret i32 %r 288} 289 290define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind { 291; CHECK-LABEL: adc64mi8: 292; CHECK: # %bb.0: 293; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2] 294; CHECK-NEXT: adcq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x17,0x7b] 295; CHECK-NEXT: retq # encoding: [0xc3] 296 %a = load i64, ptr %ptr 297 %s = add i64 %a, 123 298 %k = icmp ugt i64 %x, %y 299 %z = zext i1 %k to i64 300 %r = add i64 %s, %z 301 ret i64 %r 302} 303 304define i8 @adc8mi(ptr %ptr, i8 %x, i8 %y) nounwind { 305; CHECK-LABEL: adc8mi: 306; CHECK: # %bb.0: 307; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2] 308; CHECK-NEXT: adcb $123, (%rdi), %al # encoding: [0x62,0xf4,0x7c,0x18,0x80,0x17,0x7b] 309; CHECK-NEXT: retq # encoding: [0xc3] 310 %a = load i8, ptr %ptr 311 %s = add i8 %a, 123 312 %k = icmp ugt i8 %x, %y 313 %z = zext i1 %k to i8 314 %r = add i8 %s, %z 315 ret i8 %r 316} 317 318define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind { 319; CHECK-LABEL: adc16mi: 320; CHECK: # %bb.0: 321; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2] 322; CHECK-NEXT: adcw $1234, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0xd2,0x04] 323; CHECK-NEXT: # imm = 0x4D2 324; CHECK-NEXT: retq # encoding: [0xc3] 325 %a = load i16, ptr %ptr 326 %s = add i16 %a, 1234 327 %k = icmp ugt i16 %x, %y 328 %z = zext i1 %k to i16 329 %r = add i16 %s, %z 330 ret i16 %r 331} 332 333define i32 @adc32mi(ptr %ptr, i32 %x, i32 %y) nounwind { 334; CHECK-LABEL: adc32mi: 335; CHECK: # %bb.0: 336; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2] 337; CHECK-NEXT: adcl $123456, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x40,0xe2,0x01,0x00] 338; CHECK-NEXT: # imm = 0x1E240 339; CHECK-NEXT: retq # encoding: [0xc3] 340 %a = load i32, ptr %ptr 341 %s = add i32 %a, 123456 342 %k = icmp ugt i32 %x, %y 343 %z = zext i1 %k to i32 344 %r = add i32 %s, %z 345 ret i32 %r 346} 347 348define i64 @adc64mi(ptr %ptr, i64 %x, i64 %y) nounwind { 349; CHECK-LABEL: adc64mi: 350; CHECK: # %bb.0: 351; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2] 352; CHECK-NEXT: adcq $123456, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x40,0xe2,0x01,0x00] 353; CHECK-NEXT: # imm = 0x1E240 354; CHECK-NEXT: retq # encoding: [0xc3] 355 %a = load i64, ptr %ptr 356 %s = add i64 %a, 123456 357 %k = icmp ugt i64 %x, %y 358 %z = zext i1 %k to i64 359 %r = add i64 %s, %z 360 ret i64 %r 361} 362 363define void @adc8mr_legacy(i8 %a, ptr %ptr, i8 %x, i8 %y) nounwind { 364; CHECK-LABEL: adc8mr_legacy: 365; CHECK: # %bb.0: 366; CHECK-NEXT: cmpb %dl, %cl # encoding: [0x38,0xd1] 367; CHECK-NEXT: adcb %dil, (%rsi) # encoding: [0x40,0x10,0x3e] 368; CHECK-NEXT: retq # encoding: [0xc3] 369 %b = load i8, ptr %ptr 370 %s = add i8 %b, %a 371 %k = icmp ugt i8 %x, %y 372 %z = zext i1 %k to i8 373 %r = add i8 %s, %z 374 store i8 %r, ptr %ptr 375 ret void 376} 377 378define void @adc16mr_legacy(i16 %a, ptr %ptr, i16 %x, i16 %y) nounwind { 379; CHECK-LABEL: adc16mr_legacy: 380; CHECK: # %bb.0: 381; CHECK-NEXT: cmpw %dx, %cx # encoding: [0x66,0x39,0xd1] 382; CHECK-NEXT: adcw %di, (%rsi) # encoding: [0x66,0x11,0x3e] 383; CHECK-NEXT: retq # encoding: [0xc3] 384 %b = load i16, ptr %ptr 385 %s = add i16 %b, %a 386 %k = icmp ugt i16 %x, %y 387 %z = zext i1 %k to i16 388 %r = add i16 %s, %z 389 store i16 %r, ptr %ptr 390 ret void 391} 392 393define void @adc32mr_legacy(i32 %a, ptr %ptr, i32 %x, i32 %y) nounwind { 394; CHECK-LABEL: adc32mr_legacy: 395; CHECK: # %bb.0: 396; CHECK-NEXT: cmpl %edx, %ecx # encoding: [0x39,0xd1] 397; CHECK-NEXT: adcl %edi, (%rsi) # encoding: [0x11,0x3e] 398; CHECK-NEXT: retq # encoding: [0xc3] 399 %b = load i32, ptr %ptr 400 %s = add i32 %b, %a 401 %k = icmp ugt i32 %x, %y 402 %z = zext i1 %k to i32 403 %r = add i32 %s, %z 404 store i32 %r, ptr %ptr 405 ret void 406} 407 408define void @adc64mr_legacy(i64 %a, ptr %ptr, i64 %x, i64 %y) nounwind { 409; CHECK-LABEL: adc64mr_legacy: 410; CHECK: # %bb.0: 411; CHECK-NEXT: cmpq %rdx, %rcx # encoding: [0x48,0x39,0xd1] 412; CHECK-NEXT: adcq %rdi, (%rsi) # encoding: [0x48,0x11,0x3e] 413; CHECK-NEXT: retq # encoding: [0xc3] 414 %b = load i64, ptr %ptr 415 %s = add i64 %b, %a 416 %k = icmp ugt i64 %x, %y 417 %z = zext i1 %k to i64 418 %r = add i64 %s, %z 419 store i64 %r, ptr %ptr 420 ret void 421} 422 423define void @adc8mi_legacy(ptr %ptr, i8 %x, i8 %y) nounwind { 424; CHECK-LABEL: adc8mi_legacy: 425; CHECK: # %bb.0: 426; CHECK-NEXT: cmpb %sil, %dl # encoding: [0x40,0x38,0xf2] 427; CHECK-NEXT: adcb $123, (%rdi) # encoding: [0x80,0x17,0x7b] 428; CHECK-NEXT: retq # encoding: [0xc3] 429 %a = load i8, ptr %ptr 430 %s = add i8 %a, 123 431 %k = icmp ugt i8 %x, %y 432 %z = zext i1 %k to i8 433 %r = add i8 %s, %z 434 store i8 %r, ptr %ptr 435 ret void 436} 437 438define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind { 439; CHECK-LABEL: adc16mi_legacy: 440; CHECK: # %bb.0: 441; CHECK-NEXT: cmpw %si, %dx # encoding: [0x66,0x39,0xf2] 442; CHECK-NEXT: adcw $1234, (%rdi) # encoding: [0x66,0x81,0x17,0xd2,0x04] 443; CHECK-NEXT: # imm = 0x4D2 444; CHECK-NEXT: retq # encoding: [0xc3] 445 %a = load i16, ptr %ptr 446 %s = add i16 %a, 1234 447 %k = icmp ugt i16 %x, %y 448 %z = zext i1 %k to i16 449 %r = add i16 %s, %z 450 store i16 %r, ptr %ptr 451 ret void 452} 453 454define void @adc32mi_legacy(ptr %ptr, i32 %x, i32 %y) nounwind { 455; CHECK-LABEL: adc32mi_legacy: 456; CHECK: # %bb.0: 457; CHECK-NEXT: cmpl %esi, %edx # encoding: [0x39,0xf2] 458; CHECK-NEXT: adcl $123456, (%rdi) # encoding: [0x81,0x17,0x40,0xe2,0x01,0x00] 459; CHECK-NEXT: # imm = 0x1E240 460; CHECK-NEXT: retq # encoding: [0xc3] 461 %a = load i32, ptr %ptr 462 %s = add i32 %a, 123456 463 %k = icmp ugt i32 %x, %y 464 %z = zext i1 %k to i32 465 %r = add i32 %s, %z 466 store i32 %r, ptr %ptr 467 ret void 468} 469 470define void @adc64mi_legacy(ptr %ptr, i64 %x, i64 %y) nounwind { 471; CHECK-LABEL: adc64mi_legacy: 472; CHECK: # %bb.0: 473; CHECK-NEXT: cmpq %rsi, %rdx # encoding: [0x48,0x39,0xf2] 474; CHECK-NEXT: adcq $123456, (%rdi) # encoding: [0x48,0x81,0x17,0x40,0xe2,0x01,0x00] 475; CHECK-NEXT: # imm = 0x1E240 476; CHECK-NEXT: retq # encoding: [0xc3] 477 %a = load i64, ptr %ptr 478 %s = add i64 %a, 123456 479 %k = icmp ugt i64 %x, %y 480 %z = zext i1 %k to i64 481 %r = add i64 %s, %z 482 store i64 %r, ptr %ptr 483 ret void 484} 485