1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL 3 4--- | 5 6 define i8 @test_i8(i32 %a, i8 %f, i8 %t) { 7 entry: 8 %cmp = icmp sgt i32 %a, 0 9 br i1 %cmp, label %cond.true, label %cond.false 10 11 cond.true: ; preds = %entry 12 br label %cond.end 13 14 cond.false: ; preds = %entry 15 br label %cond.end 16 17 cond.end: ; preds = %cond.false, %cond.true 18 %cond = phi i8 [ %f, %cond.true ], [ %t, %cond.false ] 19 ret i8 %cond 20 } 21 22 define i16 @test_i16(i32 %a, i16 %f, i16 %t) { 23 entry: 24 %cmp = icmp sgt i32 %a, 0 25 br i1 %cmp, label %cond.true, label %cond.false 26 27 cond.true: ; preds = %entry 28 br label %cond.end 29 30 cond.false: ; preds = %entry 31 br label %cond.end 32 33 cond.end: ; preds = %cond.false, %cond.true 34 %cond = phi i16 [ %f, %cond.true ], [ %t, %cond.false ] 35 ret i16 %cond 36 } 37 38 define i32 @test_i32(i32 %a, i32 %f, i32 %t) { 39 entry: 40 %cmp = icmp sgt i32 %a, 0 41 br i1 %cmp, label %cond.true, label %cond.false 42 43 cond.true: ; preds = %entry 44 br label %cond.end 45 46 cond.false: ; preds = %entry 47 br label %cond.end 48 49 cond.end: ; preds = %cond.false, %cond.true 50 %cond = phi i32 [ %f, %cond.true ], [ %t, %cond.false ] 51 ret i32 %cond 52 } 53 54 define i64 @test_i64(i32 %a, i64 %f, i64 %t) { 55 entry: 56 %cmp = icmp sgt i32 %a, 0 57 br i1 %cmp, label %cond.true, label %cond.false 58 59 cond.true: ; preds = %entry 60 br label %cond.end 61 62 cond.false: ; preds = %entry 63 br label %cond.end 64 65 cond.end: ; preds = %cond.false, %cond.true 66 %cond = phi i64 [ %f, %cond.true ], [ %t, %cond.false ] 67 ret i64 %cond 68 } 69 70 define float @test_float(i32 %a, float %f, float %t) { 71 entry: 72 %cmp = icmp sgt i32 %a, 0 73 br i1 %cmp, label %cond.true, label %cond.false 74 75 cond.true: ; preds = %entry 76 br label %cond.end 77 78 cond.false: ; preds = %entry 79 br label %cond.end 80 81 cond.end: ; preds = %cond.false, %cond.true 82 %cond = phi float [ %f, %cond.true ], [ %t, %cond.false ] 83 ret float %cond 84 } 85 86 define double @test_double(i32 %a, double %f, double %t) { 87 entry: 88 %cmp = icmp sgt i32 %a, 0 89 br i1 %cmp, label %cond.true, label %cond.false 90 91 cond.true: ; preds = %entry 92 br label %cond.end 93 94 cond.false: ; preds = %entry 95 br label %cond.end 96 97 cond.end: ; preds = %cond.false, %cond.true 98 %cond = phi double [ %f, %cond.true ], [ %t, %cond.false ] 99 ret double %cond 100 } 101 102... 103--- 104name: test_i8 105alignment: 16 106legalized: true 107regBankSelected: true 108tracksRegLiveness: true 109registers: 110 - { id: 0, class: gpr, preferred-register: '' } 111 - { id: 1, class: gpr, preferred-register: '' } 112 - { id: 2, class: gpr, preferred-register: '' } 113 - { id: 3, class: gpr, preferred-register: '' } 114 - { id: 4, class: gpr, preferred-register: '' } 115 - { id: 5, class: gpr, preferred-register: '' } 116 - { id: 6, class: gpr, preferred-register: '' } 117 - { id: 7, class: gpr, preferred-register: '' } 118body: | 119 ; ALL-LABEL: name: test_i8 120 ; ALL: bb.0.entry: 121 ; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) 122 ; ALL-NEXT: liveins: $edi, $edx, $esi 123 ; ALL-NEXT: {{ $}} 124 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 125 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 126 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 127 ; ALL-NEXT: [[COPY3:%[0-9]+]]:gr32 = COPY $edx 128 ; ALL-NEXT: [[COPY4:%[0-9]+]]:gr8 = COPY [[COPY3]].sub_8bit 129 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 130 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags 131 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags 132 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags 133 ; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags 134 ; ALL-NEXT: {{ $}} 135 ; ALL-NEXT: bb.1.cond.false: 136 ; ALL-NEXT: successors: %bb.2(0x80000000) 137 ; ALL-NEXT: {{ $}} 138 ; ALL-NEXT: bb.2.cond.end: 139 ; ALL-NEXT: [[PHI:%[0-9]+]]:gr8 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0 140 ; ALL-NEXT: $al = COPY [[PHI]] 141 ; ALL-NEXT: RET 0, implicit $al 142 bb.1.entry: 143 successors: %bb.3(0x40000000), %bb.2(0x40000000) 144 liveins: $edi, $edx, $esi 145 146 %0:gpr(s32) = COPY $edi 147 %3:gpr(s32) = COPY $esi 148 %1:gpr(s8) = G_TRUNC %3(s32) 149 %4:gpr(s32) = COPY $edx 150 %2:gpr(s8) = G_TRUNC %4(s32) 151 %5:gpr(s32) = G_CONSTANT i32 0 152 %8:gpr(s8) = G_ICMP intpred(sgt), %0(s32), %5 153 %6:gpr(s1) = G_TRUNC %8(s8) 154 G_BRCOND %6(s1), %bb.3 155 156 bb.2.cond.false: 157 successors: %bb.3(0x80000000) 158 159 160 bb.3.cond.end: 161 %7:gpr(s8) = G_PHI %2(s8), %bb.2, %1(s8), %bb.1 162 $al = COPY %7(s8) 163 RET 0, implicit $al 164 165... 166--- 167name: test_i16 168alignment: 16 169legalized: true 170regBankSelected: true 171tracksRegLiveness: true 172registers: 173 - { id: 0, class: gpr, preferred-register: '' } 174 - { id: 1, class: gpr, preferred-register: '' } 175 - { id: 2, class: gpr, preferred-register: '' } 176 - { id: 3, class: gpr, preferred-register: '' } 177 - { id: 4, class: gpr, preferred-register: '' } 178 - { id: 5, class: gpr, preferred-register: '' } 179 - { id: 6, class: gpr, preferred-register: '' } 180 - { id: 7, class: gpr, preferred-register: '' } 181body: | 182 ; ALL-LABEL: name: test_i16 183 ; ALL: bb.0.entry: 184 ; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) 185 ; ALL-NEXT: liveins: $edi, $edx, $esi 186 ; ALL-NEXT: {{ $}} 187 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 188 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 189 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY1]].sub_16bit 190 ; ALL-NEXT: [[COPY3:%[0-9]+]]:gr32 = COPY $edx 191 ; ALL-NEXT: [[COPY4:%[0-9]+]]:gr16 = COPY [[COPY3]].sub_16bit 192 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 193 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags 194 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags 195 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags 196 ; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags 197 ; ALL-NEXT: {{ $}} 198 ; ALL-NEXT: bb.1.cond.false: 199 ; ALL-NEXT: successors: %bb.2(0x80000000) 200 ; ALL-NEXT: {{ $}} 201 ; ALL-NEXT: bb.2.cond.end: 202 ; ALL-NEXT: [[PHI:%[0-9]+]]:gr16 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0 203 ; ALL-NEXT: $ax = COPY [[PHI]] 204 ; ALL-NEXT: RET 0, implicit $ax 205 bb.1.entry: 206 successors: %bb.3(0x40000000), %bb.2(0x40000000) 207 liveins: $edi, $edx, $esi 208 209 %0:gpr(s32) = COPY $edi 210 %3:gpr(s32) = COPY $esi 211 %1:gpr(s16) = G_TRUNC %3(s32) 212 %4:gpr(s32) = COPY $edx 213 %2:gpr(s16) = G_TRUNC %4(s32) 214 %5:gpr(s32) = G_CONSTANT i32 0 215 %8:gpr(s8) = G_ICMP intpred(sgt), %0(s32), %5 216 %6:gpr(s1) = G_TRUNC %8(s8) 217 G_BRCOND %6(s1), %bb.3 218 219 bb.2.cond.false: 220 successors: %bb.3(0x80000000) 221 222 223 bb.3.cond.end: 224 %7:gpr(s16) = G_PHI %2(s16), %bb.2, %1(s16), %bb.1 225 $ax = COPY %7(s16) 226 RET 0, implicit $ax 227 228... 229--- 230name: test_i32 231alignment: 16 232legalized: true 233regBankSelected: true 234tracksRegLiveness: true 235registers: 236 - { id: 0, class: gpr, preferred-register: '' } 237 - { id: 1, class: gpr, preferred-register: '' } 238 - { id: 2, class: gpr, preferred-register: '' } 239 - { id: 3, class: gpr, preferred-register: '' } 240 - { id: 4, class: gpr, preferred-register: '' } 241 - { id: 5, class: gpr, preferred-register: '' } 242 - { id: 6, class: gpr, preferred-register: '' } 243body: | 244 ; ALL-LABEL: name: test_i32 245 ; ALL: bb.0.entry: 246 ; ALL-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 247 ; ALL-NEXT: liveins: $edi, $edx, $esi 248 ; ALL-NEXT: {{ $}} 249 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 250 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 251 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr32 = COPY $edx 252 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 253 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags 254 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags 255 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags 256 ; ALL-NEXT: JCC_1 %bb.1, 5, implicit $eflags 257 ; ALL-NEXT: JMP_1 %bb.2 258 ; ALL-NEXT: {{ $}} 259 ; ALL-NEXT: bb.1.cond.true: 260 ; ALL-NEXT: successors: %bb.3(0x80000000) 261 ; ALL-NEXT: {{ $}} 262 ; ALL-NEXT: JMP_1 %bb.3 263 ; ALL-NEXT: {{ $}} 264 ; ALL-NEXT: bb.2.cond.false: 265 ; ALL-NEXT: successors: %bb.3(0x80000000) 266 ; ALL-NEXT: {{ $}} 267 ; ALL-NEXT: bb.3.cond.end: 268 ; ALL-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2 269 ; ALL-NEXT: $eax = COPY [[PHI]] 270 ; ALL-NEXT: RET 0, implicit $eax 271 bb.1.entry: 272 successors: %bb.2(0x40000000), %bb.3(0x40000000) 273 liveins: $edi, $edx, $esi 274 275 %0(s32) = COPY $edi 276 %1(s32) = COPY $esi 277 %2(s32) = COPY $edx 278 %3(s32) = G_CONSTANT i32 0 279 %6(s8) = G_ICMP intpred(sgt), %0(s32), %3 280 %4:gpr(s1) = G_TRUNC %6(s8) 281 G_BRCOND %4(s1), %bb.2 282 G_BR %bb.3 283 284 bb.2.cond.true: 285 successors: %bb.4(0x80000000) 286 287 G_BR %bb.4 288 289 bb.3.cond.false: 290 successors: %bb.4(0x80000000) 291 292 293 bb.4.cond.end: 294 %5(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3 295 $eax = COPY %5(s32) 296 RET 0, implicit $eax 297 298... 299--- 300name: test_i64 301alignment: 16 302legalized: true 303regBankSelected: true 304tracksRegLiveness: true 305registers: 306 - { id: 0, class: gpr, preferred-register: '' } 307 - { id: 1, class: gpr, preferred-register: '' } 308 - { id: 2, class: gpr, preferred-register: '' } 309 - { id: 3, class: gpr, preferred-register: '' } 310 - { id: 4, class: gpr, preferred-register: '' } 311 - { id: 5, class: gpr, preferred-register: '' } 312 - { id: 6, class: gpr, preferred-register: '' } 313body: | 314 ; ALL-LABEL: name: test_i64 315 ; ALL: bb.0.entry: 316 ; ALL-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) 317 ; ALL-NEXT: liveins: $edi, $rdx, $rsi 318 ; ALL-NEXT: {{ $}} 319 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 320 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rsi 321 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr64 = COPY $rdx 322 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 323 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags 324 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags 325 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags 326 ; ALL-NEXT: JCC_1 %bb.1, 5, implicit $eflags 327 ; ALL-NEXT: JMP_1 %bb.2 328 ; ALL-NEXT: {{ $}} 329 ; ALL-NEXT: bb.1.cond.true: 330 ; ALL-NEXT: successors: %bb.3(0x80000000) 331 ; ALL-NEXT: {{ $}} 332 ; ALL-NEXT: JMP_1 %bb.3 333 ; ALL-NEXT: {{ $}} 334 ; ALL-NEXT: bb.2.cond.false: 335 ; ALL-NEXT: successors: %bb.3(0x80000000) 336 ; ALL-NEXT: {{ $}} 337 ; ALL-NEXT: bb.3.cond.end: 338 ; ALL-NEXT: [[PHI:%[0-9]+]]:gr64 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2 339 ; ALL-NEXT: $rax = COPY [[PHI]] 340 ; ALL-NEXT: RET 0, implicit $rax 341 bb.1.entry: 342 successors: %bb.2(0x40000000), %bb.3(0x40000000) 343 liveins: $edi, $rdx, $rsi 344 345 %0(s32) = COPY $edi 346 %1(s64) = COPY $rsi 347 %2(s64) = COPY $rdx 348 %3(s32) = G_CONSTANT i32 0 349 %6(s8) = G_ICMP intpred(sgt), %0(s32), %3 350 %4:gpr(s1) = G_TRUNC %6(s8) 351 G_BRCOND %4(s1), %bb.2 352 G_BR %bb.3 353 354 bb.2.cond.true: 355 successors: %bb.4(0x80000000) 356 357 G_BR %bb.4 358 359 bb.3.cond.false: 360 successors: %bb.4(0x80000000) 361 362 363 bb.4.cond.end: 364 %5(s64) = G_PHI %1(s64), %bb.2, %2(s64), %bb.3 365 $rax = COPY %5(s64) 366 RET 0, implicit $rax 367 368... 369--- 370name: test_float 371alignment: 16 372legalized: true 373regBankSelected: true 374tracksRegLiveness: true 375registers: 376 - { id: 0, class: gpr, preferred-register: '' } 377 - { id: 1, class: vecr, preferred-register: '' } 378 - { id: 2, class: vecr, preferred-register: '' } 379 - { id: 3, class: vecr, preferred-register: '' } 380 - { id: 4, class: vecr, preferred-register: '' } 381 - { id: 5, class: gpr, preferred-register: '' } 382 - { id: 6, class: gpr, preferred-register: '' } 383 - { id: 7, class: vecr, preferred-register: '' } 384 - { id: 8, class: vecr, preferred-register: '' } 385liveins: 386fixedStack: 387stack: 388constants: 389body: | 390 ; ALL-LABEL: name: test_float 391 ; ALL: bb.0.entry: 392 ; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) 393 ; ALL-NEXT: liveins: $edi, $xmm0, $xmm1 394 ; ALL-NEXT: {{ $}} 395 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 396 ; ALL-NEXT: [[COPY1:%[0-9]+]]:vr128 = COPY $xmm0 397 ; ALL-NEXT: [[COPY2:%[0-9]+]]:fr32 = COPY [[COPY1]] 398 ; ALL-NEXT: [[COPY3:%[0-9]+]]:vr128 = COPY $xmm1 399 ; ALL-NEXT: [[COPY4:%[0-9]+]]:fr32 = COPY [[COPY3]] 400 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 401 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags 402 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags 403 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags 404 ; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags 405 ; ALL-NEXT: {{ $}} 406 ; ALL-NEXT: bb.1.cond.false: 407 ; ALL-NEXT: successors: %bb.2(0x80000000) 408 ; ALL-NEXT: {{ $}} 409 ; ALL-NEXT: bb.2.cond.end: 410 ; ALL-NEXT: [[PHI:%[0-9]+]]:fr32 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0 411 ; ALL-NEXT: [[COPY5:%[0-9]+]]:vr128 = COPY [[PHI]] 412 ; ALL-NEXT: $xmm0 = COPY [[COPY5]] 413 ; ALL-NEXT: RET 0, implicit $xmm0 414 bb.1.entry: 415 successors: %bb.3(0x40000000), %bb.2(0x40000000) 416 liveins: $edi, $xmm0, $xmm1 417 418 %0:gpr(s32) = COPY $edi 419 %3:vecr(s128) = COPY $xmm0 420 %1:vecr(s32) = G_TRUNC %3(s128) 421 %4:vecr(s128) = COPY $xmm1 422 %2:vecr(s32) = G_TRUNC %4(s128) 423 %5:gpr(s32) = G_CONSTANT i32 0 424 %9:gpr(s8) = G_ICMP intpred(sgt), %0(s32), %5 425 %6:gpr(s1) = G_TRUNC %9(s8) 426 G_BRCOND %6(s1), %bb.3 427 428 bb.2.cond.false: 429 successors: %bb.3(0x80000000) 430 431 bb.3.cond.end: 432 %7:vecr(s32) = G_PHI %2(s32), %bb.2, %1(s32), %bb.1 433 %8:vecr(s128) = G_ANYEXT %7(s32) 434 $xmm0 = COPY %8(s128) 435 RET 0, implicit $xmm0 436 437... 438--- 439name: test_double 440alignment: 16 441legalized: true 442regBankSelected: true 443tracksRegLiveness: true 444registers: 445 - { id: 0, class: gpr, preferred-register: '' } 446 - { id: 1, class: vecr, preferred-register: '' } 447 - { id: 2, class: vecr, preferred-register: '' } 448 - { id: 3, class: vecr, preferred-register: '' } 449 - { id: 4, class: vecr, preferred-register: '' } 450 - { id: 5, class: gpr, preferred-register: '' } 451 - { id: 6, class: gpr, preferred-register: '' } 452 - { id: 7, class: vecr, preferred-register: '' } 453 - { id: 8, class: vecr, preferred-register: '' } 454body: | 455 ; ALL-LABEL: name: test_double 456 ; ALL: bb.0.entry: 457 ; ALL-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) 458 ; ALL-NEXT: liveins: $edi, $xmm0, $xmm1 459 ; ALL-NEXT: {{ $}} 460 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 461 ; ALL-NEXT: [[COPY1:%[0-9]+]]:vr128 = COPY $xmm0 462 ; ALL-NEXT: [[COPY2:%[0-9]+]]:fr64 = COPY [[COPY1]] 463 ; ALL-NEXT: [[COPY3:%[0-9]+]]:vr128 = COPY $xmm1 464 ; ALL-NEXT: [[COPY4:%[0-9]+]]:fr64 = COPY [[COPY3]] 465 ; ALL-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags 466 ; ALL-NEXT: CMP32rr [[COPY]], [[MOV32r0_]], implicit-def $eflags 467 ; ALL-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 15, implicit $eflags 468 ; ALL-NEXT: TEST8ri [[SETCCr]], 1, implicit-def $eflags 469 ; ALL-NEXT: JCC_1 %bb.2, 5, implicit $eflags 470 ; ALL-NEXT: {{ $}} 471 ; ALL-NEXT: bb.1.cond.false: 472 ; ALL-NEXT: successors: %bb.2(0x80000000) 473 ; ALL-NEXT: {{ $}} 474 ; ALL-NEXT: bb.2.cond.end: 475 ; ALL-NEXT: [[PHI:%[0-9]+]]:fr64 = PHI [[COPY4]], %bb.1, [[COPY2]], %bb.0 476 ; ALL-NEXT: [[COPY5:%[0-9]+]]:vr128 = COPY [[PHI]] 477 ; ALL-NEXT: $xmm0 = COPY [[COPY5]] 478 ; ALL-NEXT: RET 0, implicit $xmm0 479 bb.1.entry: 480 successors: %bb.3(0x40000000), %bb.2(0x40000000) 481 liveins: $edi, $xmm0, $xmm1 482 483 %0:gpr(s32) = COPY $edi 484 %3:vecr(s128) = COPY $xmm0 485 %1:vecr(s64) = G_TRUNC %3(s128) 486 %4:vecr(s128) = COPY $xmm1 487 %2:vecr(s64) = G_TRUNC %4(s128) 488 %5:gpr(s32) = G_CONSTANT i32 0 489 %9:gpr(s8) = G_ICMP intpred(sgt), %0(s32), %5 490 %6:gpr(s1) = G_TRUNC %9(s8) 491 G_BRCOND %6(s1), %bb.3 492 493 bb.2.cond.false: 494 successors: %bb.3(0x80000000) 495 496 bb.3.cond.end: 497 %7:vecr(s64) = G_PHI %2(s64), %bb.2, %1(s64), %bb.1 498 %8:vecr(s128) = G_ANYEXT %7(s64) 499 $xmm0 = COPY %8(s128) 500 RET 0, implicit $xmm0 501 502... 503