1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 3# RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s 4 5--- | 6 7 define i1 @fcmp_float_oeq(float %x, float %y) { 8 %1 = fcmp oeq float %x, %y 9 ret i1 %1 10 } 11 12 define i1 @fcmp_float_ogt(float %x, float %y) { 13 %1 = fcmp ogt float %x, %y 14 ret i1 %1 15 } 16 17 define i1 @fcmp_float_oge(float %x, float %y) { 18 %1 = fcmp oge float %x, %y 19 ret i1 %1 20 } 21 22 define i1 @fcmp_float_olt(float %x, float %y) { 23 %1 = fcmp olt float %x, %y 24 ret i1 %1 25 } 26 27 define i1 @fcmp_float_ole(float %x, float %y) { 28 %1 = fcmp ole float %x, %y 29 ret i1 %1 30 } 31 32 define i1 @fcmp_float_one(float %x, float %y) { 33 %1 = fcmp one float %x, %y 34 ret i1 %1 35 } 36 37 define i1 @fcmp_float_ord(float %x, float %y) { 38 %1 = fcmp ord float %x, %y 39 ret i1 %1 40 } 41 42 define i1 @fcmp_float_uno(float %x, float %y) { 43 %1 = fcmp uno float %x, %y 44 ret i1 %1 45 } 46 47 define i1 @fcmp_float_ueq(float %x, float %y) { 48 %1 = fcmp ueq float %x, %y 49 ret i1 %1 50 } 51 52 define i1 @fcmp_float_ugt(float %x, float %y) { 53 %1 = fcmp ugt float %x, %y 54 ret i1 %1 55 } 56 57 define i1 @fcmp_float_uge(float %x, float %y) { 58 %1 = fcmp uge float %x, %y 59 ret i1 %1 60 } 61 62 define i1 @fcmp_float_ult(float %x, float %y) { 63 %1 = fcmp ult float %x, %y 64 ret i1 %1 65 } 66 67 define i1 @fcmp_float_ule(float %x, float %y) { 68 %1 = fcmp ule float %x, %y 69 ret i1 %1 70 } 71 72 define i1 @fcmp_float_une(float %x, float %y) { 73 %1 = fcmp une float %x, %y 74 ret i1 %1 75 } 76 77 define i1 @fcmp_double_oeq(double %x, double %y) { 78 %1 = fcmp oeq double %x, %y 79 ret i1 %1 80 } 81 82 define i1 @fcmp_double_ogt(double %x, double %y) { 83 %1 = fcmp ogt double %x, %y 84 ret i1 %1 85 } 86 87 define i1 @fcmp_double_oge(double %x, double %y) { 88 %1 = fcmp oge double %x, %y 89 ret i1 %1 90 } 91 92 define i1 @fcmp_double_olt(double %x, double %y) { 93 %1 = fcmp olt double %x, %y 94 ret i1 %1 95 } 96 97 define i1 @fcmp_double_ole(double %x, double %y) { 98 %1 = fcmp ole double %x, %y 99 ret i1 %1 100 } 101 102 define i1 @fcmp_double_one(double %x, double %y) { 103 %1 = fcmp one double %x, %y 104 ret i1 %1 105 } 106 107 define i1 @fcmp_double_ord(double %x, double %y) { 108 %1 = fcmp ord double %x, %y 109 ret i1 %1 110 } 111 112 define i1 @fcmp_double_uno(double %x, double %y) { 113 %1 = fcmp uno double %x, %y 114 ret i1 %1 115 } 116 117 define i1 @fcmp_double_ueq(double %x, double %y) { 118 %1 = fcmp ueq double %x, %y 119 ret i1 %1 120 } 121 122 define i1 @fcmp_double_ugt(double %x, double %y) { 123 %1 = fcmp ugt double %x, %y 124 ret i1 %1 125 } 126 127 define i1 @fcmp_double_uge(double %x, double %y) { 128 %1 = fcmp uge double %x, %y 129 ret i1 %1 130 } 131 132 define i1 @fcmp_double_ult(double %x, double %y) { 133 %1 = fcmp ult double %x, %y 134 ret i1 %1 135 } 136 137 define i1 @fcmp_double_ule(double %x, double %y) { 138 %1 = fcmp ule double %x, %y 139 ret i1 %1 140 } 141 142 define i1 @fcmp_double_une(double %x, double %y) { 143 %1 = fcmp une double %x, %y 144 ret i1 %1 145 } 146 147... 148--- 149name: fcmp_float_oeq 150alignment: 16 151legalized: true 152regBankSelected: true 153tracksRegLiveness: true 154registers: 155 - { id: 0, class: vecr } 156 - { id: 1, class: vecr } 157 - { id: 2, class: vecr } 158 - { id: 3, class: vecr } 159 - { id: 4, class: _ } 160 - { id: 5, class: gpr } 161 - { id: 6, class: gpr } 162body: | 163 bb.1 (%ir-block.0): 164 liveins: $xmm0, $xmm1 165 166 ; CHECK-LABEL: name: fcmp_float_oeq 167 ; CHECK: liveins: $xmm0, $xmm1 168 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 169 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 170 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 171 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 172 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 173 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 174 ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags 175 ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags 176 ; CHECK: $al = COPY [[AND8rr]] 177 ; CHECK: RET 0, implicit $al 178 %2:vecr(s128) = COPY $xmm0 179 %0:vecr(s32) = G_TRUNC %2(s128) 180 %3:vecr(s128) = COPY $xmm1 181 %1:vecr(s32) = G_TRUNC %3(s128) 182 %6:gpr(s8) = G_FCMP floatpred(oeq), %0(s32), %1 183 %5:gpr(s8) = COPY %6(s8) 184 $al = COPY %5(s8) 185 RET 0, implicit $al 186 187... 188--- 189name: fcmp_float_ogt 190alignment: 16 191legalized: true 192regBankSelected: true 193tracksRegLiveness: true 194registers: 195 - { id: 0, class: vecr } 196 - { id: 1, class: vecr } 197 - { id: 2, class: vecr } 198 - { id: 3, class: vecr } 199 - { id: 4, class: _ } 200 - { id: 5, class: gpr } 201 - { id: 6, class: gpr } 202body: | 203 bb.1 (%ir-block.0): 204 liveins: $xmm0, $xmm1 205 206 ; CHECK-LABEL: name: fcmp_float_ogt 207 ; CHECK: liveins: $xmm0, $xmm1 208 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 209 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 210 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 211 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 212 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 213 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 214 ; CHECK: $al = COPY [[SETCCr]] 215 ; CHECK: RET 0, implicit $al 216 %2:vecr(s128) = COPY $xmm0 217 %0:vecr(s32) = G_TRUNC %2(s128) 218 %3:vecr(s128) = COPY $xmm1 219 %1:vecr(s32) = G_TRUNC %3(s128) 220 %6:gpr(s8) = G_FCMP floatpred(ogt), %0(s32), %1 221 %5:gpr(s8) = COPY %6(s8) 222 $al = COPY %5(s8) 223 RET 0, implicit $al 224 225... 226--- 227name: fcmp_float_oge 228alignment: 16 229legalized: true 230regBankSelected: true 231tracksRegLiveness: true 232registers: 233 - { id: 0, class: vecr } 234 - { id: 1, class: vecr } 235 - { id: 2, class: vecr } 236 - { id: 3, class: vecr } 237 - { id: 4, class: _ } 238 - { id: 5, class: gpr } 239 - { id: 6, class: gpr } 240body: | 241 bb.1 (%ir-block.0): 242 liveins: $xmm0, $xmm1 243 244 ; CHECK-LABEL: name: fcmp_float_oge 245 ; CHECK: liveins: $xmm0, $xmm1 246 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 247 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 248 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 249 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 250 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 251 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags 252 ; CHECK: $al = COPY [[SETCCr]] 253 ; CHECK: RET 0, implicit $al 254 %2:vecr(s128) = COPY $xmm0 255 %0:vecr(s32) = G_TRUNC %2(s128) 256 %3:vecr(s128) = COPY $xmm1 257 %1:vecr(s32) = G_TRUNC %3(s128) 258 %6:gpr(s8) = G_FCMP floatpred(oge), %0(s32), %1 259 %5:gpr(s8) = COPY %6(s8) 260 $al = COPY %5(s8) 261 RET 0, implicit $al 262 263... 264--- 265name: fcmp_float_olt 266alignment: 16 267legalized: true 268regBankSelected: true 269tracksRegLiveness: true 270registers: 271 - { id: 0, class: vecr } 272 - { id: 1, class: vecr } 273 - { id: 2, class: vecr } 274 - { id: 3, class: vecr } 275 - { id: 4, class: _ } 276 - { id: 5, class: gpr } 277 - { id: 6, class: gpr } 278body: | 279 bb.1 (%ir-block.0): 280 liveins: $xmm0, $xmm1 281 282 ; CHECK-LABEL: name: fcmp_float_olt 283 ; CHECK: liveins: $xmm0, $xmm1 284 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 285 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 286 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 287 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 288 ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags 289 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 290 ; CHECK: $al = COPY [[SETCCr]] 291 ; CHECK: RET 0, implicit $al 292 %2:vecr(s128) = COPY $xmm0 293 %0:vecr(s32) = G_TRUNC %2(s128) 294 %3:vecr(s128) = COPY $xmm1 295 %1:vecr(s32) = G_TRUNC %3(s128) 296 %6:gpr(s8) = G_FCMP floatpred(olt), %0(s32), %1 297 %5:gpr(s8) = COPY %6(s8) 298 $al = COPY %5(s8) 299 RET 0, implicit $al 300 301... 302--- 303name: fcmp_float_ole 304alignment: 16 305legalized: true 306regBankSelected: true 307tracksRegLiveness: true 308registers: 309 - { id: 0, class: vecr } 310 - { id: 1, class: vecr } 311 - { id: 2, class: vecr } 312 - { id: 3, class: vecr } 313 - { id: 4, class: _ } 314 - { id: 5, class: gpr } 315 - { id: 6, class: gpr } 316body: | 317 bb.1 (%ir-block.0): 318 liveins: $xmm0, $xmm1 319 320 ; CHECK-LABEL: name: fcmp_float_ole 321 ; CHECK: liveins: $xmm0, $xmm1 322 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 323 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 324 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 325 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 326 ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags 327 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags 328 ; CHECK: $al = COPY [[SETCCr]] 329 ; CHECK: RET 0, implicit $al 330 %2:vecr(s128) = COPY $xmm0 331 %0:vecr(s32) = G_TRUNC %2(s128) 332 %3:vecr(s128) = COPY $xmm1 333 %1:vecr(s32) = G_TRUNC %3(s128) 334 %6:gpr(s8) = G_FCMP floatpred(ole), %0(s32), %1 335 %5:gpr(s8) = COPY %6(s8) 336 $al = COPY %5(s8) 337 RET 0, implicit $al 338 339... 340--- 341name: fcmp_float_one 342alignment: 16 343legalized: true 344regBankSelected: true 345tracksRegLiveness: true 346registers: 347 - { id: 0, class: vecr } 348 - { id: 1, class: vecr } 349 - { id: 2, class: vecr } 350 - { id: 3, class: vecr } 351 - { id: 4, class: _ } 352 - { id: 5, class: gpr } 353 - { id: 6, class: gpr } 354body: | 355 bb.1 (%ir-block.0): 356 liveins: $xmm0, $xmm1 357 358 ; CHECK-LABEL: name: fcmp_float_one 359 ; CHECK: liveins: $xmm0, $xmm1 360 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 361 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 362 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 363 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 364 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 365 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags 366 ; CHECK: $al = COPY [[SETCCr]] 367 ; CHECK: RET 0, implicit $al 368 %2:vecr(s128) = COPY $xmm0 369 %0:vecr(s32) = G_TRUNC %2(s128) 370 %3:vecr(s128) = COPY $xmm1 371 %1:vecr(s32) = G_TRUNC %3(s128) 372 %6:gpr(s8) = G_FCMP floatpred(one), %0(s32), %1 373 %5:gpr(s8) = COPY %6(s8) 374 $al = COPY %5(s8) 375 RET 0, implicit $al 376 377... 378--- 379name: fcmp_float_ord 380alignment: 16 381legalized: true 382regBankSelected: true 383tracksRegLiveness: true 384registers: 385 - { id: 0, class: vecr } 386 - { id: 1, class: vecr } 387 - { id: 2, class: vecr } 388 - { id: 3, class: vecr } 389 - { id: 4, class: _ } 390 - { id: 5, class: gpr } 391 - { id: 6, class: gpr } 392body: | 393 bb.1 (%ir-block.0): 394 liveins: $xmm0, $xmm1 395 396 ; CHECK-LABEL: name: fcmp_float_ord 397 ; CHECK: liveins: $xmm0, $xmm1 398 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 399 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 400 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 401 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 402 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 403 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags 404 ; CHECK: $al = COPY [[SETCCr]] 405 ; CHECK: RET 0, implicit $al 406 %2:vecr(s128) = COPY $xmm0 407 %0:vecr(s32) = G_TRUNC %2(s128) 408 %3:vecr(s128) = COPY $xmm1 409 %1:vecr(s32) = G_TRUNC %3(s128) 410 %6:gpr(s8) = G_FCMP floatpred(ord), %0(s32), %1 411 %5:gpr(s8) = COPY %6(s8) 412 $al = COPY %5(s8) 413 RET 0, implicit $al 414 415... 416--- 417name: fcmp_float_uno 418alignment: 16 419legalized: true 420regBankSelected: true 421tracksRegLiveness: true 422registers: 423 - { id: 0, class: vecr } 424 - { id: 1, class: vecr } 425 - { id: 2, class: vecr } 426 - { id: 3, class: vecr } 427 - { id: 4, class: _ } 428 - { id: 5, class: gpr } 429 - { id: 6, class: gpr } 430body: | 431 bb.1 (%ir-block.0): 432 liveins: $xmm0, $xmm1 433 434 ; CHECK-LABEL: name: fcmp_float_uno 435 ; CHECK: liveins: $xmm0, $xmm1 436 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 437 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 438 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 439 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 440 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 441 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags 442 ; CHECK: $al = COPY [[SETCCr]] 443 ; CHECK: RET 0, implicit $al 444 %2:vecr(s128) = COPY $xmm0 445 %0:vecr(s32) = G_TRUNC %2(s128) 446 %3:vecr(s128) = COPY $xmm1 447 %1:vecr(s32) = G_TRUNC %3(s128) 448 %6:gpr(s8) = G_FCMP floatpred(uno), %0(s32), %1 449 %5:gpr(s8) = COPY %6(s8) 450 $al = COPY %5(s8) 451 RET 0, implicit $al 452 453... 454--- 455name: fcmp_float_ueq 456alignment: 16 457legalized: true 458regBankSelected: true 459tracksRegLiveness: true 460registers: 461 - { id: 0, class: vecr } 462 - { id: 1, class: vecr } 463 - { id: 2, class: vecr } 464 - { id: 3, class: vecr } 465 - { id: 4, class: _ } 466 - { id: 5, class: gpr } 467 - { id: 6, class: gpr } 468body: | 469 bb.1 (%ir-block.0): 470 liveins: $xmm0, $xmm1 471 472 ; CHECK-LABEL: name: fcmp_float_ueq 473 ; CHECK: liveins: $xmm0, $xmm1 474 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 475 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 476 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 477 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 478 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 479 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 480 ; CHECK: $al = COPY [[SETCCr]] 481 ; CHECK: RET 0, implicit $al 482 %2:vecr(s128) = COPY $xmm0 483 %0:vecr(s32) = G_TRUNC %2(s128) 484 %3:vecr(s128) = COPY $xmm1 485 %1:vecr(s32) = G_TRUNC %3(s128) 486 %6:gpr(s8) = G_FCMP floatpred(ueq), %0(s32), %1 487 %5:gpr(s8) = COPY %6(s8) 488 $al = COPY %5(s8) 489 RET 0, implicit $al 490 491... 492--- 493name: fcmp_float_ugt 494alignment: 16 495legalized: true 496regBankSelected: true 497tracksRegLiveness: true 498registers: 499 - { id: 0, class: vecr } 500 - { id: 1, class: vecr } 501 - { id: 2, class: vecr } 502 - { id: 3, class: vecr } 503 - { id: 4, class: _ } 504 - { id: 5, class: gpr } 505 - { id: 6, class: gpr } 506body: | 507 bb.1 (%ir-block.0): 508 liveins: $xmm0, $xmm1 509 510 ; CHECK-LABEL: name: fcmp_float_ugt 511 ; CHECK: liveins: $xmm0, $xmm1 512 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 513 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 514 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 515 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 516 ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags 517 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 518 ; CHECK: $al = COPY [[SETCCr]] 519 ; CHECK: RET 0, implicit $al 520 %2:vecr(s128) = COPY $xmm0 521 %0:vecr(s32) = G_TRUNC %2(s128) 522 %3:vecr(s128) = COPY $xmm1 523 %1:vecr(s32) = G_TRUNC %3(s128) 524 %6:gpr(s8) = G_FCMP floatpred(ugt), %0(s32), %1 525 %5:gpr(s8) = COPY %6(s8) 526 $al = COPY %5(s8) 527 RET 0, implicit $al 528 529... 530--- 531name: fcmp_float_uge 532alignment: 16 533legalized: true 534regBankSelected: true 535tracksRegLiveness: true 536registers: 537 - { id: 0, class: vecr } 538 - { id: 1, class: vecr } 539 - { id: 2, class: vecr } 540 - { id: 3, class: vecr } 541 - { id: 4, class: _ } 542 - { id: 5, class: gpr } 543 - { id: 6, class: gpr } 544body: | 545 bb.1 (%ir-block.0): 546 liveins: $xmm0, $xmm1 547 548 ; CHECK-LABEL: name: fcmp_float_uge 549 ; CHECK: liveins: $xmm0, $xmm1 550 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 551 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 552 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 553 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 554 ; CHECK: UCOMISSrr [[COPY3]], [[COPY1]], implicit-def $eflags 555 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags 556 ; CHECK: $al = COPY [[SETCCr]] 557 ; CHECK: RET 0, implicit $al 558 %2:vecr(s128) = COPY $xmm0 559 %0:vecr(s32) = G_TRUNC %2(s128) 560 %3:vecr(s128) = COPY $xmm1 561 %1:vecr(s32) = G_TRUNC %3(s128) 562 %6:gpr(s8) = G_FCMP floatpred(uge), %0(s32), %1 563 %5:gpr(s8) = COPY %6(s8) 564 $al = COPY %5(s8) 565 RET 0, implicit $al 566 567... 568--- 569name: fcmp_float_ult 570alignment: 16 571legalized: true 572regBankSelected: true 573tracksRegLiveness: true 574registers: 575 - { id: 0, class: vecr } 576 - { id: 1, class: vecr } 577 - { id: 2, class: vecr } 578 - { id: 3, class: vecr } 579 - { id: 4, class: _ } 580 - { id: 5, class: gpr } 581 - { id: 6, class: gpr } 582body: | 583 bb.1 (%ir-block.0): 584 liveins: $xmm0, $xmm1 585 586 ; CHECK-LABEL: name: fcmp_float_ult 587 ; CHECK: liveins: $xmm0, $xmm1 588 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 589 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 590 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 591 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 592 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 593 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 594 ; CHECK: $al = COPY [[SETCCr]] 595 ; CHECK: RET 0, implicit $al 596 %2:vecr(s128) = COPY $xmm0 597 %0:vecr(s32) = G_TRUNC %2(s128) 598 %3:vecr(s128) = COPY $xmm1 599 %1:vecr(s32) = G_TRUNC %3(s128) 600 %6:gpr(s8) = G_FCMP floatpred(ult), %0(s32), %1 601 %5:gpr(s8) = COPY %6(s8) 602 $al = COPY %5(s8) 603 RET 0, implicit $al 604 605... 606--- 607name: fcmp_float_ule 608alignment: 16 609legalized: true 610regBankSelected: true 611tracksRegLiveness: true 612registers: 613 - { id: 0, class: vecr } 614 - { id: 1, class: vecr } 615 - { id: 2, class: vecr } 616 - { id: 3, class: vecr } 617 - { id: 4, class: _ } 618 - { id: 5, class: gpr } 619 - { id: 6, class: gpr } 620body: | 621 bb.1 (%ir-block.0): 622 liveins: $xmm0, $xmm1 623 624 ; CHECK-LABEL: name: fcmp_float_ule 625 ; CHECK: liveins: $xmm0, $xmm1 626 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 627 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 628 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 629 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 630 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 631 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags 632 ; CHECK: $al = COPY [[SETCCr]] 633 ; CHECK: RET 0, implicit $al 634 %2:vecr(s128) = COPY $xmm0 635 %0:vecr(s32) = G_TRUNC %2(s128) 636 %3:vecr(s128) = COPY $xmm1 637 %1:vecr(s32) = G_TRUNC %3(s128) 638 %6:gpr(s8) = G_FCMP floatpred(ule), %0(s32), %1 639 %5:gpr(s8) = COPY %6(s8) 640 $al = COPY %5(s8) 641 RET 0, implicit $al 642 643... 644--- 645name: fcmp_float_une 646alignment: 16 647legalized: true 648regBankSelected: true 649tracksRegLiveness: true 650registers: 651 - { id: 0, class: vecr } 652 - { id: 1, class: vecr } 653 - { id: 2, class: vecr } 654 - { id: 3, class: vecr } 655 - { id: 4, class: _ } 656 - { id: 5, class: gpr } 657 - { id: 6, class: gpr } 658body: | 659 bb.1 (%ir-block.0): 660 liveins: $xmm0, $xmm1 661 662 ; CHECK-LABEL: name: fcmp_float_une 663 ; CHECK: liveins: $xmm0, $xmm1 664 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 665 ; CHECK: [[COPY1:%[0-9]+]]:fr32 = COPY [[COPY]] 666 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 667 ; CHECK: [[COPY3:%[0-9]+]]:fr32 = COPY [[COPY2]] 668 ; CHECK: UCOMISSrr [[COPY1]], [[COPY3]], implicit-def $eflags 669 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags 670 ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags 671 ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags 672 ; CHECK: $al = COPY [[OR8rr]] 673 ; CHECK: RET 0, implicit $al 674 %2:vecr(s128) = COPY $xmm0 675 %0:vecr(s32) = G_TRUNC %2(s128) 676 %3:vecr(s128) = COPY $xmm1 677 %1:vecr(s32) = G_TRUNC %3(s128) 678 %6:gpr(s8) = G_FCMP floatpred(une), %0(s32), %1 679 %5:gpr(s8) = COPY %6(s8) 680 $al = COPY %5(s8) 681 RET 0, implicit $al 682 683... 684--- 685name: fcmp_double_oeq 686alignment: 16 687legalized: true 688regBankSelected: true 689tracksRegLiveness: true 690registers: 691 - { id: 0, class: vecr } 692 - { id: 1, class: vecr } 693 - { id: 2, class: vecr } 694 - { id: 3, class: vecr } 695 - { id: 4, class: _ } 696 - { id: 5, class: gpr } 697 - { id: 6, class: gpr } 698body: | 699 bb.1 (%ir-block.0): 700 liveins: $xmm0, $xmm1 701 702 ; CHECK-LABEL: name: fcmp_double_oeq 703 ; CHECK: liveins: $xmm0, $xmm1 704 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 705 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 706 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 707 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 708 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 709 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 710 ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags 711 ; CHECK: [[AND8rr:%[0-9]+]]:gr8 = AND8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags 712 ; CHECK: $al = COPY [[AND8rr]] 713 ; CHECK: RET 0, implicit $al 714 %2:vecr(s128) = COPY $xmm0 715 %0:vecr(s64) = G_TRUNC %2(s128) 716 %3:vecr(s128) = COPY $xmm1 717 %1:vecr(s64) = G_TRUNC %3(s128) 718 %6:gpr(s8) = G_FCMP floatpred(oeq), %0(s64), %1 719 %5:gpr(s8) = COPY %6(s8) 720 $al = COPY %5(s8) 721 RET 0, implicit $al 722 723... 724--- 725name: fcmp_double_ogt 726alignment: 16 727legalized: true 728regBankSelected: true 729tracksRegLiveness: true 730registers: 731 - { id: 0, class: vecr } 732 - { id: 1, class: vecr } 733 - { id: 2, class: vecr } 734 - { id: 3, class: vecr } 735 - { id: 4, class: _ } 736 - { id: 5, class: gpr } 737 - { id: 6, class: gpr } 738body: | 739 bb.1 (%ir-block.0): 740 liveins: $xmm0, $xmm1 741 742 ; CHECK-LABEL: name: fcmp_double_ogt 743 ; CHECK: liveins: $xmm0, $xmm1 744 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 745 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 746 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 747 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 748 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 749 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 750 ; CHECK: $al = COPY [[SETCCr]] 751 ; CHECK: RET 0, implicit $al 752 %2:vecr(s128) = COPY $xmm0 753 %0:vecr(s64) = G_TRUNC %2(s128) 754 %3:vecr(s128) = COPY $xmm1 755 %1:vecr(s64) = G_TRUNC %3(s128) 756 %6:gpr(s8) = G_FCMP floatpred(ogt), %0(s64), %1 757 %5:gpr(s8) = COPY %6(s8) 758 $al = COPY %5(s8) 759 RET 0, implicit $al 760 761... 762--- 763name: fcmp_double_oge 764alignment: 16 765legalized: true 766regBankSelected: true 767tracksRegLiveness: true 768registers: 769 - { id: 0, class: vecr } 770 - { id: 1, class: vecr } 771 - { id: 2, class: vecr } 772 - { id: 3, class: vecr } 773 - { id: 4, class: _ } 774 - { id: 5, class: gpr } 775 - { id: 6, class: gpr } 776body: | 777 bb.1 (%ir-block.0): 778 liveins: $xmm0, $xmm1 779 780 ; CHECK-LABEL: name: fcmp_double_oge 781 ; CHECK: liveins: $xmm0, $xmm1 782 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 783 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 784 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 785 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 786 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 787 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags 788 ; CHECK: $al = COPY [[SETCCr]] 789 ; CHECK: RET 0, implicit $al 790 %2:vecr(s128) = COPY $xmm0 791 %0:vecr(s64) = G_TRUNC %2(s128) 792 %3:vecr(s128) = COPY $xmm1 793 %1:vecr(s64) = G_TRUNC %3(s128) 794 %6:gpr(s8) = G_FCMP floatpred(oge), %0(s64), %1 795 %5:gpr(s8) = COPY %6(s8) 796 $al = COPY %5(s8) 797 RET 0, implicit $al 798 799... 800--- 801name: fcmp_double_olt 802alignment: 16 803legalized: true 804regBankSelected: true 805tracksRegLiveness: true 806registers: 807 - { id: 0, class: vecr } 808 - { id: 1, class: vecr } 809 - { id: 2, class: vecr } 810 - { id: 3, class: vecr } 811 - { id: 4, class: _ } 812 - { id: 5, class: gpr } 813 - { id: 6, class: gpr } 814body: | 815 bb.1 (%ir-block.0): 816 liveins: $xmm0, $xmm1 817 818 ; CHECK-LABEL: name: fcmp_double_olt 819 ; CHECK: liveins: $xmm0, $xmm1 820 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 821 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 822 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 823 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 824 ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags 825 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 7, implicit $eflags 826 ; CHECK: $al = COPY [[SETCCr]] 827 ; CHECK: RET 0, implicit $al 828 %2:vecr(s128) = COPY $xmm0 829 %0:vecr(s64) = G_TRUNC %2(s128) 830 %3:vecr(s128) = COPY $xmm1 831 %1:vecr(s64) = G_TRUNC %3(s128) 832 %6:gpr(s8) = G_FCMP floatpred(olt), %0(s64), %1 833 %5:gpr(s8) = COPY %6(s8) 834 $al = COPY %5(s8) 835 RET 0, implicit $al 836 837... 838--- 839name: fcmp_double_ole 840alignment: 16 841legalized: true 842regBankSelected: true 843tracksRegLiveness: true 844registers: 845 - { id: 0, class: vecr } 846 - { id: 1, class: vecr } 847 - { id: 2, class: vecr } 848 - { id: 3, class: vecr } 849 - { id: 4, class: _ } 850 - { id: 5, class: gpr } 851 - { id: 6, class: gpr } 852body: | 853 bb.1 (%ir-block.0): 854 liveins: $xmm0, $xmm1 855 856 ; CHECK-LABEL: name: fcmp_double_ole 857 ; CHECK: liveins: $xmm0, $xmm1 858 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 859 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 860 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 861 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 862 ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags 863 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 3, implicit $eflags 864 ; CHECK: $al = COPY [[SETCCr]] 865 ; CHECK: RET 0, implicit $al 866 %2:vecr(s128) = COPY $xmm0 867 %0:vecr(s64) = G_TRUNC %2(s128) 868 %3:vecr(s128) = COPY $xmm1 869 %1:vecr(s64) = G_TRUNC %3(s128) 870 %6:gpr(s8) = G_FCMP floatpred(ole), %0(s64), %1 871 %5:gpr(s8) = COPY %6(s8) 872 $al = COPY %5(s8) 873 RET 0, implicit $al 874 875... 876--- 877name: fcmp_double_one 878alignment: 16 879legalized: true 880regBankSelected: true 881tracksRegLiveness: true 882registers: 883 - { id: 0, class: vecr } 884 - { id: 1, class: vecr } 885 - { id: 2, class: vecr } 886 - { id: 3, class: vecr } 887 - { id: 4, class: _ } 888 - { id: 5, class: gpr } 889 - { id: 6, class: gpr } 890body: | 891 bb.1 (%ir-block.0): 892 liveins: $xmm0, $xmm1 893 894 ; CHECK-LABEL: name: fcmp_double_one 895 ; CHECK: liveins: $xmm0, $xmm1 896 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 897 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 898 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 899 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 900 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 901 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags 902 ; CHECK: $al = COPY [[SETCCr]] 903 ; CHECK: RET 0, implicit $al 904 %2:vecr(s128) = COPY $xmm0 905 %0:vecr(s64) = G_TRUNC %2(s128) 906 %3:vecr(s128) = COPY $xmm1 907 %1:vecr(s64) = G_TRUNC %3(s128) 908 %6:gpr(s8) = G_FCMP floatpred(one), %0(s64), %1 909 %5:gpr(s8) = COPY %6(s8) 910 $al = COPY %5(s8) 911 RET 0, implicit $al 912 913... 914--- 915name: fcmp_double_ord 916alignment: 16 917legalized: true 918regBankSelected: true 919tracksRegLiveness: true 920registers: 921 - { id: 0, class: vecr } 922 - { id: 1, class: vecr } 923 - { id: 2, class: vecr } 924 - { id: 3, class: vecr } 925 - { id: 4, class: _ } 926 - { id: 5, class: gpr } 927 - { id: 6, class: gpr } 928body: | 929 bb.1 (%ir-block.0): 930 liveins: $xmm0, $xmm1 931 932 ; CHECK-LABEL: name: fcmp_double_ord 933 ; CHECK: liveins: $xmm0, $xmm1 934 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 935 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 936 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 937 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 938 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 939 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 11, implicit $eflags 940 ; CHECK: $al = COPY [[SETCCr]] 941 ; CHECK: RET 0, implicit $al 942 %2:vecr(s128) = COPY $xmm0 943 %0:vecr(s64) = G_TRUNC %2(s128) 944 %3:vecr(s128) = COPY $xmm1 945 %1:vecr(s64) = G_TRUNC %3(s128) 946 %6:gpr(s8) = G_FCMP floatpred(ord), %0(s64), %1 947 %5:gpr(s8) = COPY %6(s8) 948 $al = COPY %5(s8) 949 RET 0, implicit $al 950 951... 952--- 953name: fcmp_double_uno 954alignment: 16 955legalized: true 956regBankSelected: true 957tracksRegLiveness: true 958registers: 959 - { id: 0, class: vecr } 960 - { id: 1, class: vecr } 961 - { id: 2, class: vecr } 962 - { id: 3, class: vecr } 963 - { id: 4, class: _ } 964 - { id: 5, class: gpr } 965 - { id: 6, class: gpr } 966body: | 967 bb.1 (%ir-block.0): 968 liveins: $xmm0, $xmm1 969 970 ; CHECK-LABEL: name: fcmp_double_uno 971 ; CHECK: liveins: $xmm0, $xmm1 972 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 973 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 974 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 975 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 976 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 977 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags 978 ; CHECK: $al = COPY [[SETCCr]] 979 ; CHECK: RET 0, implicit $al 980 %2:vecr(s128) = COPY $xmm0 981 %0:vecr(s64) = G_TRUNC %2(s128) 982 %3:vecr(s128) = COPY $xmm1 983 %1:vecr(s64) = G_TRUNC %3(s128) 984 %6:gpr(s8) = G_FCMP floatpred(uno), %0(s64), %1 985 %5:gpr(s8) = COPY %6(s8) 986 $al = COPY %5(s8) 987 RET 0, implicit $al 988 989... 990--- 991name: fcmp_double_ueq 992alignment: 16 993legalized: true 994regBankSelected: true 995tracksRegLiveness: true 996registers: 997 - { id: 0, class: vecr } 998 - { id: 1, class: vecr } 999 - { id: 2, class: vecr } 1000 - { id: 3, class: vecr } 1001 - { id: 4, class: _ } 1002 - { id: 5, class: gpr } 1003 - { id: 6, class: gpr } 1004body: | 1005 bb.1 (%ir-block.0): 1006 liveins: $xmm0, $xmm1 1007 1008 ; CHECK-LABEL: name: fcmp_double_ueq 1009 ; CHECK: liveins: $xmm0, $xmm1 1010 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 1011 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 1012 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 1013 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 1014 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 1015 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags 1016 ; CHECK: $al = COPY [[SETCCr]] 1017 ; CHECK: RET 0, implicit $al 1018 %2:vecr(s128) = COPY $xmm0 1019 %0:vecr(s64) = G_TRUNC %2(s128) 1020 %3:vecr(s128) = COPY $xmm1 1021 %1:vecr(s64) = G_TRUNC %3(s128) 1022 %6:gpr(s8) = G_FCMP floatpred(ueq), %0(s64), %1 1023 %5:gpr(s8) = COPY %6(s8) 1024 $al = COPY %5(s8) 1025 RET 0, implicit $al 1026 1027... 1028--- 1029name: fcmp_double_ugt 1030alignment: 16 1031legalized: true 1032regBankSelected: true 1033tracksRegLiveness: true 1034registers: 1035 - { id: 0, class: vecr } 1036 - { id: 1, class: vecr } 1037 - { id: 2, class: vecr } 1038 - { id: 3, class: vecr } 1039 - { id: 4, class: _ } 1040 - { id: 5, class: gpr } 1041 - { id: 6, class: gpr } 1042body: | 1043 bb.1 (%ir-block.0): 1044 liveins: $xmm0, $xmm1 1045 1046 ; CHECK-LABEL: name: fcmp_double_ugt 1047 ; CHECK: liveins: $xmm0, $xmm1 1048 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 1049 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 1050 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 1051 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 1052 ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags 1053 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 1054 ; CHECK: $al = COPY [[SETCCr]] 1055 ; CHECK: RET 0, implicit $al 1056 %2:vecr(s128) = COPY $xmm0 1057 %0:vecr(s64) = G_TRUNC %2(s128) 1058 %3:vecr(s128) = COPY $xmm1 1059 %1:vecr(s64) = G_TRUNC %3(s128) 1060 %6:gpr(s8) = G_FCMP floatpred(ugt), %0(s64), %1 1061 %5:gpr(s8) = COPY %6(s8) 1062 $al = COPY %5(s8) 1063 RET 0, implicit $al 1064 1065... 1066--- 1067name: fcmp_double_uge 1068alignment: 16 1069legalized: true 1070regBankSelected: true 1071tracksRegLiveness: true 1072registers: 1073 - { id: 0, class: vecr } 1074 - { id: 1, class: vecr } 1075 - { id: 2, class: vecr } 1076 - { id: 3, class: vecr } 1077 - { id: 4, class: _ } 1078 - { id: 5, class: gpr } 1079 - { id: 6, class: gpr } 1080body: | 1081 bb.1 (%ir-block.0): 1082 liveins: $xmm0, $xmm1 1083 1084 ; CHECK-LABEL: name: fcmp_double_uge 1085 ; CHECK: liveins: $xmm0, $xmm1 1086 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 1087 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 1088 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 1089 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 1090 ; CHECK: UCOMISDrr [[COPY3]], [[COPY1]], implicit-def $eflags 1091 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags 1092 ; CHECK: $al = COPY [[SETCCr]] 1093 ; CHECK: RET 0, implicit $al 1094 %2:vecr(s128) = COPY $xmm0 1095 %0:vecr(s64) = G_TRUNC %2(s128) 1096 %3:vecr(s128) = COPY $xmm1 1097 %1:vecr(s64) = G_TRUNC %3(s128) 1098 %6:gpr(s8) = G_FCMP floatpred(uge), %0(s64), %1 1099 %5:gpr(s8) = COPY %6(s8) 1100 $al = COPY %5(s8) 1101 RET 0, implicit $al 1102 1103... 1104--- 1105name: fcmp_double_ult 1106alignment: 16 1107legalized: true 1108regBankSelected: true 1109tracksRegLiveness: true 1110registers: 1111 - { id: 0, class: vecr } 1112 - { id: 1, class: vecr } 1113 - { id: 2, class: vecr } 1114 - { id: 3, class: vecr } 1115 - { id: 4, class: _ } 1116 - { id: 5, class: gpr } 1117 - { id: 6, class: gpr } 1118body: | 1119 bb.1 (%ir-block.0): 1120 liveins: $xmm0, $xmm1 1121 1122 ; CHECK-LABEL: name: fcmp_double_ult 1123 ; CHECK: liveins: $xmm0, $xmm1 1124 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 1125 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 1126 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 1127 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 1128 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 1129 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 2, implicit $eflags 1130 ; CHECK: $al = COPY [[SETCCr]] 1131 ; CHECK: RET 0, implicit $al 1132 %2:vecr(s128) = COPY $xmm0 1133 %0:vecr(s64) = G_TRUNC %2(s128) 1134 %3:vecr(s128) = COPY $xmm1 1135 %1:vecr(s64) = G_TRUNC %3(s128) 1136 %6:gpr(s8) = G_FCMP floatpred(ult), %0(s64), %1 1137 %5:gpr(s8) = COPY %6(s8) 1138 $al = COPY %5(s8) 1139 RET 0, implicit $al 1140 1141... 1142--- 1143name: fcmp_double_ule 1144alignment: 16 1145legalized: true 1146regBankSelected: true 1147tracksRegLiveness: true 1148registers: 1149 - { id: 0, class: vecr } 1150 - { id: 1, class: vecr } 1151 - { id: 2, class: vecr } 1152 - { id: 3, class: vecr } 1153 - { id: 4, class: _ } 1154 - { id: 5, class: gpr } 1155 - { id: 6, class: gpr } 1156body: | 1157 bb.1 (%ir-block.0): 1158 liveins: $xmm0, $xmm1 1159 1160 ; CHECK-LABEL: name: fcmp_double_ule 1161 ; CHECK: liveins: $xmm0, $xmm1 1162 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 1163 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 1164 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 1165 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 1166 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 1167 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 6, implicit $eflags 1168 ; CHECK: $al = COPY [[SETCCr]] 1169 ; CHECK: RET 0, implicit $al 1170 %2:vecr(s128) = COPY $xmm0 1171 %0:vecr(s64) = G_TRUNC %2(s128) 1172 %3:vecr(s128) = COPY $xmm1 1173 %1:vecr(s64) = G_TRUNC %3(s128) 1174 %6:gpr(s8) = G_FCMP floatpred(ule), %0(s64), %1 1175 %5:gpr(s8) = COPY %6(s8) 1176 $al = COPY %5(s8) 1177 RET 0, implicit $al 1178 1179... 1180--- 1181name: fcmp_double_une 1182alignment: 16 1183legalized: true 1184regBankSelected: true 1185tracksRegLiveness: true 1186registers: 1187 - { id: 0, class: vecr } 1188 - { id: 1, class: vecr } 1189 - { id: 2, class: vecr } 1190 - { id: 3, class: vecr } 1191 - { id: 4, class: _ } 1192 - { id: 5, class: gpr } 1193 - { id: 6, class: gpr } 1194body: | 1195 bb.1 (%ir-block.0): 1196 liveins: $xmm0, $xmm1 1197 1198 ; CHECK-LABEL: name: fcmp_double_une 1199 ; CHECK: liveins: $xmm0, $xmm1 1200 ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 1201 ; CHECK: [[COPY1:%[0-9]+]]:fr64 = COPY [[COPY]] 1202 ; CHECK: [[COPY2:%[0-9]+]]:vr128 = COPY $xmm1 1203 ; CHECK: [[COPY3:%[0-9]+]]:fr64 = COPY [[COPY2]] 1204 ; CHECK: UCOMISDrr [[COPY1]], [[COPY3]], implicit-def $eflags 1205 ; CHECK: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 5, implicit $eflags 1206 ; CHECK: [[SETCCr1:%[0-9]+]]:gr8 = SETCCr 10, implicit $eflags 1207 ; CHECK: [[OR8rr:%[0-9]+]]:gr8 = OR8rr [[SETCCr]], [[SETCCr1]], implicit-def $eflags 1208 ; CHECK: $al = COPY [[OR8rr]] 1209 ; CHECK: RET 0, implicit $al 1210 %2:vecr(s128) = COPY $xmm0 1211 %0:vecr(s64) = G_TRUNC %2(s128) 1212 %3:vecr(s128) = COPY $xmm1 1213 %1:vecr(s64) = G_TRUNC %3(s128) 1214 %6:gpr(s8) = G_FCMP floatpred(une), %0(s64), %1 1215 %5:gpr(s8) = COPY %6(s8) 1216 $al = COPY %5(s8) 1217 RET 0, implicit $al 1218 1219... 1220