1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X86 3# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X64 4 5--- | 6 define i8 @test_zext_i1toi8(i1 %a) { 7 %r = zext i1 %a to i8 8 ret i8 %r 9 } 10 11 define i16 @test_zext_i1toi16(i1 %a) { 12 %r = zext i1 %a to i16 13 ret i16 %r 14 } 15 16 define i32 @test_zext_i1(i1 %a) { 17 %r = zext i1 %a to i32 18 ret i32 %r 19 } 20 21 define i32 @test_zext_i8(i8 %val) { 22 %r = zext i8 %val to i32 23 ret i32 %r 24 } 25 26 define i32 @test_zext_i16(i16 %val) { 27 %r = zext i16 %val to i32 28 ret i32 %r 29 } 30 31 define i32 @test_sext_i8(i8 %val) { 32 %r = sext i8 %val to i32 33 ret i32 %r 34 } 35 36 define i32 @test_sext_i16(i16 %val) { 37 %r = sext i16 %val to i32 38 ret i32 %r 39 } 40 41 define void @test_anyext_i1toi8() { ret void } 42 define void @test_anyext_i1toi16() { ret void } 43 define void @test_anyext_i1toi32() { ret void } 44 define void @test_anyext_i8toi16() { ret void } 45 define void @test_anyext_i8toi32() { ret void } 46 define void @test_anyext_i16toi32() { ret void } 47 48... 49--- 50name: test_zext_i1toi8 51alignment: 16 52legalized: true 53regBankSelected: true 54registers: 55 - { id: 0, class: gpr, preferred-register: '' } 56 - { id: 1, class: gpr, preferred-register: '' } 57 - { id: 2, class: gpr, preferred-register: '' } 58 59body: | 60 bb.1 (%ir-block.0): 61 liveins: $edi 62 63 ; X86-LABEL: name: test_zext_i1toi8 64 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi 65 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 66 ; X86-NEXT: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags 67 ; X86-NEXT: $al = COPY [[AND8ri]] 68 ; X86-NEXT: RET 0, implicit $al 69 ; X64-LABEL: name: test_zext_i1toi8 70 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 71 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 72 ; X64-NEXT: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags 73 ; X64-NEXT: $al = COPY [[AND8ri]] 74 ; X64-NEXT: RET 0, implicit $al 75 %0(s32) = COPY $edi 76 %1(s1) = G_TRUNC %0(s32) 77 %2(s8) = G_ZEXT %1(s1) 78 $al = COPY %2(s8) 79 RET 0, implicit $al 80 81... 82--- 83name: test_zext_i1toi16 84alignment: 16 85legalized: true 86regBankSelected: true 87registers: 88 - { id: 0, class: gpr, preferred-register: '' } 89 - { id: 1, class: gpr, preferred-register: '' } 90 - { id: 2, class: gpr, preferred-register: '' } 91 92body: | 93 bb.1 (%ir-block.0): 94 liveins: $edi 95 96 ; X86-LABEL: name: test_zext_i1toi16 97 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi 98 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 99 ; X86-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF 100 ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr16 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit 101 ; X86-NEXT: [[AND16ri_:%[0-9]+]]:gr16 = AND16ri [[INSERT_SUBREG]], 1, implicit-def $eflags 102 ; X86-NEXT: $ax = COPY [[AND16ri_]] 103 ; X86-NEXT: RET 0, implicit $ax 104 ; X64-LABEL: name: test_zext_i1toi16 105 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 106 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 107 ; X64-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF 108 ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr16 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit 109 ; X64-NEXT: [[AND16ri_:%[0-9]+]]:gr16 = AND16ri [[INSERT_SUBREG]], 1, implicit-def $eflags 110 ; X64-NEXT: $ax = COPY [[AND16ri_]] 111 ; X64-NEXT: RET 0, implicit $ax 112 %0(s32) = COPY $edi 113 %1(s1) = G_TRUNC %0(s32) 114 %2(s16) = G_ZEXT %1(s1) 115 $ax = COPY %2(s16) 116 RET 0, implicit $ax 117 118... 119--- 120name: test_zext_i1 121alignment: 16 122legalized: true 123regBankSelected: true 124registers: 125 - { id: 0, class: gpr } 126 - { id: 1, class: gpr } 127 - { id: 2, class: gpr } 128 129body: | 130 bb.1 (%ir-block.0): 131 liveins: $edi 132 133 ; X86-LABEL: name: test_zext_i1 134 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi 135 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 136 ; X86-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF 137 ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit 138 ; X86-NEXT: [[AND32ri_:%[0-9]+]]:gr32 = AND32ri [[INSERT_SUBREG]], 1, implicit-def $eflags 139 ; X86-NEXT: $eax = COPY [[AND32ri_]] 140 ; X86-NEXT: RET 0, implicit $eax 141 ; X64-LABEL: name: test_zext_i1 142 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 143 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 144 ; X64-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF 145 ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit 146 ; X64-NEXT: [[AND32ri_:%[0-9]+]]:gr32 = AND32ri [[INSERT_SUBREG]], 1, implicit-def $eflags 147 ; X64-NEXT: $eax = COPY [[AND32ri_]] 148 ; X64-NEXT: RET 0, implicit $eax 149 %0(s32) = COPY $edi 150 %1(s1) = G_TRUNC %0(s32) 151 %2(s32) = G_ZEXT %1(s1) 152 $eax = COPY %2(s32) 153 RET 0, implicit $eax 154 155... 156--- 157name: test_zext_i8 158alignment: 16 159legalized: true 160regBankSelected: true 161registers: 162 - { id: 0, class: gpr } 163 - { id: 1, class: gpr } 164 165body: | 166 bb.1 (%ir-block.0): 167 liveins: $edi 168 169 ; X86-LABEL: name: test_zext_i8 170 ; X86: [[COPY:%[0-9]+]]:gr8 = COPY $dil 171 ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]] 172 ; X86-NEXT: $eax = COPY [[MOVZX32rr8_]] 173 ; X86-NEXT: RET 0, implicit $eax 174 ; X64-LABEL: name: test_zext_i8 175 ; X64: [[COPY:%[0-9]+]]:gr8 = COPY $dil 176 ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]] 177 ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]] 178 ; X64-NEXT: RET 0, implicit $eax 179 %0(s8) = COPY $dil 180 %1(s32) = G_ZEXT %0(s8) 181 $eax = COPY %1(s32) 182 RET 0, implicit $eax 183 184... 185--- 186name: test_zext_i16 187alignment: 16 188legalized: true 189regBankSelected: true 190registers: 191 - { id: 0, class: gpr } 192 - { id: 1, class: gpr } 193 194body: | 195 bb.1 (%ir-block.0): 196 liveins: $edi 197 198 ; X86-LABEL: name: test_zext_i16 199 ; X86: [[COPY:%[0-9]+]]:gr16 = COPY $di 200 ; X86-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY]] 201 ; X86-NEXT: $eax = COPY [[MOVZX32rr16_]] 202 ; X86-NEXT: RET 0, implicit $eax 203 ; X64-LABEL: name: test_zext_i16 204 ; X64: [[COPY:%[0-9]+]]:gr16 = COPY $di 205 ; X64-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY]] 206 ; X64-NEXT: $eax = COPY [[MOVZX32rr16_]] 207 ; X64-NEXT: RET 0, implicit $eax 208 %0(s16) = COPY $di 209 %1(s32) = G_ZEXT %0(s16) 210 $eax = COPY %1(s32) 211 RET 0, implicit $eax 212 213... 214--- 215name: test_sext_i8 216alignment: 16 217legalized: true 218regBankSelected: true 219registers: 220 - { id: 0, class: gpr } 221 - { id: 1, class: gpr } 222 223body: | 224 bb.1 (%ir-block.0): 225 liveins: $edi 226 227 ; X86-LABEL: name: test_sext_i8 228 ; X86: [[COPY:%[0-9]+]]:gr8 = COPY $dil 229 ; X86-NEXT: [[MOVSX32rr8_:%[0-9]+]]:gr32 = MOVSX32rr8 [[COPY]] 230 ; X86-NEXT: $eax = COPY [[MOVSX32rr8_]] 231 ; X86-NEXT: RET 0, implicit $eax 232 ; X64-LABEL: name: test_sext_i8 233 ; X64: [[COPY:%[0-9]+]]:gr8 = COPY $dil 234 ; X64-NEXT: [[MOVSX32rr8_:%[0-9]+]]:gr32 = MOVSX32rr8 [[COPY]] 235 ; X64-NEXT: $eax = COPY [[MOVSX32rr8_]] 236 ; X64-NEXT: RET 0, implicit $eax 237 %0(s8) = COPY $dil 238 %1(s32) = G_SEXT %0(s8) 239 $eax = COPY %1(s32) 240 RET 0, implicit $eax 241 242... 243--- 244name: test_sext_i16 245alignment: 16 246legalized: true 247regBankSelected: true 248registers: 249 - { id: 0, class: gpr } 250 - { id: 1, class: gpr } 251 252body: | 253 bb.1 (%ir-block.0): 254 liveins: $edi 255 256 ; X86-LABEL: name: test_sext_i16 257 ; X86: [[COPY:%[0-9]+]]:gr16 = COPY $di 258 ; X86-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 [[COPY]] 259 ; X86-NEXT: $eax = COPY [[MOVSX32rr16_]] 260 ; X86-NEXT: RET 0, implicit $eax 261 ; X64-LABEL: name: test_sext_i16 262 ; X64: [[COPY:%[0-9]+]]:gr16 = COPY $di 263 ; X64-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 [[COPY]] 264 ; X64-NEXT: $eax = COPY [[MOVSX32rr16_]] 265 ; X64-NEXT: RET 0, implicit $eax 266 %0(s16) = COPY $di 267 %1(s32) = G_SEXT %0(s16) 268 $eax = COPY %1(s32) 269 RET 0, implicit $eax 270 271... 272--- 273name: test_anyext_i1toi8 274alignment: 16 275legalized: true 276regBankSelected: true 277registers: 278 - { id: 0, class: gpr } 279 - { id: 1, class: gpr } 280 - { id: 2, class: gpr } 281 282body: | 283 bb.1 (%ir-block.0): 284 liveins: $edi 285 286 ; X86-LABEL: name: test_anyext_i1toi8 287 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi 288 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 289 ; X86-NEXT: $al = COPY [[COPY1]] 290 ; X86-NEXT: RET 0, implicit $al 291 ; X64-LABEL: name: test_anyext_i1toi8 292 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 293 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 294 ; X64-NEXT: $al = COPY [[COPY1]] 295 ; X64-NEXT: RET 0, implicit $al 296 %0(s32) = COPY $edi 297 %1(s1) = G_TRUNC %0(s32) 298 %2(s8) = G_ANYEXT %1(s1) 299 $al = COPY %2(s8) 300 RET 0, implicit $al 301... 302--- 303name: test_anyext_i1toi16 304alignment: 16 305legalized: true 306regBankSelected: true 307registers: 308 - { id: 0, class: gpr } 309 - { id: 1, class: gpr } 310 - { id: 2, class: gpr } 311 312body: | 313 bb.1 (%ir-block.0): 314 liveins: $edi 315 316 ; X86-LABEL: name: test_anyext_i1toi16 317 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi 318 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 319 ; X86-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr16 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit 320 ; X86-NEXT: $ax = COPY [[SUBREG_TO_REG]] 321 ; X86-NEXT: RET 0, implicit $ax 322 ; X64-LABEL: name: test_anyext_i1toi16 323 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 324 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 325 ; X64-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr16 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit 326 ; X64-NEXT: $ax = COPY [[SUBREG_TO_REG]] 327 ; X64-NEXT: RET 0, implicit $ax 328 %0(s32) = COPY $edi 329 %1(s1) = G_TRUNC %0(s32) 330 %2(s16) = G_ANYEXT %1(s1) 331 $ax = COPY %2(s16) 332 RET 0, implicit $ax 333... 334--- 335name: test_anyext_i1toi32 336alignment: 16 337legalized: true 338regBankSelected: true 339registers: 340 - { id: 0, class: gpr } 341 - { id: 1, class: gpr } 342 - { id: 2, class: gpr } 343 344body: | 345 bb.1 (%ir-block.0): 346 liveins: $edi 347 348 ; X86-LABEL: name: test_anyext_i1toi32 349 ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi 350 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 351 ; X86-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit 352 ; X86-NEXT: $eax = COPY [[SUBREG_TO_REG]] 353 ; X86-NEXT: RET 0, implicit $eax 354 ; X64-LABEL: name: test_anyext_i1toi32 355 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 356 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 357 ; X64-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit 358 ; X64-NEXT: $eax = COPY [[SUBREG_TO_REG]] 359 ; X64-NEXT: RET 0, implicit $eax 360 %0(s32) = COPY $edi 361 %1(s1) = G_TRUNC %0(s32) 362 %2(s32) = G_ANYEXT %1(s1) 363 $eax = COPY %2(s32) 364 RET 0, implicit $eax 365... 366--- 367name: test_anyext_i8toi16 368alignment: 16 369legalized: true 370regBankSelected: true 371registers: 372 - { id: 0, class: gpr } 373 - { id: 1, class: gpr } 374 - { id: 2, class: gpr } 375 376body: | 377 bb.1 (%ir-block.0): 378 liveins: $edi 379 380 ; X86-LABEL: name: test_anyext_i8toi16 381 ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi 382 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]] 383 ; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit 384 ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]] 385 ; X86-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY [[MOVZX32rr8_]].sub_16bit 386 ; X86-NEXT: $ax = COPY [[COPY3]] 387 ; X86-NEXT: RET 0, implicit $ax 388 ; X64-LABEL: name: test_anyext_i8toi16 389 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 390 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 391 ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]] 392 ; X64-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[MOVZX32rr8_]].sub_16bit 393 ; X64-NEXT: $ax = COPY [[COPY2]] 394 ; X64-NEXT: RET 0, implicit $ax 395 %0(s32) = COPY $edi 396 %1(s8) = G_TRUNC %0(s32) 397 %2(s16) = G_ANYEXT %1(s8) 398 $ax = COPY %2(s16) 399 RET 0, implicit $ax 400... 401--- 402name: test_anyext_i8toi32 403alignment: 16 404legalized: true 405regBankSelected: true 406registers: 407 - { id: 0, class: gpr } 408 - { id: 1, class: gpr } 409 - { id: 2, class: gpr } 410 411body: | 412 bb.1 (%ir-block.0): 413 liveins: $edi 414 415 ; X86-LABEL: name: test_anyext_i8toi32 416 ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi 417 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]] 418 ; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit 419 ; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]] 420 ; X86-NEXT: $eax = COPY [[MOVZX32rr8_]] 421 ; X86-NEXT: RET 0, implicit $eax 422 ; X64-LABEL: name: test_anyext_i8toi32 423 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 424 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 425 ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]] 426 ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]] 427 ; X64-NEXT: RET 0, implicit $eax 428 %0(s32) = COPY $edi 429 %1(s8) = G_TRUNC %0(s32) 430 %2(s32) = G_ANYEXT %1(s8) 431 $eax = COPY %2(s32) 432 RET 0, implicit $eax 433... 434--- 435name: test_anyext_i16toi32 436alignment: 16 437legalized: true 438regBankSelected: true 439registers: 440 - { id: 0, class: gpr } 441 - { id: 1, class: gpr } 442 - { id: 2, class: gpr } 443 444body: | 445 bb.1 (%ir-block.0): 446 liveins: $edi 447 448 ; X86-LABEL: name: test_anyext_i16toi32 449 ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi 450 ; X86-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 451 ; X86-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF 452 ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit 453 ; X86-NEXT: $eax = COPY [[INSERT_SUBREG]] 454 ; X86-NEXT: RET 0, implicit $eax 455 ; X64-LABEL: name: test_anyext_i16toi32 456 ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi 457 ; X64-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 458 ; X64-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF 459 ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit 460 ; X64-NEXT: $eax = COPY [[INSERT_SUBREG]] 461 ; X64-NEXT: RET 0, implicit $eax 462 %0(s32) = COPY $edi 463 %1(s16) = G_TRUNC %0(s32) 464 %2(s32) = G_ANYEXT %1(s16) 465 $eax = COPY %2(s32) 466 RET 0, implicit $eax 467... 468