1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL 3--- | 4 5 define i64 @test_ashr_i64(i64 %arg1, i64 %arg2) { 6 %res = ashr i64 %arg1, %arg2 7 ret i64 %res 8 } 9 10 define i64 @test_ashr_i64_imm(i64 %arg1) { 11 %res = ashr i64 %arg1, 5 12 ret i64 %res 13 } 14 15 define i32 @test_ashr_i32(i32 %arg1, i32 %arg2) { 16 %res = ashr i32 %arg1, %arg2 17 ret i32 %res 18 } 19 20 define i32 @test_ashr_i32_imm(i32 %arg1) { 21 %res = ashr i32 %arg1, 5 22 ret i32 %res 23 } 24 25 define i16 @test_ashr_i16(i32 %arg1, i32 %arg2) { 26 %a = trunc i32 %arg1 to i16 27 %a2 = trunc i32 %arg2 to i16 28 %res = ashr i16 %a, %a2 29 ret i16 %res 30 } 31 32 define i16 @test_ashr_i16_imm(i32 %arg1) { 33 %a = trunc i32 %arg1 to i16 34 %res = ashr i16 %a, 5 35 ret i16 %res 36 } 37 38 define i8 @test_ashr_i8(i32 %arg1, i32 %arg2) { 39 %a = trunc i32 %arg1 to i8 40 %a2 = trunc i32 %arg2 to i8 41 %res = ashr i8 %a, %a2 42 ret i8 %res 43 } 44 45 define i8 @test_ashr_i8_imm(i32 %arg1) { 46 %a = trunc i32 %arg1 to i8 47 %res = ashr i8 %a, 5 48 ret i8 %res 49 } 50... 51--- 52name: test_ashr_i64 53alignment: 16 54legalized: true 55regBankSelected: true 56tracksRegLiveness: true 57registers: 58 - { id: 0, class: gpr, preferred-register: '' } 59 - { id: 1, class: gpr, preferred-register: '' } 60 - { id: 2, class: gpr, preferred-register: '' } 61 - { id: 3, class: gpr, preferred-register: '' } 62liveins: 63fixedStack: 64stack: 65constants: 66body: | 67 bb.1 (%ir-block.0): 68 liveins: $rdi, $rsi 69 70 ; ALL-LABEL: name: test_ashr_i64 71 ; ALL: liveins: $rdi, $rsi 72 ; ALL-NEXT: {{ $}} 73 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 74 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr64_with_sub_8bit = COPY $rsi 75 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 76 ; ALL-NEXT: $cl = COPY [[COPY2]] 77 ; ALL-NEXT: [[SAR64rCL:%[0-9]+]]:gr64 = SAR64rCL [[COPY]], implicit-def dead $eflags, implicit $cl 78 ; ALL-NEXT: $rax = COPY [[SAR64rCL]] 79 ; ALL-NEXT: RET 0, implicit $rax 80 %0(s64) = COPY $rdi 81 %1(s64) = COPY $rsi 82 %2(s8) = G_TRUNC %1 83 %3(s64) = G_ASHR %0, %2 84 $rax = COPY %3(s64) 85 RET 0, implicit $rax 86 87... 88--- 89name: test_ashr_i64_imm 90alignment: 16 91legalized: true 92regBankSelected: true 93tracksRegLiveness: true 94registers: 95 - { id: 0, class: gpr, preferred-register: '' } 96 - { id: 1, class: gpr, preferred-register: '' } 97 - { id: 2, class: gpr, preferred-register: '' } 98liveins: 99fixedStack: 100stack: 101constants: 102body: | 103 bb.1 (%ir-block.0): 104 liveins: $rdi 105 106 ; ALL-LABEL: name: test_ashr_i64_imm 107 ; ALL: liveins: $rdi 108 ; ALL-NEXT: {{ $}} 109 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr64 = COPY $rdi 110 ; ALL-NEXT: [[SAR64ri:%[0-9]+]]:gr64 = SAR64ri [[COPY]], 5, implicit-def dead $eflags 111 ; ALL-NEXT: $rax = COPY [[SAR64ri]] 112 ; ALL-NEXT: RET 0, implicit $rax 113 %0(s64) = COPY $rdi 114 %1(s8) = G_CONSTANT i8 5 115 %2(s64) = G_ASHR %0, %1 116 $rax = COPY %2(s64) 117 RET 0, implicit $rax 118 119... 120--- 121name: test_ashr_i32 122alignment: 16 123legalized: true 124regBankSelected: true 125tracksRegLiveness: true 126registers: 127 - { id: 0, class: gpr, preferred-register: '' } 128 - { id: 1, class: gpr, preferred-register: '' } 129 - { id: 2, class: gpr, preferred-register: '' } 130 - { id: 3, class: gpr, preferred-register: '' } 131liveins: 132fixedStack: 133stack: 134constants: 135body: | 136 bb.1 (%ir-block.0): 137 liveins: $edi, $esi 138 139 ; ALL-LABEL: name: test_ashr_i32 140 ; ALL: liveins: $edi, $esi 141 ; ALL-NEXT: {{ $}} 142 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 143 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 144 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 145 ; ALL-NEXT: $cl = COPY [[COPY2]] 146 ; ALL-NEXT: [[SAR32rCL:%[0-9]+]]:gr32 = SAR32rCL [[COPY]], implicit-def dead $eflags, implicit $cl 147 ; ALL-NEXT: $eax = COPY [[SAR32rCL]] 148 ; ALL-NEXT: RET 0, implicit $eax 149 %0(s32) = COPY $edi 150 %1(s32) = COPY $esi 151 %2(s8) = G_TRUNC %1 152 %3(s32) = G_ASHR %0, %2 153 $eax = COPY %3(s32) 154 RET 0, implicit $eax 155 156... 157--- 158name: test_ashr_i32_imm 159alignment: 16 160legalized: true 161regBankSelected: true 162tracksRegLiveness: true 163registers: 164 - { id: 0, class: gpr, preferred-register: '' } 165 - { id: 1, class: gpr, preferred-register: '' } 166 - { id: 2, class: gpr, preferred-register: '' } 167liveins: 168fixedStack: 169stack: 170constants: 171body: | 172 bb.1 (%ir-block.0): 173 liveins: $edi 174 175 ; ALL-LABEL: name: test_ashr_i32_imm 176 ; ALL: liveins: $edi 177 ; ALL-NEXT: {{ $}} 178 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 179 ; ALL-NEXT: [[SAR32ri:%[0-9]+]]:gr32 = SAR32ri [[COPY]], 5, implicit-def dead $eflags 180 ; ALL-NEXT: $eax = COPY [[SAR32ri]] 181 ; ALL-NEXT: RET 0, implicit $eax 182 %0(s32) = COPY $edi 183 %1(s8) = G_CONSTANT i8 5 184 %2(s32) = G_ASHR %0, %1 185 $eax = COPY %2(s32) 186 RET 0, implicit $eax 187 188... 189--- 190name: test_ashr_i16 191alignment: 16 192legalized: true 193regBankSelected: true 194tracksRegLiveness: true 195registers: 196 - { id: 0, class: gpr, preferred-register: '' } 197 - { id: 1, class: gpr, preferred-register: '' } 198 - { id: 2, class: gpr, preferred-register: '' } 199 - { id: 3, class: gpr, preferred-register: '' } 200 - { id: 4, class: gpr, preferred-register: '' } 201liveins: 202fixedStack: 203stack: 204constants: 205body: | 206 bb.1 (%ir-block.0): 207 liveins: $edi, $esi 208 209 ; ALL-LABEL: name: test_ashr_i16 210 ; ALL: liveins: $edi, $esi 211 ; ALL-NEXT: {{ $}} 212 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 213 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 214 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 215 ; ALL-NEXT: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 216 ; ALL-NEXT: $cl = COPY [[COPY3]] 217 ; ALL-NEXT: [[SAR16rCL:%[0-9]+]]:gr16 = SAR16rCL [[COPY2]], implicit-def dead $eflags, implicit $cl 218 ; ALL-NEXT: $ax = COPY [[SAR16rCL]] 219 ; ALL-NEXT: RET 0, implicit $ax 220 %0(s32) = COPY $edi 221 %1(s32) = COPY $esi 222 %2(s16) = G_TRUNC %0(s32) 223 %3(s8) = G_TRUNC %1(s32) 224 %4(s16) = G_ASHR %2, %3 225 $ax = COPY %4(s16) 226 RET 0, implicit $ax 227 228... 229--- 230name: test_ashr_i16_imm 231alignment: 16 232legalized: true 233regBankSelected: true 234tracksRegLiveness: true 235registers: 236 - { id: 0, class: gpr, preferred-register: '' } 237 - { id: 1, class: gpr, preferred-register: '' } 238 - { id: 2, class: gpr, preferred-register: '' } 239 - { id: 3, class: gpr, preferred-register: '' } 240liveins: 241fixedStack: 242stack: 243constants: 244body: | 245 bb.1 (%ir-block.0): 246 liveins: $edi 247 248 ; ALL-LABEL: name: test_ashr_i16_imm 249 ; ALL: liveins: $edi 250 ; ALL-NEXT: {{ $}} 251 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 252 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit 253 ; ALL-NEXT: [[SAR16ri:%[0-9]+]]:gr16 = SAR16ri [[COPY1]], 5, implicit-def dead $eflags 254 ; ALL-NEXT: $ax = COPY [[SAR16ri]] 255 ; ALL-NEXT: RET 0, implicit $ax 256 %0(s32) = COPY $edi 257 %2(s8) = G_CONSTANT i8 5 258 %1(s16) = G_TRUNC %0(s32) 259 %3(s16) = G_ASHR %1, %2 260 $ax = COPY %3(s16) 261 RET 0, implicit $ax 262 263... 264--- 265name: test_ashr_i8 266alignment: 16 267legalized: true 268regBankSelected: true 269tracksRegLiveness: true 270registers: 271 - { id: 0, class: gpr, preferred-register: '' } 272 - { id: 1, class: gpr, preferred-register: '' } 273 - { id: 2, class: gpr, preferred-register: '' } 274 - { id: 3, class: gpr, preferred-register: '' } 275 - { id: 4, class: gpr, preferred-register: '' } 276liveins: 277fixedStack: 278stack: 279constants: 280body: | 281 bb.1 (%ir-block.0): 282 liveins: $edi, $esi 283 284 ; ALL-LABEL: name: test_ashr_i8 285 ; ALL: liveins: $edi, $esi 286 ; ALL-NEXT: {{ $}} 287 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 288 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $esi 289 ; ALL-NEXT: [[COPY2:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 290 ; ALL-NEXT: [[COPY3:%[0-9]+]]:gr8 = COPY [[COPY1]].sub_8bit 291 ; ALL-NEXT: $cl = COPY [[COPY3]] 292 ; ALL-NEXT: [[SAR8rCL:%[0-9]+]]:gr8 = SAR8rCL [[COPY2]], implicit-def dead $eflags, implicit $cl 293 ; ALL-NEXT: $al = COPY [[SAR8rCL]] 294 ; ALL-NEXT: RET 0, implicit $al 295 %0(s32) = COPY $edi 296 %1(s32) = COPY $esi 297 %2(s8) = G_TRUNC %0(s32) 298 %3(s8) = G_TRUNC %1(s32) 299 %4(s8) = G_ASHR %2, %3 300 $al = COPY %4(s8) 301 RET 0, implicit $al 302 303... 304--- 305name: test_ashr_i8_imm 306alignment: 16 307legalized: true 308regBankSelected: true 309tracksRegLiveness: true 310registers: 311 - { id: 0, class: gpr, preferred-register: '' } 312 - { id: 1, class: gpr, preferred-register: '' } 313 - { id: 2, class: gpr, preferred-register: '' } 314 - { id: 3, class: gpr, preferred-register: '' } 315liveins: 316fixedStack: 317stack: 318constants: 319body: | 320 bb.1 (%ir-block.0): 321 liveins: $edi 322 323 ; ALL-LABEL: name: test_ashr_i8_imm 324 ; ALL: liveins: $edi 325 ; ALL-NEXT: {{ $}} 326 ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi 327 ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit 328 ; ALL-NEXT: [[SAR8ri:%[0-9]+]]:gr8 = SAR8ri [[COPY1]], 5, implicit-def dead $eflags 329 ; ALL-NEXT: $al = COPY [[SAR8ri]] 330 ; ALL-NEXT: RET 0, implicit $al 331 %0(s32) = COPY $edi 332 %2(s8) = G_CONSTANT i8 5 333 %1(s8) = G_TRUNC %0(s32) 334 %3(s8) = G_ASHR %1, %2 335 $al = COPY %3(s8) 336 RET 0, implicit $al 337 338... 339