xref: /llvm-project/llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll (revision f0dd12ec5c0169ba5b4363b62d59511181cf954a) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
2; RUN: llc -mtriple=i386-linux-gnu                       -global-isel -verify-machineinstrs < %s | FileCheck %s
3; RUN: llc -mtriple=i386-linux-gnu -regbankselect-greedy -global-isel -verify-machineinstrs < %s | FileCheck %s
4
5;TODO merge with x86-64 tests (many operations not suppored yet)
6
7define i1 @test_load_i1(ptr %p1) {
8; CHECK-LABEL: test_load_i1:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    movl 4(%esp), %eax
11; CHECK-NEXT:    movzbl (%eax), %eax
12; CHECK-NEXT:    retl
13  %r = load i1, ptr %p1
14  ret i1 %r
15}
16
17define i8 @test_load_i8(ptr %p1) {
18; CHECK-LABEL: test_load_i8:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    movl 4(%esp), %eax
21; CHECK-NEXT:    movzbl (%eax), %eax
22; CHECK-NEXT:    retl
23  %r = load i8, ptr %p1
24  ret i8 %r
25}
26
27define i16 @test_load_i16(ptr %p1) {
28; CHECK-LABEL: test_load_i16:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    movl 4(%esp), %eax
31; CHECK-NEXT:    movzwl (%eax), %eax
32; CHECK-NEXT:    retl
33  %r = load i16, ptr %p1
34  ret i16 %r
35}
36
37define i32 @test_load_i32(ptr %p1) {
38; CHECK-LABEL: test_load_i32:
39; CHECK:       # %bb.0:
40; CHECK-NEXT:    movl 4(%esp), %eax
41; CHECK-NEXT:    movl (%eax), %eax
42; CHECK-NEXT:    retl
43  %r = load i32, ptr %p1
44  ret i32 %r
45}
46
47define ptr @test_store_i1(i1 %val, ptr %p1) {
48; CHECK-LABEL: test_store_i1:
49; CHECK:       # %bb.0:
50; CHECK-NEXT:    movl 4(%esp), %ecx
51; CHECK-NEXT:    movl 8(%esp), %eax
52; CHECK-NEXT:    andb $1, %cl
53; CHECK-NEXT:    movb %cl, (%eax)
54; CHECK-NEXT:    retl
55  store i1 %val, ptr %p1
56  ret ptr %p1;
57}
58
59define ptr @test_store_i8(i8 %val, ptr %p1) {
60; CHECK-LABEL: test_store_i8:
61; CHECK:       # %bb.0:
62; CHECK-NEXT:    movl 4(%esp), %ecx
63; CHECK-NEXT:    movl 8(%esp), %eax
64; CHECK-NEXT:    movb %cl, (%eax)
65; CHECK-NEXT:    retl
66  store i8 %val, ptr %p1
67  ret ptr %p1;
68}
69
70define ptr @test_store_i16(i16 %val, ptr %p1) {
71; CHECK-LABEL: test_store_i16:
72; CHECK:       # %bb.0:
73; CHECK-NEXT:    movl 4(%esp), %ecx
74; CHECK-NEXT:    movl 8(%esp), %eax
75; CHECK-NEXT:    movw %cx, (%eax)
76; CHECK-NEXT:    retl
77  store i16 %val, ptr %p1
78  ret ptr %p1;
79}
80
81define ptr @test_store_i32(i32 %val, ptr %p1) {
82; CHECK-LABEL: test_store_i32:
83; CHECK:       # %bb.0:
84; CHECK-NEXT:    movl 4(%esp), %ecx
85; CHECK-NEXT:    movl 8(%esp), %eax
86; CHECK-NEXT:    movl %ecx, (%eax)
87; CHECK-NEXT:    retl
88  store i32 %val, ptr %p1
89  ret ptr %p1;
90}
91
92define ptr @test_load_ptr(ptr %ptr1) {
93; CHECK-LABEL: test_load_ptr:
94; CHECK:       # %bb.0:
95; CHECK-NEXT:    movl 4(%esp), %eax
96; CHECK-NEXT:    movl (%eax), %eax
97; CHECK-NEXT:    retl
98  %p = load ptr, ptr %ptr1
99  ret ptr %p
100}
101
102define void @test_store_ptr(ptr %ptr1, ptr %a) {
103; CHECK-LABEL: test_store_ptr:
104; CHECK:       # %bb.0:
105; CHECK-NEXT:    movl 4(%esp), %eax
106; CHECK-NEXT:    movl 8(%esp), %ecx
107; CHECK-NEXT:    movl %ecx, (%eax)
108; CHECK-NEXT:    retl
109  store ptr %a, ptr %ptr1
110  ret void
111}
112