xref: /llvm-project/llvm/test/CodeGen/X86/GlobalISel/legalize-leading-zeros.mir (revision 0342aefa32efe91780c9c39c17e8c68c2684d26f)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
2# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+lzcnt -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64
3# RUN: llc -mtriple=i386-linux-gnu -mattr=+lzcnt -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*'  %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
4# RUN: FileCheck -check-prefix=ERR32  %s < %t
5
6# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %10:_(s64) = G_CTLZ_ZERO_UNDEF %4:_(s32) (in function: test_ctlz64)
7
8# test count leading zeros for s16, s32, and s64
9
10---
11name:            test_ctlz35
12alignment:       16
13legalized:       false
14regBankSelected: false
15registers:
16  - { id: 0, class: _, preferred-register: '' }
17body:             |
18  bb.1:
19    ; X64-LABEL: name: test_ctlz35
20    ; X64: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
21    ; X64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 34359738367
22    ; X64-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
23    ; X64-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[AND]](s64)
24    ; X64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 29
25    ; X64-NEXT: [[SUB:%[0-9]+]]:_(s64) = G_SUB [[CTLZ]], [[C1]]
26    ; X64-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[SUB]], [[C]]
27    ; X64-NEXT: RET 0, implicit [[AND1]](s64)
28    ; X86-LABEL: name: test_ctlz35
29    ; X86: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
30    ; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[COPY]](s64)
31    ; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s35)
32    ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ZEXT]](s64)
33    ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
34    ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]]
35    ; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32)
36    ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
37    ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]]
38    ; X86-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF [[UV1]](s32)
39    ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
40    ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ_ZERO_UNDEF]](s64)
41    ; X86-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
42    ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT1]](s32), [[UV2]], [[UV4]]
43    ; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT1]](s32), [[UV3]], [[UV5]]
44    ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
45    ; X86-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
46    ; X86-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C2]](s32), [[C]](s32)
47    ; X86-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64)
48    ; X86-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV1]](s64)
49    ; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s1) = G_USUBO [[UV6]], [[UV8]]
50    ; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s1) = G_USUBE [[UV7]], [[UV9]], [[USUBO1]]
51    ; X86-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
52    ; X86-NEXT: [[TRUNC1:%[0-9]+]]:_(s35) = G_TRUNC [[MV2]](s64)
53    ; X86-NEXT: [[ZEXT2:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC1]](s35)
54    ; X86-NEXT: RET 0, implicit [[ZEXT2]](s64)
55    %0(s64) = COPY $rdx
56    %1:_(s35) = G_TRUNC %0(s64)
57    %2:_(s35) = G_CTLZ %1
58    %3:_(s64) = G_ZEXT %2
59    RET 0, implicit %3
60...
61---
62name:            test_ctlz8
63alignment:       16
64legalized:       false
65regBankSelected: false
66registers:
67  - { id: 0, class: _, preferred-register: '' }
68  - { id: 1, class: _, preferred-register: '' }
69body:             |
70  bb.1:
71    ; CHECK-LABEL: name: test_ctlz8
72    ; CHECK: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
73    ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[DEF]](s8)
74    ; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s16) = G_CTLZ [[ZEXT]](s16)
75    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
76    ; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s16) = G_SUB [[CTLZ]], [[C]]
77    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SUB]](s16)
78    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY [[TRUNC]](s8)
79    ; CHECK-NEXT: RET 0, implicit [[COPY]](s8)
80    %0:_(s8) = IMPLICIT_DEF
81    %1:_(s8) = G_CTLZ %0
82    %2:_(s8) = COPY %1(s8)
83    RET 0, implicit %2
84...
85---
86name:            test_ctlz64
87alignment:       16
88legalized:       false
89regBankSelected: false
90registers:
91  - { id: 0, class: _, preferred-register: '' }
92  - { id: 1, class: _, preferred-register: '' }
93body:             |
94  bb.1:
95    ; X64-LABEL: name: test_ctlz64
96    ; X64: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
97    ; X64-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[DEF]](s64)
98    ; X64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[CTLZ]](s64)
99    ; X64-NEXT: RET 0, implicit [[COPY]](s64)
100    ; X86-LABEL: name: test_ctlz64
101    ; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
102    ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
103    ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
104    ; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]]
105    ; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32)
106    ; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
107    ; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]]
108    ; X86-NEXT: [[CTLZ_ZERO_UNDEF:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_UNDEF [[UV1]](s32)
109    ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
110    ; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ_ZERO_UNDEF]](s64)
111    ; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
112    ; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[UV2]], [[UV4]]
113    ; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[UV3]], [[UV5]]
114    ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
115    ; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
116    ; X86-NEXT: RET 0, implicit [[COPY]](s64)
117    %0:_(s64) = IMPLICIT_DEF
118    %1:_(s64) = G_CTLZ %0
119    %2:_(s64) = COPY %1(s64)
120    RET 0, implicit %2
121...
122---
123name:            test_ctlz32
124alignment:       16
125legalized:       false
126regBankSelected: false
127registers:
128  - { id: 0, class: _, preferred-register: '' }
129  - { id: 1, class: _, preferred-register: '' }
130body:             |
131  bb.1:
132    ; CHECK-LABEL: name: test_ctlz32
133    ; CHECK: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
134    ; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s32) = G_CTLZ [[DEF]](s32)
135    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[CTLZ]](s32)
136    ; CHECK-NEXT: RET 0, implicit [[COPY]](s32)
137    %0:_(s32) = IMPLICIT_DEF
138    %1:_(s32) = G_CTLZ %0
139    %2:_(s32) = COPY %1(s32)
140    RET 0, implicit %2
141...
142---
143name:            test_ctlz16
144alignment:       16
145legalized:       false
146regBankSelected: false
147registers:
148  - { id: 0, class: _, preferred-register: '' }
149  - { id: 1, class: _, preferred-register: '' }
150body:             |
151  bb.1:
152    ; CHECK-LABEL: name: test_ctlz16
153    ; CHECK: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
154    ; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s16) = G_CTLZ [[DEF]](s16)
155    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[CTLZ]](s16)
156    ; CHECK-NEXT: RET 0, implicit [[COPY]](s16)
157    %0:_(s16) = IMPLICIT_DEF
158    %1:_(s16) = G_CTLZ %0
159    %2:_(s16) = COPY %1(s16)
160    RET 0, implicit %2
161...
162