xref: /llvm-project/llvm/test/CodeGen/X86/GlobalISel/legalize-cmp.mir (revision 373c343a77a7afaa07179db1754a52b620dfaf2e)
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
3
4--- |
5  define i32 @test_cmp_i8(i8 %a, i8 %b) {
6    %r = icmp ult i8 %a, %b
7    %res = zext i1 %r to i32
8    ret i32 %res
9  }
10
11  define i32 @test_cmp_i16(i16 %a, i16 %b) {
12    %r = icmp ult i16 %a, %b
13    %res = zext i1 %r to i32
14    ret i32 %res
15  }
16
17  define i32 @test_cmp_i32(i32 %a, i32 %b) {
18    %r = icmp ult i32 %a, %b
19    %res = zext i1 %r to i32
20    ret i32 %res
21  }
22
23  define i32 @test_cmp_i64(i64 %a, i64 %b) {
24    %r = icmp ult i64 %a, %b
25    %res = zext i1 %r to i32
26    ret i32 %res
27  }
28
29  define i32 @test_cmp_p0(ptr %a, ptr %b) {
30    %r = icmp ult ptr %a, %b
31    %res = zext i1 %r to i32
32    ret i32 %res
33  }
34
35...
36---
37name:            test_cmp_i8
38alignment:       16
39legalized:       false
40regBankSelected: false
41registers:
42  - { id: 0, class: _ }
43  - { id: 1, class: _ }
44  - { id: 2, class: _ }
45  - { id: 3, class: _ }
46body:             |
47  bb.1 (%ir-block.0):
48    liveins: $edi, $esi
49
50    ; CHECK-LABEL: name: test_cmp_i8
51    ; CHECK: liveins: $edi, $esi
52    ; CHECK-NEXT: {{  $}}
53    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dil
54    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s8) = COPY $sil
55    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](s8), [[COPY1]]
56    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
57    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
58    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]]
59    ; CHECK-NEXT: $eax = COPY [[AND]](s32)
60    ; CHECK-NEXT: RET 0, implicit $eax
61    %0(s8) = COPY $dil
62    %1(s8) = COPY $sil
63    %2(s1) = G_ICMP intpred(ult), %0(s8), %1
64    %3(s32) = G_ZEXT %2(s1)
65    $eax = COPY %3(s32)
66    RET 0, implicit $eax
67
68...
69---
70name:            test_cmp_i16
71alignment:       16
72legalized:       false
73regBankSelected: false
74registers:
75  - { id: 0, class: _ }
76  - { id: 1, class: _ }
77  - { id: 2, class: _ }
78  - { id: 3, class: _ }
79body:             |
80  bb.1 (%ir-block.0):
81    liveins: $edi, $esi
82
83    ; CHECK-LABEL: name: test_cmp_i16
84    ; CHECK: liveins: $edi, $esi
85    ; CHECK-NEXT: {{  $}}
86    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di
87    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $si
88    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](s16), [[COPY1]]
89    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
90    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
91    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]]
92    ; CHECK-NEXT: $eax = COPY [[AND]](s32)
93    ; CHECK-NEXT: RET 0, implicit $eax
94    %0(s16) = COPY $di
95    %1(s16) = COPY $si
96    %2(s1) = G_ICMP intpred(ult), %0(s16), %1
97    %3(s32) = G_ZEXT %2(s1)
98    $eax = COPY %3(s32)
99    RET 0, implicit $eax
100
101...
102---
103name:            test_cmp_i32
104alignment:       16
105legalized:       false
106regBankSelected: false
107registers:
108  - { id: 0, class: _ }
109  - { id: 1, class: _ }
110  - { id: 2, class: _ }
111  - { id: 3, class: _ }
112body:             |
113  bb.1 (%ir-block.0):
114    liveins: $edi, $esi
115
116    ; CHECK-LABEL: name: test_cmp_i32
117    ; CHECK: liveins: $edi, $esi
118    ; CHECK-NEXT: {{  $}}
119    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
120    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
121    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY1]]
122    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
123    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
124    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]]
125    ; CHECK-NEXT: $eax = COPY [[AND]](s32)
126    ; CHECK-NEXT: RET 0, implicit $eax
127    %0(s32) = COPY $edi
128    %1(s32) = COPY $esi
129    %2(s1) = G_ICMP intpred(ult), %0(s32), %1
130    %3(s32) = G_ZEXT %2(s1)
131    $eax = COPY %3(s32)
132    RET 0, implicit $eax
133
134...
135---
136name:            test_cmp_i64
137alignment:       16
138legalized:       false
139regBankSelected: false
140registers:
141  - { id: 0, class: _ }
142  - { id: 1, class: _ }
143  - { id: 2, class: _ }
144  - { id: 3, class: _ }
145body:             |
146  bb.1 (%ir-block.0):
147    liveins: $rdi, $rsi
148
149    ; CHECK-LABEL: name: test_cmp_i64
150    ; CHECK: liveins: $rdi, $rsi
151    ; CHECK-NEXT: {{  $}}
152    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
153    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi
154    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](s64), [[COPY1]]
155    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
156    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
157    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]]
158    ; CHECK-NEXT: $eax = COPY [[AND]](s32)
159    ; CHECK-NEXT: RET 0, implicit $eax
160    %0(s64) = COPY $rdi
161    %1(s64) = COPY $rsi
162    %2(s1) = G_ICMP intpred(ult), %0(s64), %1
163    %3(s32) = G_ZEXT %2(s1)
164    $eax = COPY %3(s32)
165    RET 0, implicit $eax
166
167...
168---
169name:            test_cmp_p0
170alignment:       16
171legalized:       false
172regBankSelected: false
173registers:
174  - { id: 0, class: _ }
175  - { id: 1, class: _ }
176  - { id: 2, class: _ }
177  - { id: 3, class: _ }
178body:             |
179  bb.1 (%ir-block.0):
180    liveins: $rdi, $rsi
181
182    ; CHECK-LABEL: name: test_cmp_p0
183    ; CHECK: liveins: $rdi, $rsi
184    ; CHECK-NEXT: {{  $}}
185    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $rdi
186    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $rsi
187    ; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(ult), [[COPY]](p0), [[COPY1]]
188    ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ICMP]](s8)
189    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
190    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C]]
191    ; CHECK-NEXT: $eax = COPY [[AND]](s32)
192    ; CHECK-NEXT: RET 0, implicit $eax
193    %0(p0) = COPY $rdi
194    %1(p0) = COPY $rsi
195    %2(s1) = G_ICMP intpred(ult), %0(p0), %1
196    %3(s32) = G_ZEXT %2(s1)
197    $eax = COPY %3(s32)
198    RET 0, implicit $eax
199
200...
201