xref: /llvm-project/llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll (revision 4e681fad46868c1c68a5ff9193447eb245824ca1)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-linux-gnu    -global-isel -verify-machineinstrs -global-isel-abort=2 < %s -o - | FileCheck %s --check-prefix=X64
3
4; TODO merge with ext.ll after i64 sext supported on 32bit platform
5
6define i64 @test_zext_i1(i8 %a) {
7; X64-LABEL: test_zext_i1:
8; X64:       # %bb.0:
9; X64-NEXT:    movl %edi, %eax
10; X64-NEXT:    andq $1, %rax
11; X64-NEXT:    retq
12  %val = trunc i8 %a to i1
13  %r = zext i1 %val to i64
14  ret i64 %r
15}
16
17define i64 @test_sext_i8(i8 %val) {
18; X64-LABEL: test_sext_i8:
19; X64:       # %bb.0:
20; X64-NEXT:    movl %edi, %eax
21; X64-NEXT:    shlq $56, %rax
22; X64-NEXT:    sarq $56, %rax
23; X64-NEXT:    retq
24  %r = sext i8 %val to i64
25  ret i64 %r
26}
27
28define i64 @test_sext_i16(i16 %val) {
29; X64-LABEL: test_sext_i16:
30; X64:       # %bb.0:
31; X64-NEXT:    movl %edi, %eax
32; X64-NEXT:    shlq $48, %rax
33; X64-NEXT:    sarq $48, %rax
34; X64-NEXT:    retq
35  %r = sext i16 %val to i64
36  ret i64 %r
37}
38
39define i64 @test_sext_i32(i32 %val) {
40; X64-LABEL: test_sext_i32:
41; X64:       # %bb.0:
42; X64-NEXT:    movslq %edi, %rax
43; X64-NEXT:    retq
44  %r = sext i32 %val to i64
45  ret i64 %r
46}
47
48define i64 @test_zext_i8_to_i64(i8 %x, i8 %y) {
49; X64-LABEL: test_zext_i8_to_i64:
50; X64:       # %bb.0:
51; X64-NEXT:    addb %dil, %sil
52; X64-NEXT:    movzbl %sil, %eax
53; X64-NEXT:    retq
54  %a = add i8 %x, %y
55  %b = zext i8 %a to i64
56  ret i64 %b
57}
58
59define i64 @test_zext_i16_to_i64(i16 %x, i16 %y) {
60; X64-LABEL: test_zext_i16_to_i64:
61; X64:       # %bb.0:
62; X64-NEXT:    addw %di, %si
63; X64-NEXT:    movzwl %si, %eax
64; X64-NEXT:    retq
65  %a = add i16 %x, %y
66  %b = zext i16 %a to i64
67  ret i64 %b
68}
69
70define i64 @test_zext_i32_to_i64(i32 %x, i32 %y) {
71; X64-LABEL: test_zext_i32_to_i64:
72; X64:       # %bb.0:
73; X64-NEXT:    addl %edi, %esi
74; X64-NEXT:    movl %esi, %eax
75; X64-NEXT:    retq
76  %a = add i32 %x, %y
77  %b = zext i32 %a to i64
78  ret i64 %b
79}
80