1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 | FileCheck %s 3 4target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" 5declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind 6 7define fastcc i32 @cli_magic_scandesc(ptr %in) nounwind ssp { 8; CHECK-LABEL: cli_magic_scandesc: 9; CHECK: # %bb.0: # %entry 10; CHECK-NEXT: subq $72, %rsp 11; CHECK-NEXT: movq __stack_chk_guard(%rip), %rax 12; CHECK-NEXT: movq %rax, {{[0-9]+}}(%rsp) 13; CHECK-NEXT: movzbl (%rsp), %eax 14; CHECK-NEXT: movzbl {{[0-9]+}}(%rsp), %ecx 15; CHECK-NEXT: movq (%rdi), %rdx 16; CHECK-NEXT: movq 8(%rdi), %rsi 17; CHECK-NEXT: movq %rdx, (%rsp) 18; CHECK-NEXT: movq 24(%rdi), %rdx 19; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp) 20; CHECK-NEXT: movq %rsi, {{[0-9]+}}(%rsp) 21; CHECK-NEXT: movq 16(%rdi), %rdx 22; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp) 23; CHECK-NEXT: movq 32(%rdi), %rdx 24; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp) 25; CHECK-NEXT: movq 40(%rdi), %rdx 26; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp) 27; CHECK-NEXT: movq 48(%rdi), %rdx 28; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp) 29; CHECK-NEXT: movq 56(%rdi), %rdx 30; CHECK-NEXT: movq %rdx, {{[0-9]+}}(%rsp) 31; CHECK-NEXT: movb %al, (%rsp) 32; CHECK-NEXT: movb %cl, {{[0-9]+}}(%rsp) 33; CHECK-NEXT: movq __stack_chk_guard(%rip), %rax 34; CHECK-NEXT: cmpq {{[0-9]+}}(%rsp), %rax 35; CHECK-NEXT: jne .LBB0_2 36; CHECK-NEXT: # %bb.1: # %entry 37; CHECK-NEXT: xorl %eax, %eax 38; CHECK-NEXT: addq $72, %rsp 39; CHECK-NEXT: retq 40; CHECK-NEXT: .LBB0_2: # %entry 41; CHECK-NEXT: callq __stack_chk_fail@PLT 42entry: 43 %a = alloca [64 x i8] 44 %c = getelementptr inbounds [64 x i8], ptr %a, i64 0, i32 30 45 %d = load i8, ptr %a, align 8 46 %e = load i8, ptr %c, align 8 47 call void @llvm.memcpy.p0.p0.i64(ptr align 8 %a, ptr align 8 %in, i64 64, i1 false) nounwind 48 store i8 %d, ptr %a, align 8 49 store i8 %e, ptr %c, align 8 50 ret i32 0 51} 52 53!llvm.module.flags = !{!0} 54!0 = !{i32 7, !"direct-access-external-data", i32 1} 55