xref: /llvm-project/llvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll (revision e018cbf7208b3d34f18997ddee84c66cee32fb1b)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i386-apple-darwin -O0 -regalloc=fast | FileCheck %s
3; rdar://6787136
4
5	%struct.X = type { i8, [32 x i8] }
6@llvm.used = appending global [1 x ptr] [ptr @z], section "llvm.metadata"		; <ptr> [#uses=0]
7
8define i32 @z() nounwind ssp {
9; CHECK-LABEL: z:
10; CHECK:       ## %bb.0: ## %entry
11; CHECK-NEXT:    pushl %edi
12; CHECK-NEXT:    pushl %esi
13; CHECK-NEXT:    subl $148, %esp
14; CHECK-NEXT:    movl L___stack_chk_guard$non_lazy_ptr, %eax
15; CHECK-NEXT:    movl (%eax), %eax
16; CHECK-NEXT:    movl %eax, {{[0-9]+}}(%esp)
17; CHECK-NEXT:    movb $48, {{[0-9]+}}(%esp)
18; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %al
19; CHECK-NEXT:    movb %al, {{[0-9]+}}(%esp)
20; CHECK-NEXT:    movb $15, {{[0-9]+}}(%esp)
21; CHECK-NEXT:    movl %esp, %eax
22; CHECK-NEXT:    movl $8, %ecx
23; CHECK-NEXT:    movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
24; CHECK-NEXT:    leal {{[0-9]+}}(%esp), %esi
25; CHECK-NEXT:    movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
26; CHECK-NEXT:    movl %eax, %edi
27; CHECK-NEXT:    rep;movsl (%esi), %es:(%edi)
28; CHECK-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %esi ## 4-byte Reload
29; CHECK-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx ## 4-byte Reload
30; CHECK-NEXT:    movl %eax, %edi
31; CHECK-NEXT:    addl $36, %edi
32; CHECK-NEXT:    rep;movsl (%esi), %es:(%edi)
33; CHECK-NEXT:    movb {{[0-9]+}}(%esp), %cl
34; CHECK-NEXT:    movb %cl, 32(%eax)
35; CHECK-NEXT:    movb %cl, 68(%eax)
36; CHECK-NEXT:    calll _f
37; CHECK-NEXT:    movl %eax, {{[0-9]+}}(%esp)
38; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
39; CHECK-NEXT:    movl %eax, {{[0-9]+}}(%esp)
40; CHECK-NEXT:  ## %bb.1: ## %return
41; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
42; CHECK-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) ## 4-byte Spill
43; CHECK-NEXT:    movl L___stack_chk_guard$non_lazy_ptr, %eax
44; CHECK-NEXT:    movl (%eax), %eax
45; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
46; CHECK-NEXT:    cmpl %ecx, %eax
47; CHECK-NEXT:    jne LBB0_3
48; CHECK-NEXT:  ## %bb.2: ## %SP_return
49; CHECK-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax ## 4-byte Reload
50; CHECK-NEXT:    addl $148, %esp
51; CHECK-NEXT:    popl %esi
52; CHECK-NEXT:    popl %edi
53; CHECK-NEXT:    retl
54; CHECK-NEXT:  LBB0_3: ## %CallStackCheckFailBlk
55; CHECK-NEXT:    calll ___stack_chk_fail
56entry:
57	%retval = alloca i32		; <ptr> [#uses=2]
58	%xxx = alloca %struct.X		; <ptr> [#uses=6]
59	%0 = alloca i32		; <ptr> [#uses=2]
60	%"alloca point" = bitcast i32 0 to i32		; <i32> [#uses=0]
61	%1 = getelementptr %struct.X, ptr %xxx, i32 0, i32 1		; <ptr> [#uses=1]
62	%2 = getelementptr [32 x i8], ptr %1, i32 0, i32 31		; <ptr> [#uses=1]
63	store i8 48, ptr %2, align 1
64	%3 = getelementptr %struct.X, ptr %xxx, i32 0, i32 1		; <ptr> [#uses=1]
65	%4 = getelementptr [32 x i8], ptr %3, i32 0, i32 31		; <ptr> [#uses=1]
66	%5 = load i8, ptr %4, align 1		; <i8> [#uses=1]
67	%6 = getelementptr %struct.X, ptr %xxx, i32 0, i32 1		; <ptr> [#uses=1]
68	%7 = getelementptr [32 x i8], ptr %6, i32 0, i32 0		; <ptr> [#uses=1]
69	store i8 %5, ptr %7, align 1
70	%8 = getelementptr %struct.X, ptr %xxx, i32 0, i32 0		; <ptr> [#uses=1]
71	store i8 15, ptr %8, align 1
72	%9 = call i32 (...) @f(ptr byval(%struct.X) align 4 %xxx, ptr byval(%struct.X) align 4 %xxx) nounwind		; <i32> [#uses=1]
73	store i32 %9, ptr %0, align 4
74	%10 = load i32, ptr %0, align 4		; <i32> [#uses=1]
75	store i32 %10, ptr %retval, align 4
76	br label %return
77
78return:		; preds = %entry
79	%retval1 = load i32, ptr %retval		; <i32> [#uses=1]
80	ret i32 %retval1
81}
82
83declare i32 @f(ptr byval(%struct.X) align 4, ptr byval(%struct.X) align 4) nounwind ssp
84
85!llvm.module.flags = !{!0}
86!0 = !{i32 7, !"PIC Level", i32 2}
87