1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; radr://6772169 3; RUN: llc < %s -fast-isel | FileCheck %s --check-prefix=FASTISEL 4; PR30981 5; RUN: llc < %s -O0 -mcpu=x86-64 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F 6target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" 7target triple = "x86_64-apple-darwin10" 8 9declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind 10 11define fastcc i32 @test() nounwind { 12; FASTISEL-LABEL: test: 13; FASTISEL: ## %bb.0: ## %entry 14; FASTISEL-NEXT: movl $1, %eax 15; FASTISEL-NEXT: addl $0, %eax 16; FASTISEL-NEXT: xorl %eax, %eax 17; FASTISEL-NEXT: retq 18; 19; AVX512F-LABEL: test: 20; AVX512F: ## %bb.0: ## %entry 21; AVX512F-NEXT: movl $1, %eax 22; AVX512F-NEXT: addl $0, %eax 23; AVX512F-NEXT: seto %al 24; AVX512F-NEXT: jo LBB0_2 25; AVX512F-NEXT: ## %bb.1: ## %BB3 26; AVX512F-NEXT: LBB0_2: ## %.backedge 27; AVX512F-NEXT: xorl %eax, %eax 28; AVX512F-NEXT: retq 29entry: 30 %tmp1 = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 1, i32 0) 31 %tmp2 = extractvalue { i32, i1 } %tmp1, 1 32 br i1 %tmp2, label %.backedge, label %BB3 33 34BB3: 35 %tmp4 = extractvalue { i32, i1 } %tmp1, 0 36 br label %.backedge 37 38.backedge: 39 ret i32 0 40} 41