xref: /llvm-project/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll (revision a4951eca40c070e020aa5d2689c08177fbeb780d)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s
3; PR1872
4
5	%struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
6	%struct.c34007g__pkg__parent = type { ptr, ptr }
7
8define void @_ada_c34007g() {
9; CHECK-LABEL: _ada_c34007g:
10; CHECK:       # %bb.0: # %entry
11; CHECK-NEXT:    pushl %ebp
12; CHECK-NEXT:    .cfi_def_cfa_offset 8
13; CHECK-NEXT:    .cfi_offset %ebp, -8
14; CHECK-NEXT:    movl %esp, %ebp
15; CHECK-NEXT:    .cfi_def_cfa_register %ebp
16; CHECK-NEXT:    andl $-8, %esp
17; CHECK-NEXT:    subl $8, %esp
18; CHECK-NEXT:    movl (%esp), %eax
19; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
20; CHECK-NEXT:    orl %eax, %ecx
21; CHECK-NEXT:    sete %cl
22; CHECK-NEXT:    testl %eax, %eax
23; CHECK-NEXT:    setne %al
24; CHECK-NEXT:    testb %cl, %al
25; CHECK-NEXT:    movl %ebp, %esp
26; CHECK-NEXT:    popl %ebp
27; CHECK-NEXT:    .cfi_def_cfa %esp, 4
28; CHECK-NEXT:    retl
29entry:
30	%x8 = alloca %struct.c34007g__pkg__parent, align 8		; <ptr> [#uses=2]
31	%tmp1272 = getelementptr %struct.c34007g__pkg__parent, ptr %x8, i32 0, i32 0		; <ptr> [#uses=1]
32	br i1 true, label %bb4668, label %bb848
33
34bb4668:		; preds = %bb4648
35	%tmp5464 = load i64, ptr %x8, align 8		; <i64> [#uses=1]
36	%tmp5467 = icmp ne i64 0, %tmp5464		; <i1> [#uses=1]
37	%tmp5470 = load ptr, ptr %tmp1272, align 8		; <ptr> [#uses=1]
38	%tmp5471 = icmp eq ptr %tmp5470, null		; <i1> [#uses=1]
39	%tmp5475 = or i1 %tmp5471, %tmp5467		; <i1> [#uses=1]
40	%tmp5497 = or i1 %tmp5475, false		; <i1> [#uses=1]
41	br i1 %tmp5497, label %bb848, label %bb5507
42
43bb848:		; preds = %entry
44	ret void
45
46bb5507:		; preds = %bb4668
47	ret void
48}
49