xref: /llvm-project/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-- | FileCheck %s
3
4@X = global i32 0               ; <ptr> [#uses=1]
5
6define i32 @_Z3fooi(i32 %x)   {
7; CHECK-LABEL: _Z3fooi:
8; CHECK:       # %bb.0: # %entry
9; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
10; CHECK-NEXT:    movl %eax, X
11; CHECK-NEXT:    movsbl %al, %eax
12; CHECK-NEXT:    retl
13entry:
14        store i32 %x, ptr @X, align 4
15        %retval67 = trunc i32 %x to i8          ; <i8> [#uses=1]
16        %retval = sext i8 %retval67 to i32
17        ret i32 %retval
18}
19