xref: /llvm-project/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll (revision 2f448bf509432c1a19ec46ab8cbc7353c03c6280)
1; RUN: llc < %s -mtriple=i686--
2	%struct.expr = type { ptr, i32, ptr, ptr, ptr, ptr }
3	%struct.hash_table = type { ptr, i32, i32, i32 }
4	%struct.occr = type { ptr, ptr, i8, i8 }
5	%struct.rtx_def = type { i16, i8, i8, %struct.u }
6	%struct.u = type { [1 x i64] }
7
8define void @test() {
9	%tmp = load i32, ptr null		; <i32> [#uses=1]
10	%tmp8 = call i32 @hash_rtx( )		; <i32> [#uses=1]
11	%tmp11 = urem i32 %tmp8, %tmp		; <i32> [#uses=1]
12	br i1 false, label %cond_next, label %return
13
14cond_next:		; preds = %0
15	%gep.upgrd.1 = zext i32 %tmp11 to i64		; <i64> [#uses=1]
16	%tmp17 = getelementptr ptr, ptr null, i64 %gep.upgrd.1		; <ptr> [#uses=0]
17	ret void
18
19return:		; preds = %0
20	ret void
21}
22
23declare i32 @hash_rtx()
24