1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s 3 4; Regression test for an issue in which DAG combines created a constant i8x16 5; vector with lane values of 255, which was outside the -128 to 127 range 6; expected by our ISel patterns (and similar for the i16 version) and caused an 7; ISel failure. The fix was to adjust out-of-range values manually in 8; BUILD_VECTOR lowering. 9 10target triple = "wasm32-unknown-unknown" 11 12define <4 x i8> @test_i8(<4 x i8> %b) { 13; CHECK-LABEL: test_i8: 14; CHECK: .functype test_i8 (v128) -> (v128) 15; CHECK-NEXT: # %bb.0: 16; CHECK-NEXT: v128.const 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 17; CHECK-NEXT: local.get 0 18; CHECK-NEXT: v128.andnot 19; CHECK-NEXT: # fallthrough-return 20 %c = and <4 x i8> %b, <i8 1, i8 1, i8 1, i8 1> 21 %d = xor <4 x i8> %c, <i8 1, i8 1, i8 1, i8 1> 22 ret <4 x i8> %d 23} 24 25define <4 x i16> @test_i16(<4 x i16> %b) { 26; CHECK-LABEL: test_i16: 27; CHECK: .functype test_i16 (v128) -> (v128) 28; CHECK-NEXT: # %bb.0: 29; CHECK-NEXT: v128.const 1, 1, 1, 1, 1, 1, 1, 1 30; CHECK-NEXT: local.get 0 31; CHECK-NEXT: v128.andnot 32; CHECK-NEXT: # fallthrough-return 33 %c = and <4 x i16> %b, <i16 1, i16 1, i16 1, i16 1> 34 %d = xor <4 x i16> %c, <i16 1, i16 1, i16 1, i16 1> 35 ret <4 x i16> %d 36} 37