xref: /llvm-project/llvm/test/CodeGen/VE/Vector/vp_fdiv.ll (revision 5240e0b891fc4bf69d362199f70c94c28a7b9465) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
3
4declare <256 x float> @llvm.vp.fdiv.v256f32(<256 x float>, <256 x float>, <256 x i1>, i32)
5
6define fastcc <256 x float> @test_vp_fdiv_v256f32_vv(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %n) {
7; CHECK-LABEL: test_vp_fdiv_v256f32_vv:
8; CHECK:       # %bb.0:
9; CHECK-NEXT:    and %s0, %s0, (32)0
10; CHECK-NEXT:    lvl %s0
11; CHECK-NEXT:    vfdiv.s %v0, %v0, %v1, %vm1
12; CHECK-NEXT:    b.l.t (, %s10)
13  %r0 = call <256 x float> @llvm.vp.fdiv.v256f32(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %n)
14  ret <256 x float> %r0
15}
16
17define fastcc <256 x float> @test_vp_fdiv_v256f32_rv(float %s0, <256 x float> %i1, <256 x i1> %m, i32 %n) {
18; CHECK-LABEL: test_vp_fdiv_v256f32_rv:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    and %s1, %s1, (32)0
21; CHECK-NEXT:    lvl %s1
22; CHECK-NEXT:    vfdiv.s %v0, %s0, %v0, %vm1
23; CHECK-NEXT:    b.l.t (, %s10)
24  %xins = insertelement <256 x float> undef, float %s0, i32 0
25  %i0 = shufflevector <256 x float> %xins, <256 x float> undef, <256 x i32> zeroinitializer
26  %r0 = call <256 x float> @llvm.vp.fdiv.v256f32(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %n)
27  ret <256 x float> %r0
28}
29
30define fastcc <256 x float> @test_vp_fdiv_v256f32_vr(<256 x float> %i0, float %s1, <256 x i1> %m, i32 %n) {
31; CHECK-LABEL: test_vp_fdiv_v256f32_vr:
32; CHECK:       # %bb.0:
33; CHECK-NEXT:    and %s1, %s1, (32)0
34; CHECK-NEXT:    lvl %s1
35; CHECK-NEXT:    vfdiv.s %v0, %v0, %s0, %vm1
36; CHECK-NEXT:    b.l.t (, %s10)
37  %yins = insertelement <256 x float> undef, float %s1, i32 0
38  %i1 = shufflevector <256 x float> %yins, <256 x float> undef, <256 x i32> zeroinitializer
39  %r0 = call <256 x float> @llvm.vp.fdiv.v256f32(<256 x float> %i0, <256 x float> %i1, <256 x i1> %m, i32 %n)
40  ret <256 x float> %r0
41}
42
43
44declare <256 x double> @llvm.vp.fdiv.v256f64(<256 x double>, <256 x double>, <256 x i1>, i32)
45
46define fastcc <256 x double> @test_vp_fdiv_v256f64_vv(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %n) {
47; CHECK-LABEL: test_vp_fdiv_v256f64_vv:
48; CHECK:       # %bb.0:
49; CHECK-NEXT:    and %s0, %s0, (32)0
50; CHECK-NEXT:    lvl %s0
51; CHECK-NEXT:    vfdiv.d %v0, %v0, %v1, %vm1
52; CHECK-NEXT:    b.l.t (, %s10)
53  %r0 = call <256 x double> @llvm.vp.fdiv.v256f64(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %n)
54  ret <256 x double> %r0
55}
56
57define fastcc <256 x double> @test_vp_fdiv_v256f64_rv(double %s0, <256 x double> %i1, <256 x i1> %m, i32 %n) {
58; CHECK-LABEL: test_vp_fdiv_v256f64_rv:
59; CHECK:       # %bb.0:
60; CHECK-NEXT:    and %s1, %s1, (32)0
61; CHECK-NEXT:    lvl %s1
62; CHECK-NEXT:    vfdiv.d %v0, %s0, %v0, %vm1
63; CHECK-NEXT:    b.l.t (, %s10)
64  %xins = insertelement <256 x double> undef, double %s0, i32 0
65  %i0 = shufflevector <256 x double> %xins, <256 x double> undef, <256 x i32> zeroinitializer
66  %r0 = call <256 x double> @llvm.vp.fdiv.v256f64(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %n)
67  ret <256 x double> %r0
68}
69
70define fastcc <256 x double> @test_vp_fdiv_v256f64_vr(<256 x double> %i0, double %s1, <256 x i1> %m, i32 %n) {
71; CHECK-LABEL: test_vp_fdiv_v256f64_vr:
72; CHECK:       # %bb.0:
73; CHECK-NEXT:    and %s1, %s1, (32)0
74; CHECK-NEXT:    lvl %s1
75; CHECK-NEXT:    vfdiv.d %v0, %v0, %s0, %vm1
76; CHECK-NEXT:    b.l.t (, %s10)
77  %yins = insertelement <256 x double> undef, double %s1, i32 0
78  %i1 = shufflevector <256 x double> %yins, <256 x double> undef, <256 x i32> zeroinitializer
79  %r0 = call <256 x double> @llvm.vp.fdiv.v256f64(<256 x double> %i0, <256 x double> %i1, <256 x i1> %m, i32 %n)
80  ret <256 x double> %r0
81}
82