xref: /llvm-project/llvm/test/CodeGen/VE/Vector/vec_gather.ll (revision b006b60dc993b2e0ba3e412c80709477241b6be6) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=ve-unknown-unknown -mattr=+vpu | FileCheck %s
3
4declare <256 x double> @llvm.masked.gather.v256f64.v256p0(<256 x ptr> %0, i32 immarg %1, <256 x i1> %2, <256 x double> %3) #0
5
6; Function Attrs: nounwind
7define fastcc <256 x double> @vec_mgather_v256f64(<256 x ptr> %P, <256 x i1> %M) {
8; CHECK-LABEL: vec_mgather_v256f64:
9; CHECK:       # %bb.0:
10; CHECK-NEXT:    lea %s0, 256
11; CHECK-NEXT:    lvl %s0
12; CHECK-NEXT:    vgt %v0, %v0, 0, 0
13; CHECK-NEXT:    b.l.t (, %s10)
14  %r = call <256 x double> @llvm.masked.gather.v256f64.v256p0(<256 x ptr> %P, i32 4, <256 x i1> %M, <256 x double> undef)
15  ret <256 x double> %r
16}
17
18; Function Attrs: nounwind
19define fastcc <256 x double> @vec_mgather_pt_v256f64(<256 x ptr> %P, <256 x double> %PT, <256 x i1> %M) {
20; CHECK-LABEL: vec_mgather_pt_v256f64:
21; CHECK:       # %bb.0:
22; CHECK-NEXT:    lea %s0, 256
23; CHECK-NEXT:    lvl %s0
24; CHECK-NEXT:    vgt %v2, %v0, 0, 0
25; CHECK-NEXT:    lea %s16, 256
26; CHECK-NEXT:    lvl %s16
27; CHECK-NEXT:    vor %v0, (0)1, %v1
28; CHECK-NEXT:    lvl %s0
29; CHECK-NEXT:    vmrg %v0, %v1, %v2, %vm0
30; CHECK-NEXT:    b.l.t (, %s10)
31  %r = call <256 x double> @llvm.masked.gather.v256f64.v256p0(<256 x ptr> %P, i32 4, <256 x i1> %M, <256 x double> %PT)
32  ret <256 x double> %r
33}
34
35
36declare <256 x float> @llvm.masked.gather.v256f32.v256p0(<256 x ptr> %0, i32 immarg %1, <256 x i1> %2, <256 x float> %3) #0
37
38; Function Attrs: nounwind
39define fastcc <256 x float> @vec_mgather_v256f32(<256 x ptr> %P, <256 x i1> %M) {
40; CHECK-LABEL: vec_mgather_v256f32:
41; CHECK:       # %bb.0:
42; CHECK-NEXT:    lea %s0, 256
43; CHECK-NEXT:    lvl %s0
44; CHECK-NEXT:    vgtu %v0, %v0, 0, 0
45; CHECK-NEXT:    b.l.t (, %s10)
46  %r = call <256 x float> @llvm.masked.gather.v256f32.v256p0(<256 x ptr> %P, i32 4, <256 x i1> %M, <256 x float> undef)
47  ret <256 x float> %r
48}
49
50; Function Attrs: nounwind
51define fastcc <256 x float> @vec_mgather_pt_v256f32(<256 x ptr> %P, <256 x float> %PT, <256 x i1> %M) {
52; CHECK-LABEL: vec_mgather_pt_v256f32:
53; CHECK:       # %bb.0:
54; CHECK-NEXT:    lea %s0, 256
55; CHECK-NEXT:    lvl %s0
56; CHECK-NEXT:    vgtu %v2, %v0, 0, 0
57; CHECK-NEXT:    lea %s16, 256
58; CHECK-NEXT:    lvl %s16
59; CHECK-NEXT:    vor %v0, (0)1, %v1
60; CHECK-NEXT:    lvl %s0
61; CHECK-NEXT:    vmrg %v0, %v1, %v2, %vm0
62; CHECK-NEXT:    b.l.t (, %s10)
63  %r = call <256 x float> @llvm.masked.gather.v256f32.v256p0(<256 x ptr> %P, i32 4, <256 x i1> %M, <256 x float> %PT)
64  ret <256 x float> %r
65}
66
67
68declare <256 x i32> @llvm.masked.gather.v256i32.v256p0(<256 x ptr> %0, i32 immarg %1, <256 x i1> %2, <256 x i32> %3) #0
69
70; Function Attrs: nounwind
71define fastcc <256 x i32> @vec_mgather_v256i32(<256 x ptr> %P, <256 x i1> %M) {
72; CHECK-LABEL: vec_mgather_v256i32:
73; CHECK:       # %bb.0:
74; CHECK-NEXT:    lea %s0, 256
75; CHECK-NEXT:    lvl %s0
76; CHECK-NEXT:    vgtl.zx %v0, %v0, 0, 0
77; CHECK-NEXT:    b.l.t (, %s10)
78  %r = call <256 x i32> @llvm.masked.gather.v256i32.v256p0(<256 x ptr> %P, i32 4, <256 x i1> %M, <256 x i32> undef)
79  ret <256 x i32> %r
80}
81
82; Function Attrs: nounwind
83define fastcc <256 x i32> @vec_mgather_pt_v256i32(<256 x ptr> %P, <256 x i32> %PT, <256 x i1> %M) {
84; CHECK-LABEL: vec_mgather_pt_v256i32:
85; CHECK:       # %bb.0:
86; CHECK-NEXT:    lea %s0, 256
87; CHECK-NEXT:    lvl %s0
88; CHECK-NEXT:    vgtl.zx %v2, %v0, 0, 0
89; CHECK-NEXT:    lea %s16, 256
90; CHECK-NEXT:    lvl %s16
91; CHECK-NEXT:    vor %v0, (0)1, %v1
92; CHECK-NEXT:    lvl %s0
93; CHECK-NEXT:    vmrg %v0, %v1, %v2, %vm0
94; CHECK-NEXT:    b.l.t (, %s10)
95  %r = call <256 x i32> @llvm.masked.gather.v256i32.v256p0(<256 x ptr> %P, i32 4, <256 x i1> %M, <256 x i32> %PT)
96  ret <256 x i32> %r
97}
98
99attributes #0 = { argmemonly nounwind readonly willreturn }
100