xref: /llvm-project/llvm/test/CodeGen/VE/VELIntrinsics/vfmad.ll (revision 67dbc8195d3f3c89a1b306fa6d699ae110bf67b7) 
1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
2
3;;; Test vector floating fused multiply add intrinsic instructions
4;;;
5;;; Note:
6;;;   We test VFMAD*vvvl, VFMAD*vvvl_v, VFMAD*rvvl, VFMAD*rvvl_v, VFMAD*vrvl,
7;;;   VFMAD*vrvl_v, VFMAD*vvvml_v, VFMAD*rvvml_v, VFMAD*vrvml_v, PVFMAD*vvvl,
8;;;   PVFMAD*vvvl_v, PVFMAD*rvvl, PVFMAD*rvvl_v, PVFMAD*vrvl, PVFMAD*vrvl_v,
9;;;   PVFMAD*vvvml_v, PVFMAD*rvvml_v, and PVFMAD*vrvml_v instructions.
10
11; Function Attrs: nounwind readnone
12define fastcc <256 x double> @vfmadd_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {
13; CHECK-LABEL: vfmadd_vvvvl:
14; CHECK:       # %bb.0:
15; CHECK-NEXT:    lea %s0, 256
16; CHECK-NEXT:    lvl %s0
17; CHECK-NEXT:    vfmad.d %v0, %v0, %v1, %v2
18; CHECK-NEXT:    b.l.t (, %s10)
19  %4 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 256)
20  ret <256 x double> %4
21}
22
23; Function Attrs: nounwind readnone
24declare <256 x double> @llvm.ve.vl.vfmadd.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
25
26; Function Attrs: nounwind readnone
27define fastcc <256 x double> @vfmadd_vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {
28; CHECK-LABEL: vfmadd_vvvvvl:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    lea %s0, 128
31; CHECK-NEXT:    lvl %s0
32; CHECK-NEXT:    vfmad.d %v3, %v0, %v1, %v2
33; CHECK-NEXT:    lea %s16, 256
34; CHECK-NEXT:    lvl %s16
35; CHECK-NEXT:    vor %v0, (0)1, %v3
36; CHECK-NEXT:    b.l.t (, %s10)
37  %5 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)
38  ret <256 x double> %5
39}
40
41; Function Attrs: nounwind readnone
42declare <256 x double> @llvm.ve.vl.vfmadd.vvvvvl(<256 x double>, <256 x double>, <256 x double>, <256 x double>, i32)
43
44; Function Attrs: nounwind readnone
45define fastcc <256 x double> @vfmadd_vsvvl(double %0, <256 x double> %1, <256 x double> %2) {
46; CHECK-LABEL: vfmadd_vsvvl:
47; CHECK:       # %bb.0:
48; CHECK-NEXT:    lea %s1, 256
49; CHECK-NEXT:    lvl %s1
50; CHECK-NEXT:    vfmad.d %v0, %s0, %v0, %v1
51; CHECK-NEXT:    b.l.t (, %s10)
52  %4 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vsvvl(double %0, <256 x double> %1, <256 x double> %2, i32 256)
53  ret <256 x double> %4
54}
55
56; Function Attrs: nounwind readnone
57declare <256 x double> @llvm.ve.vl.vfmadd.vsvvl(double, <256 x double>, <256 x double>, i32)
58
59; Function Attrs: nounwind readnone
60define fastcc <256 x double> @vfmadd_vsvvvl(double %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {
61; CHECK-LABEL: vfmadd_vsvvvl:
62; CHECK:       # %bb.0:
63; CHECK-NEXT:    lea %s1, 128
64; CHECK-NEXT:    lvl %s1
65; CHECK-NEXT:    vfmad.d %v2, %s0, %v0, %v1
66; CHECK-NEXT:    lea %s16, 256
67; CHECK-NEXT:    lvl %s16
68; CHECK-NEXT:    vor %v0, (0)1, %v2
69; CHECK-NEXT:    b.l.t (, %s10)
70  %5 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vsvvvl(double %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)
71  ret <256 x double> %5
72}
73
74; Function Attrs: nounwind readnone
75declare <256 x double> @llvm.ve.vl.vfmadd.vsvvvl(double, <256 x double>, <256 x double>, <256 x double>, i32)
76
77; Function Attrs: nounwind readnone
78define fastcc <256 x double> @vfmadd_vvsvl(<256 x double> %0, double %1, <256 x double> %2) {
79; CHECK-LABEL: vfmadd_vvsvl:
80; CHECK:       # %bb.0:
81; CHECK-NEXT:    lea %s1, 256
82; CHECK-NEXT:    lvl %s1
83; CHECK-NEXT:    vfmad.d %v0, %v0, %s0, %v1
84; CHECK-NEXT:    b.l.t (, %s10)
85  %4 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvsvl(<256 x double> %0, double %1, <256 x double> %2, i32 256)
86  ret <256 x double> %4
87}
88
89; Function Attrs: nounwind readnone
90declare <256 x double> @llvm.ve.vl.vfmadd.vvsvl(<256 x double>, double, <256 x double>, i32)
91
92; Function Attrs: nounwind readnone
93define fastcc <256 x double> @vfmadd_vvsvvl(<256 x double> %0, double %1, <256 x double> %2, <256 x double> %3) {
94; CHECK-LABEL: vfmadd_vvsvvl:
95; CHECK:       # %bb.0:
96; CHECK-NEXT:    lea %s1, 128
97; CHECK-NEXT:    lvl %s1
98; CHECK-NEXT:    vfmad.d %v2, %v0, %s0, %v1
99; CHECK-NEXT:    lea %s16, 256
100; CHECK-NEXT:    lvl %s16
101; CHECK-NEXT:    vor %v0, (0)1, %v2
102; CHECK-NEXT:    b.l.t (, %s10)
103  %5 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvsvvl(<256 x double> %0, double %1, <256 x double> %2, <256 x double> %3, i32 128)
104  ret <256 x double> %5
105}
106
107; Function Attrs: nounwind readnone
108declare <256 x double> @llvm.ve.vl.vfmadd.vvsvvl(<256 x double>, double, <256 x double>, <256 x double>, i32)
109
110; Function Attrs: nounwind readnone
111define fastcc <256 x double> @vfmadd_vvvvmvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {
112; CHECK-LABEL: vfmadd_vvvvmvl:
113; CHECK:       # %bb.0:
114; CHECK-NEXT:    lea %s0, 128
115; CHECK-NEXT:    lvl %s0
116; CHECK-NEXT:    vfmad.d %v3, %v0, %v1, %v2, %vm1
117; CHECK-NEXT:    lea %s16, 256
118; CHECK-NEXT:    lvl %s16
119; CHECK-NEXT:    vor %v0, (0)1, %v3
120; CHECK-NEXT:    b.l.t (, %s10)
121  %6 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvvvmvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)
122  ret <256 x double> %6
123}
124
125; Function Attrs: nounwind readnone
126declare <256 x double> @llvm.ve.vl.vfmadd.vvvvmvl(<256 x double>, <256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)
127
128; Function Attrs: nounwind readnone
129define fastcc <256 x double> @vfmadd_vsvvmvl(double %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {
130; CHECK-LABEL: vfmadd_vsvvmvl:
131; CHECK:       # %bb.0:
132; CHECK-NEXT:    lea %s1, 128
133; CHECK-NEXT:    lvl %s1
134; CHECK-NEXT:    vfmad.d %v2, %s0, %v0, %v1, %vm1
135; CHECK-NEXT:    lea %s16, 256
136; CHECK-NEXT:    lvl %s16
137; CHECK-NEXT:    vor %v0, (0)1, %v2
138; CHECK-NEXT:    b.l.t (, %s10)
139  %6 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vsvvmvl(double %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)
140  ret <256 x double> %6
141}
142
143; Function Attrs: nounwind readnone
144declare <256 x double> @llvm.ve.vl.vfmadd.vsvvmvl(double, <256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)
145
146; Function Attrs: nounwind readnone
147define fastcc <256 x double> @vfmadd_vvsvmvl(<256 x double> %0, double %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {
148; CHECK-LABEL: vfmadd_vvsvmvl:
149; CHECK:       # %bb.0:
150; CHECK-NEXT:    lea %s1, 128
151; CHECK-NEXT:    lvl %s1
152; CHECK-NEXT:    vfmad.d %v2, %v0, %s0, %v1, %vm1
153; CHECK-NEXT:    lea %s16, 256
154; CHECK-NEXT:    lvl %s16
155; CHECK-NEXT:    vor %v0, (0)1, %v2
156; CHECK-NEXT:    b.l.t (, %s10)
157  %6 = tail call fast <256 x double> @llvm.ve.vl.vfmadd.vvsvmvl(<256 x double> %0, double %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)
158  ret <256 x double> %6
159}
160
161; Function Attrs: nounwind readnone
162declare <256 x double> @llvm.ve.vl.vfmadd.vvsvmvl(<256 x double>, double, <256 x double>, <256 x i1>, <256 x double>, i32)
163
164; Function Attrs: nounwind readnone
165define fastcc <256 x double> @vfmads_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {
166; CHECK-LABEL: vfmads_vvvvl:
167; CHECK:       # %bb.0:
168; CHECK-NEXT:    lea %s0, 256
169; CHECK-NEXT:    lvl %s0
170; CHECK-NEXT:    vfmad.s %v0, %v0, %v1, %v2
171; CHECK-NEXT:    b.l.t (, %s10)
172  %4 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 256)
173  ret <256 x double> %4
174}
175
176; Function Attrs: nounwind readnone
177declare <256 x double> @llvm.ve.vl.vfmads.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
178
179; Function Attrs: nounwind readnone
180define fastcc <256 x double> @vfmads_vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {
181; CHECK-LABEL: vfmads_vvvvvl:
182; CHECK:       # %bb.0:
183; CHECK-NEXT:    lea %s0, 128
184; CHECK-NEXT:    lvl %s0
185; CHECK-NEXT:    vfmad.s %v3, %v0, %v1, %v2
186; CHECK-NEXT:    lea %s16, 256
187; CHECK-NEXT:    lvl %s16
188; CHECK-NEXT:    vor %v0, (0)1, %v3
189; CHECK-NEXT:    b.l.t (, %s10)
190  %5 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)
191  ret <256 x double> %5
192}
193
194; Function Attrs: nounwind readnone
195declare <256 x double> @llvm.ve.vl.vfmads.vvvvvl(<256 x double>, <256 x double>, <256 x double>, <256 x double>, i32)
196
197; Function Attrs: nounwind readnone
198define fastcc <256 x double> @vfmads_vsvvl(float %0, <256 x double> %1, <256 x double> %2) {
199; CHECK-LABEL: vfmads_vsvvl:
200; CHECK:       # %bb.0:
201; CHECK-NEXT:    lea %s1, 256
202; CHECK-NEXT:    lvl %s1
203; CHECK-NEXT:    vfmad.s %v0, %s0, %v0, %v1
204; CHECK-NEXT:    b.l.t (, %s10)
205  %4 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vsvvl(float %0, <256 x double> %1, <256 x double> %2, i32 256)
206  ret <256 x double> %4
207}
208
209; Function Attrs: nounwind readnone
210declare <256 x double> @llvm.ve.vl.vfmads.vsvvl(float, <256 x double>, <256 x double>, i32)
211
212; Function Attrs: nounwind readnone
213define fastcc <256 x double> @vfmads_vsvvvl(float %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {
214; CHECK-LABEL: vfmads_vsvvvl:
215; CHECK:       # %bb.0:
216; CHECK-NEXT:    lea %s1, 128
217; CHECK-NEXT:    lvl %s1
218; CHECK-NEXT:    vfmad.s %v2, %s0, %v0, %v1
219; CHECK-NEXT:    lea %s16, 256
220; CHECK-NEXT:    lvl %s16
221; CHECK-NEXT:    vor %v0, (0)1, %v2
222; CHECK-NEXT:    b.l.t (, %s10)
223  %5 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vsvvvl(float %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)
224  ret <256 x double> %5
225}
226
227; Function Attrs: nounwind readnone
228declare <256 x double> @llvm.ve.vl.vfmads.vsvvvl(float, <256 x double>, <256 x double>, <256 x double>, i32)
229
230; Function Attrs: nounwind readnone
231define fastcc <256 x double> @vfmads_vvsvl(<256 x double> %0, float %1, <256 x double> %2) {
232; CHECK-LABEL: vfmads_vvsvl:
233; CHECK:       # %bb.0:
234; CHECK-NEXT:    lea %s1, 256
235; CHECK-NEXT:    lvl %s1
236; CHECK-NEXT:    vfmad.s %v0, %v0, %s0, %v1
237; CHECK-NEXT:    b.l.t (, %s10)
238  %4 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvsvl(<256 x double> %0, float %1, <256 x double> %2, i32 256)
239  ret <256 x double> %4
240}
241
242; Function Attrs: nounwind readnone
243declare <256 x double> @llvm.ve.vl.vfmads.vvsvl(<256 x double>, float, <256 x double>, i32)
244
245; Function Attrs: nounwind readnone
246define fastcc <256 x double> @vfmads_vvsvvl(<256 x double> %0, float %1, <256 x double> %2, <256 x double> %3) {
247; CHECK-LABEL: vfmads_vvsvvl:
248; CHECK:       # %bb.0:
249; CHECK-NEXT:    lea %s1, 128
250; CHECK-NEXT:    lvl %s1
251; CHECK-NEXT:    vfmad.s %v2, %v0, %s0, %v1
252; CHECK-NEXT:    lea %s16, 256
253; CHECK-NEXT:    lvl %s16
254; CHECK-NEXT:    vor %v0, (0)1, %v2
255; CHECK-NEXT:    b.l.t (, %s10)
256  %5 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvsvvl(<256 x double> %0, float %1, <256 x double> %2, <256 x double> %3, i32 128)
257  ret <256 x double> %5
258}
259
260; Function Attrs: nounwind readnone
261declare <256 x double> @llvm.ve.vl.vfmads.vvsvvl(<256 x double>, float, <256 x double>, <256 x double>, i32)
262
263; Function Attrs: nounwind readnone
264define fastcc <256 x double> @vfmads_vvvvmvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {
265; CHECK-LABEL: vfmads_vvvvmvl:
266; CHECK:       # %bb.0:
267; CHECK-NEXT:    lea %s0, 128
268; CHECK-NEXT:    lvl %s0
269; CHECK-NEXT:    vfmad.s %v3, %v0, %v1, %v2, %vm1
270; CHECK-NEXT:    lea %s16, 256
271; CHECK-NEXT:    lvl %s16
272; CHECK-NEXT:    vor %v0, (0)1, %v3
273; CHECK-NEXT:    b.l.t (, %s10)
274  %6 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvvvmvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)
275  ret <256 x double> %6
276}
277
278; Function Attrs: nounwind readnone
279declare <256 x double> @llvm.ve.vl.vfmads.vvvvmvl(<256 x double>, <256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)
280
281; Function Attrs: nounwind readnone
282define fastcc <256 x double> @vfmads_vsvvmvl(float %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {
283; CHECK-LABEL: vfmads_vsvvmvl:
284; CHECK:       # %bb.0:
285; CHECK-NEXT:    lea %s1, 128
286; CHECK-NEXT:    lvl %s1
287; CHECK-NEXT:    vfmad.s %v2, %s0, %v0, %v1, %vm1
288; CHECK-NEXT:    lea %s16, 256
289; CHECK-NEXT:    lvl %s16
290; CHECK-NEXT:    vor %v0, (0)1, %v2
291; CHECK-NEXT:    b.l.t (, %s10)
292  %6 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vsvvmvl(float %0, <256 x double> %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)
293  ret <256 x double> %6
294}
295
296; Function Attrs: nounwind readnone
297declare <256 x double> @llvm.ve.vl.vfmads.vsvvmvl(float, <256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32)
298
299; Function Attrs: nounwind readnone
300define fastcc <256 x double> @vfmads_vvsvmvl(<256 x double> %0, float %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4) {
301; CHECK-LABEL: vfmads_vvsvmvl:
302; CHECK:       # %bb.0:
303; CHECK-NEXT:    lea %s1, 128
304; CHECK-NEXT:    lvl %s1
305; CHECK-NEXT:    vfmad.s %v2, %v0, %s0, %v1, %vm1
306; CHECK-NEXT:    lea %s16, 256
307; CHECK-NEXT:    lvl %s16
308; CHECK-NEXT:    vor %v0, (0)1, %v2
309; CHECK-NEXT:    b.l.t (, %s10)
310  %6 = tail call fast <256 x double> @llvm.ve.vl.vfmads.vvsvmvl(<256 x double> %0, float %1, <256 x double> %2, <256 x i1> %3, <256 x double> %4, i32 128)
311  ret <256 x double> %6
312}
313
314; Function Attrs: nounwind readnone
315declare <256 x double> @llvm.ve.vl.vfmads.vvsvmvl(<256 x double>, float, <256 x double>, <256 x i1>, <256 x double>, i32)
316
317; Function Attrs: nounwind readnone
318define fastcc <256 x double> @pvfmad_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) {
319; CHECK-LABEL: pvfmad_vvvvl:
320; CHECK:       # %bb.0:
321; CHECK-NEXT:    lea %s0, 256
322; CHECK-NEXT:    lvl %s0
323; CHECK-NEXT:    pvfmad %v0, %v0, %v1, %v2
324; CHECK-NEXT:    b.l.t (, %s10)
325  %4 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 256)
326  ret <256 x double> %4
327}
328
329; Function Attrs: nounwind readnone
330declare <256 x double> @llvm.ve.vl.pvfmad.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32)
331
332; Function Attrs: nounwind readnone
333define fastcc <256 x double> @pvfmad_vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {
334; CHECK-LABEL: pvfmad_vvvvvl:
335; CHECK:       # %bb.0:
336; CHECK-NEXT:    lea %s0, 128
337; CHECK-NEXT:    lvl %s0
338; CHECK-NEXT:    pvfmad %v3, %v0, %v1, %v2
339; CHECK-NEXT:    lea %s16, 256
340; CHECK-NEXT:    lvl %s16
341; CHECK-NEXT:    vor %v0, (0)1, %v3
342; CHECK-NEXT:    b.l.t (, %s10)
343  %5 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)
344  ret <256 x double> %5
345}
346
347; Function Attrs: nounwind readnone
348declare <256 x double> @llvm.ve.vl.pvfmad.vvvvvl(<256 x double>, <256 x double>, <256 x double>, <256 x double>, i32)
349
350; Function Attrs: nounwind readnone
351define fastcc <256 x double> @pvfmad_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) {
352; CHECK-LABEL: pvfmad_vsvvl:
353; CHECK:       # %bb.0:
354; CHECK-NEXT:    lea %s1, 256
355; CHECK-NEXT:    lvl %s1
356; CHECK-NEXT:    pvfmad %v0, %s0, %v0, %v1
357; CHECK-NEXT:    b.l.t (, %s10)
358  %4 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 256)
359  ret <256 x double> %4
360}
361
362; Function Attrs: nounwind readnone
363declare <256 x double> @llvm.ve.vl.pvfmad.vsvvl(i64, <256 x double>, <256 x double>, i32)
364
365; Function Attrs: nounwind readnone
366define fastcc <256 x double> @pvfmad_vsvvvl(i64 %0, <256 x double> %1, <256 x double> %2, <256 x double> %3) {
367; CHECK-LABEL: pvfmad_vsvvvl:
368; CHECK:       # %bb.0:
369; CHECK-NEXT:    lea %s1, 128
370; CHECK-NEXT:    lvl %s1
371; CHECK-NEXT:    pvfmad %v2, %s0, %v0, %v1
372; CHECK-NEXT:    lea %s16, 256
373; CHECK-NEXT:    lvl %s16
374; CHECK-NEXT:    vor %v0, (0)1, %v2
375; CHECK-NEXT:    b.l.t (, %s10)
376  %5 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vsvvvl(i64 %0, <256 x double> %1, <256 x double> %2, <256 x double> %3, i32 128)
377  ret <256 x double> %5
378}
379
380; Function Attrs: nounwind readnone
381declare <256 x double> @llvm.ve.vl.pvfmad.vsvvvl(i64, <256 x double>, <256 x double>, <256 x double>, i32)
382
383; Function Attrs: nounwind readnone
384define fastcc <256 x double> @pvfmad_vvsvl(<256 x double> %0, i64 %1, <256 x double> %2) {
385; CHECK-LABEL: pvfmad_vvsvl:
386; CHECK:       # %bb.0:
387; CHECK-NEXT:    lea %s1, 256
388; CHECK-NEXT:    lvl %s1
389; CHECK-NEXT:    pvfmad %v0, %v0, %s0, %v1
390; CHECK-NEXT:    b.l.t (, %s10)
391  %4 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvsvl(<256 x double> %0, i64 %1, <256 x double> %2, i32 256)
392  ret <256 x double> %4
393}
394
395; Function Attrs: nounwind readnone
396declare <256 x double> @llvm.ve.vl.pvfmad.vvsvl(<256 x double>, i64, <256 x double>, i32)
397
398; Function Attrs: nounwind readnone
399define fastcc <256 x double> @pvfmad_vvsvvl(<256 x double> %0, i64 %1, <256 x double> %2, <256 x double> %3) {
400; CHECK-LABEL: pvfmad_vvsvvl:
401; CHECK:       # %bb.0:
402; CHECK-NEXT:    lea %s1, 128
403; CHECK-NEXT:    lvl %s1
404; CHECK-NEXT:    pvfmad %v2, %v0, %s0, %v1
405; CHECK-NEXT:    lea %s16, 256
406; CHECK-NEXT:    lvl %s16
407; CHECK-NEXT:    vor %v0, (0)1, %v2
408; CHECK-NEXT:    b.l.t (, %s10)
409  %5 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvsvvl(<256 x double> %0, i64 %1, <256 x double> %2, <256 x double> %3, i32 128)
410  ret <256 x double> %5
411}
412
413; Function Attrs: nounwind readnone
414declare <256 x double> @llvm.ve.vl.pvfmad.vvsvvl(<256 x double>, i64, <256 x double>, <256 x double>, i32)
415
416; Function Attrs: nounwind readnone
417define fastcc <256 x double> @pvfmad_vvvvMvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4) {
418; CHECK-LABEL: pvfmad_vvvvMvl:
419; CHECK:       # %bb.0:
420; CHECK-NEXT:    lea %s0, 128
421; CHECK-NEXT:    lvl %s0
422; CHECK-NEXT:    pvfmad %v3, %v0, %v1, %v2, %vm2
423; CHECK-NEXT:    lea %s16, 256
424; CHECK-NEXT:    lvl %s16
425; CHECK-NEXT:    vor %v0, (0)1, %v3
426; CHECK-NEXT:    b.l.t (, %s10)
427  %6 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvvvMvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4, i32 128)
428  ret <256 x double> %6
429}
430
431; Function Attrs: nounwind readnone
432declare <256 x double> @llvm.ve.vl.pvfmad.vvvvMvl(<256 x double>, <256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)
433
434; Function Attrs: nounwind readnone
435define fastcc <256 x double> @pvfmad_vsvvMvl(i64 %0, <256 x double> %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4) {
436; CHECK-LABEL: pvfmad_vsvvMvl:
437; CHECK:       # %bb.0:
438; CHECK-NEXT:    lea %s1, 128
439; CHECK-NEXT:    lvl %s1
440; CHECK-NEXT:    pvfmad %v2, %s0, %v0, %v1, %vm2
441; CHECK-NEXT:    lea %s16, 256
442; CHECK-NEXT:    lvl %s16
443; CHECK-NEXT:    vor %v0, (0)1, %v2
444; CHECK-NEXT:    b.l.t (, %s10)
445  %6 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vsvvMvl(i64 %0, <256 x double> %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4, i32 128)
446  ret <256 x double> %6
447}
448
449; Function Attrs: nounwind readnone
450declare <256 x double> @llvm.ve.vl.pvfmad.vsvvMvl(i64, <256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32)
451
452; Function Attrs: nounwind readnone
453define fastcc <256 x double> @pvfmad_vvsvMvl(<256 x double> %0, i64 %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4) {
454; CHECK-LABEL: pvfmad_vvsvMvl:
455; CHECK:       # %bb.0:
456; CHECK-NEXT:    lea %s1, 128
457; CHECK-NEXT:    lvl %s1
458; CHECK-NEXT:    pvfmad %v2, %v0, %s0, %v1, %vm2
459; CHECK-NEXT:    lea %s16, 256
460; CHECK-NEXT:    lvl %s16
461; CHECK-NEXT:    vor %v0, (0)1, %v2
462; CHECK-NEXT:    b.l.t (, %s10)
463  %6 = tail call fast <256 x double> @llvm.ve.vl.pvfmad.vvsvMvl(<256 x double> %0, i64 %1, <256 x double> %2, <512 x i1> %3, <256 x double> %4, i32 128)
464  ret <256 x double> %6
465}
466
467; Function Attrs: nounwind readnone
468declare <256 x double> @llvm.ve.vl.pvfmad.vvsvMvl(<256 x double>, i64, <256 x double>, <512 x i1>, <256 x double>, i32)
469