xref: /llvm-project/llvm/test/CodeGen/VE/Scalar/rem.ll (revision a983ef2c1743d8c8240b83ab307d7adcbaa73693)
1; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
2
3; Function Attrs: norecurse nounwind readnone
4define i128 @remi128(i128 %a, i128 %b) {
5; CHECK-LABEL: remi128:
6; CHECK:       .LBB{{[0-9]+}}_2:
7; CHECK-NEXT:    lea %s4, __modti3@lo
8; CHECK-NEXT:    and %s4, %s4, (32)0
9; CHECK-NEXT:    lea.sl %s12, __modti3@hi(, %s4)
10; CHECK-NEXT:    bsic %s10, (, %s12)
11; CHECK-NEXT:    or %s11, 0, %s9
12  %r = srem i128 %a, %b
13  ret i128 %r
14}
15
16; Function Attrs: norecurse nounwind readnone
17define i64 @remi64(i64 %a, i64 %b) {
18; CHECK-LABEL: remi64:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    divs.l %s2, %s0, %s1
21; CHECK-NEXT:    muls.l %s1, %s2, %s1
22; CHECK-NEXT:    subs.l %s0, %s0, %s1
23; CHECK-NEXT:    b.l.t (, %s10)
24  %r = srem i64 %a, %b
25  ret i64 %r
26}
27
28; Function Attrs: norecurse nounwind readnone
29define signext i32 @remi32(i32 signext %a, i32 signext %b) {
30; CHECK-LABEL: remi32:
31; CHECK:       # %bb.0:
32; CHECK-NEXT:    divs.w.sx %s2, %s0, %s1
33; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
34; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
35; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
36; CHECK-NEXT:    b.l.t (, %s10)
37  %r = srem i32 %a, %b
38  ret i32 %r
39}
40
41; Function Attrs: norecurse nounwind readnone
42define i128 @remu128(i128 %a, i128 %b) {
43; CHECK-LABEL: remu128:
44; CHECK:       .LBB{{[0-9]+}}_2:
45; CHECK-NEXT:    lea %s4, __umodti3@lo
46; CHECK-NEXT:    and %s4, %s4, (32)0
47; CHECK-NEXT:    lea.sl %s12, __umodti3@hi(, %s4)
48; CHECK-NEXT:    bsic %s10, (, %s12)
49; CHECK-NEXT:    or %s11, 0, %s9
50  %r = urem i128 %a, %b
51  ret i128 %r
52}
53
54; Function Attrs: norecurse nounwind readnone
55define i64 @remu64(i64 %a, i64 %b) {
56; CHECK-LABEL: remu64:
57; CHECK:       # %bb.0:
58; CHECK-NEXT:    divu.l %s2, %s0, %s1
59; CHECK-NEXT:    muls.l %s1, %s2, %s1
60; CHECK-NEXT:    subs.l %s0, %s0, %s1
61; CHECK-NEXT:    b.l.t (, %s10)
62  %r = urem i64 %a, %b
63  ret i64 %r
64}
65
66; Function Attrs: norecurse nounwind readnone
67define zeroext i32 @remu32(i32 zeroext %a, i32 zeroext %b) {
68; CHECK-LABEL: remu32:
69; CHECK:       # %bb.0:
70; CHECK-NEXT:    divu.w %s2, %s0, %s1
71; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
72; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
73; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
74; CHECK-NEXT:    b.l.t (, %s10)
75  %r = urem i32 %a, %b
76  ret i32 %r
77}
78
79; Function Attrs: norecurse nounwind readnone
80define signext i16 @remi16(i16 signext %a, i16 signext %b) {
81; CHECK-LABEL: remi16:
82; CHECK:       # %bb.0:
83; CHECK-NEXT:    divs.w.sx %s2, %s0, %s1
84; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
85; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
86; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
87; CHECK-NEXT:    b.l.t (, %s10)
88  %a32 = sext i16 %a to i32
89  %b32 = sext i16 %b to i32
90  %r32 = srem i32 %a32, %b32
91  %r = trunc i32 %r32 to i16
92  ret i16 %r
93}
94
95; Function Attrs: norecurse nounwind readnone
96define zeroext i16 @remu16(i16 zeroext %a, i16 zeroext %b) {
97; CHECK-LABEL: remu16:
98; CHECK:       # %bb.0:
99; CHECK-NEXT:    divu.w %s2, %s0, %s1
100; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
101; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
102; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
103; CHECK-NEXT:    b.l.t (, %s10)
104  %r = urem i16 %a, %b
105  ret i16 %r
106}
107
108; Function Attrs: norecurse nounwind readnone
109define signext i8 @remi8(i8 signext %a, i8 signext %b) {
110; CHECK-LABEL: remi8:
111; CHECK:       # %bb.0:
112; CHECK-NEXT:    divs.w.sx %s2, %s0, %s1
113; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
114; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
115; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
116; CHECK-NEXT:    b.l.t (, %s10)
117  %a32 = sext i8 %a to i32
118  %b32 = sext i8 %b to i32
119  %r32 = srem i32 %a32, %b32
120  %r = trunc i32 %r32 to i8
121  ret i8 %r
122}
123
124; Function Attrs: norecurse nounwind readnone
125define zeroext i8 @remu8(i8 zeroext %a, i8 zeroext %b) {
126; CHECK-LABEL: remu8:
127; CHECK:       # %bb.0:
128; CHECK-NEXT:    divu.w %s2, %s0, %s1
129; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
130; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
131; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
132; CHECK-NEXT:    b.l.t (, %s10)
133  %r = urem i8 %a, %b
134  ret i8 %r
135}
136
137; Function Attrs: norecurse nounwind readnone
138define i128 @remi128ri(i128 %a) {
139; CHECK-LABEL: remi128ri:
140; CHECK:       .LBB{{[0-9]+}}_2:
141; CHECK-NEXT:    lea %s2, __modti3@lo
142; CHECK-NEXT:    and %s2, %s2, (32)0
143; CHECK-NEXT:    lea.sl %s12, __modti3@hi(, %s2)
144; CHECK-NEXT:    or %s2, 3, (0)1
145; CHECK-NEXT:    or %s3, 0, (0)1
146; CHECK-NEXT:    bsic %s10, (, %s12)
147; CHECK-NEXT:    or %s11, 0, %s9
148  %r = srem i128 %a, 3
149  ret i128 %r
150}
151
152; Function Attrs: norecurse nounwind readnone
153define i64 @remi64ri(i64 %a) {
154; CHECK-LABEL: remi64ri:
155; CHECK:       # %bb.0:
156; CHECK-NEXT:    divs.l %s1, %s0, (62)0
157; CHECK-NEXT:    muls.l %s1, 3, %s1
158; CHECK-NEXT:    subs.l %s0, %s0, %s1
159; CHECK-NEXT:    b.l.t (, %s10)
160  %r = srem i64 %a, 3
161  ret i64 %r
162}
163
164; Function Attrs: norecurse nounwind readnone
165define signext i32 @remi32ri(i32 signext %a) {
166; CHECK-LABEL: remi32ri:
167; CHECK:       # %bb.0:
168; CHECK-NEXT:    lea %s1, 1431655766
169; CHECK-NEXT:    muls.l %s1, %s0, %s1
170; CHECK-NEXT:    srl %s2, %s1, 63
171; CHECK-NEXT:    srl %s1, %s1, 32
172; CHECK-NEXT:    adds.w.sx %s1, %s1, %s2
173; CHECK-NEXT:    muls.w.sx %s1, 3, %s1
174; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
175; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
176; CHECK-NEXT:    b.l.t (, %s10)
177  %r = srem i32 %a, 3
178  ret i32 %r
179}
180
181; Function Attrs: norecurse nounwind readnone
182define i128 @remu128ri(i128 %a) {
183; CHECK-LABEL: remu128ri:
184; CHECK:       .LBB{{[0-9]+}}_2:
185; CHECK-NEXT:    lea %s2, __umodti3@lo
186; CHECK-NEXT:    and %s2, %s2, (32)0
187; CHECK-NEXT:    lea.sl %s12, __umodti3@hi(, %s2)
188; CHECK-NEXT:    or %s2, 11, (0)1
189; CHECK-NEXT:    or %s3, 0, (0)1
190; CHECK-NEXT:    bsic %s10, (, %s12)
191; CHECK-NEXT:    or %s11, 0, %s9
192  %r = urem i128 %a, 11
193  ret i128 %r
194}
195
196; Function Attrs: norecurse nounwind readnone
197define i64 @remu64ri(i64 %a) {
198; CHECK-LABEL: remu64ri:
199; CHECK:       # %bb.0:
200; CHECK-NEXT:    divu.l %s1, %s0, (62)0
201; CHECK-NEXT:    muls.l %s1, 3, %s1
202; CHECK-NEXT:    subs.l %s0, %s0, %s1
203; CHECK-NEXT:    b.l.t (, %s10)
204  %r = urem i64 %a, 3
205  ret i64 %r
206}
207
208; Function Attrs: norecurse nounwind readnone
209define zeroext i32 @remu32ri(i32 zeroext %a) {
210; CHECK-LABEL: remu32ri:
211; CHECK:       # %bb.0:
212; CHECK-NEXT:    lea %s1, -1431655765
213; CHECK-NEXT:    and %s1, %s1, (32)0
214; CHECK-NEXT:    muls.l %s1, %s0, %s1
215; CHECK-NEXT:    srl %s1, %s1, 33
216; CHECK-NEXT:    muls.w.sx %s1, 3, %s1
217; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
218; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
219; CHECK-NEXT:    b.l.t (, %s10)
220  %r = urem i32 %a, 3
221  ret i32 %r
222}
223
224; Function Attrs: norecurse nounwind readnone
225define i128 @remi128li(i128 %a) {
226; CHECK-LABEL: remi128li:
227; CHECK:       .LBB{{[0-9]+}}_2:
228; CHECK-NEXT:    or %s3, 0, %s1
229; CHECK-NEXT:    or %s2, 0, %s0
230; CHECK-NEXT:    lea %s0, __modti3@lo
231; CHECK-NEXT:    and %s0, %s0, (32)0
232; CHECK-NEXT:    lea.sl %s12, __modti3@hi(, %s0)
233; CHECK-NEXT:    or %s0, 3, (0)1
234; CHECK-NEXT:    or %s1, 0, (0)1
235; CHECK-NEXT:    bsic %s10, (, %s12)
236; CHECK-NEXT:    or %s11, 0, %s9
237  %r = srem i128 3, %a
238  ret i128 %r
239}
240
241; Function Attrs: norecurse nounwind readnone
242define i64 @remi64li(i64 %a, i64 %b) {
243; CHECK-LABEL: remi64li:
244; CHECK:       # %bb.0:
245; CHECK-NEXT:    divs.l %s0, 3, %s1
246; CHECK-NEXT:    muls.l %s0, %s0, %s1
247; CHECK-NEXT:    subs.l %s0, 3, %s0
248; CHECK-NEXT:    b.l.t (, %s10)
249  %r = srem i64 3, %b
250  ret i64 %r
251}
252
253; Function Attrs: norecurse nounwind readnone
254define signext i32 @remi32li(i32 signext %a, i32 signext %b) {
255; CHECK-LABEL: remi32li:
256; CHECK:       # %bb.0:
257; CHECK-NEXT:    divs.w.sx %s0, 3, %s1
258; CHECK-NEXT:    muls.w.sx %s0, %s0, %s1
259; CHECK-NEXT:    subs.w.sx %s0, 3, %s0
260; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
261; CHECK-NEXT:    b.l.t (, %s10)
262  %r = srem i32 3, %b
263  ret i32 %r
264}
265
266; Function Attrs: norecurse nounwind readnone
267define i128 @remu128li(i128) {
268; CHECK-LABEL: remu128li:
269; CHECK:       .LBB{{[0-9]+}}_2:
270; CHECK-NEXT:    or %s3, 0, %s1
271; CHECK-NEXT:    or %s2, 0, %s0
272; CHECK-NEXT:    lea %s0, __umodti3@lo
273; CHECK-NEXT:    and %s0, %s0, (32)0
274; CHECK-NEXT:    lea.sl %s12, __umodti3@hi(, %s0)
275; CHECK-NEXT:    or %s0, 3, (0)1
276; CHECK-NEXT:    or %s1, 0, (0)1
277; CHECK-NEXT:    bsic %s10, (, %s12)
278; CHECK-NEXT:    or %s11, 0, %s9
279  %2 = urem i128 3, %0
280  ret i128 %2
281}
282
283; Function Attrs: norecurse nounwind readnone
284define i64 @remu64li(i64 %a, i64 %b) {
285; CHECK-LABEL: remu64li:
286; CHECK:       # %bb.0:
287; CHECK-NEXT:    divu.l %s0, 3, %s1
288; CHECK-NEXT:    muls.l %s0, %s0, %s1
289; CHECK-NEXT:    subs.l %s0, 3, %s0
290; CHECK-NEXT:    b.l.t (, %s10)
291  %r = urem i64 3, %b
292  ret i64 %r
293}
294
295; Function Attrs: norecurse nounwind readnone
296define zeroext i32 @remu32li(i32 zeroext %a, i32 zeroext %b) {
297; CHECK-LABEL: remu32li:
298; CHECK:       # %bb.0:
299; CHECK-NEXT:    divu.w %s0, 3, %s1
300; CHECK-NEXT:    muls.w.sx %s0, %s0, %s1
301; CHECK-NEXT:    subs.w.sx %s0, 3, %s0
302; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
303; CHECK-NEXT:    b.l.t (, %s10)
304  %r = urem i32 3, %b
305  ret i32 %r
306}
307