xref: /llvm-project/llvm/test/CodeGen/VE/Scalar/div.ll (revision a983ef2c1743d8c8240b83ab307d7adcbaa73693)
1; RUN: llc < %s -mtriple=ve-unknown-unknown | FileCheck %s
2
3; Function Attrs: norecurse nounwind readnone
4define i128 @divi128(i128, i128) {
5; CHECK-LABEL: divi128:
6; CHECK:       .LBB{{[0-9]+}}_2:
7; CHECK-NEXT:    lea %s4, __divti3@lo
8; CHECK-NEXT:    and %s4, %s4, (32)0
9; CHECK-NEXT:    lea.sl %s12, __divti3@hi(, %s4)
10; CHECK-NEXT:    bsic %s10, (, %s12)
11; CHECK-NEXT:    or %s11, 0, %s9
12  %3 = sdiv i128 %0, %1
13  ret i128 %3
14}
15
16; Function Attrs: norecurse nounwind readnone
17define i64 @divi64(i64 %a, i64 %b) {
18; CHECK-LABEL: divi64:
19; CHECK:       # %bb.0:
20; CHECK-NEXT:    divs.l %s0, %s0, %s1
21; CHECK-NEXT:    b.l.t (, %s10)
22  %r = sdiv i64 %a, %b
23  ret i64 %r
24}
25
26; Function Attrs: norecurse nounwind readnone
27define signext i32 @divi32(i32 signext %a, i32 signext %b) {
28; CHECK-LABEL: divi32:
29; CHECK:       # %bb.0:
30; CHECK-NEXT:    divs.w.sx %s0, %s0, %s1
31; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
32; CHECK-NEXT:    b.l.t (, %s10)
33  %r = sdiv i32 %a, %b
34  ret i32 %r
35}
36
37; Function Attrs: norecurse nounwind readnone
38define i128 @divu128(i128, i128) {
39; CHECK-LABEL: divu128:
40; CHECK:       .LBB{{[0-9]+}}_2:
41; CHECK-NEXT:    lea %s4, __udivti3@lo
42; CHECK-NEXT:    and %s4, %s4, (32)0
43; CHECK-NEXT:    lea.sl %s12, __udivti3@hi(, %s4)
44; CHECK-NEXT:    bsic %s10, (, %s12)
45; CHECK-NEXT:    or %s11, 0, %s9
46  %3 = udiv i128 %0, %1
47  ret i128 %3
48}
49
50; Function Attrs: norecurse nounwind readnone
51define i64 @divu64(i64 %a, i64 %b) {
52; CHECK-LABEL: divu64:
53; CHECK:       # %bb.0:
54; CHECK-NEXT:    divu.l %s0, %s0, %s1
55; CHECK-NEXT:    b.l.t (, %s10)
56  %r = udiv i64 %a, %b
57  ret i64 %r
58}
59
60; Function Attrs: norecurse nounwind readnone
61define zeroext i32 @divu32(i32 zeroext %a, i32 zeroext %b) {
62; CHECK-LABEL: divu32:
63; CHECK:       # %bb.0:
64; CHECK-NEXT:    divu.w %s0, %s0, %s1
65; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
66; CHECK-NEXT:    b.l.t (, %s10)
67  %r = udiv i32 %a, %b
68  ret i32 %r
69}
70
71; Function Attrs: norecurse nounwind readnone
72define signext i16 @divi16(i16 signext %a, i16 signext %b) {
73; CHECK-LABEL: divi16:
74; CHECK:       # %bb.0:
75; CHECK-NEXT:    divs.w.sx %s0, %s0, %s1
76; CHECK-NEXT:    sll %s0, %s0, 48
77; CHECK-NEXT:    sra.l %s0, %s0, 48
78; CHECK-NEXT:    b.l.t (, %s10)
79  %a32 = sext i16 %a to i32
80  %b32 = sext i16 %b to i32
81  %r32 = sdiv i32 %a32, %b32
82  %r = trunc i32 %r32 to i16
83  ret i16 %r
84}
85
86; Function Attrs: norecurse nounwind readnone
87define zeroext i16 @divu16(i16 zeroext %a, i16 zeroext %b) {
88; CHECK-LABEL: divu16:
89; CHECK:       # %bb.0:
90; CHECK-NEXT:    divu.w %s0, %s0, %s1
91; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
92; CHECK-NEXT:    b.l.t (, %s10)
93  %r = udiv i16 %a, %b
94  ret i16 %r
95}
96
97; Function Attrs: norecurse nounwind readnone
98define signext i8 @divi8(i8 signext %a, i8 signext %b) {
99; CHECK-LABEL: divi8:
100; CHECK:       # %bb.0:
101; CHECK-NEXT:    divs.w.sx %s0, %s0, %s1
102; CHECK-NEXT:    sll %s0, %s0, 56
103; CHECK-NEXT:    sra.l %s0, %s0, 56
104; CHECK-NEXT:    b.l.t (, %s10)
105  %a32 = sext i8 %a to i32
106  %b32 = sext i8 %b to i32
107  %r32 = sdiv i32 %a32, %b32
108  %r = trunc i32 %r32 to i8
109  ret i8 %r
110}
111
112; Function Attrs: norecurse nounwind readnone
113define zeroext i8 @divu8(i8 zeroext %a, i8 zeroext %b) {
114; CHECK-LABEL: divu8:
115; CHECK:       # %bb.0:
116; CHECK-NEXT:    divu.w %s0, %s0, %s1
117; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
118; CHECK-NEXT:    b.l.t (, %s10)
119  %r = udiv i8 %a, %b
120  ret i8 %r
121}
122
123; Function Attrs: norecurse nounwind readnone
124define i128 @divi128ri(i128) {
125; CHECK-LABEL: divi128ri:
126; CHECK:       .LBB{{[0-9]+}}_2:
127; CHECK-NEXT:    lea %s2, __divti3@lo
128; CHECK-NEXT:    and %s2, %s2, (32)0
129; CHECK-NEXT:    lea.sl %s12, __divti3@hi(, %s2)
130; CHECK-NEXT:    or %s2, 3, (0)1
131; CHECK-NEXT:    or %s3, 0, (0)1
132; CHECK-NEXT:    bsic %s10, (, %s12)
133; CHECK-NEXT:    or %s11, 0, %s9
134  %2 = sdiv i128 %0, 3
135  ret i128 %2
136}
137
138; Function Attrs: norecurse nounwind readnone
139define i64 @divi64ri(i64 %a, i64 %b) {
140; CHECK-LABEL: divi64ri:
141; CHECK:       # %bb.0:
142; CHECK-NEXT:    divs.l %s0, %s0, (62)0
143; CHECK-NEXT:    b.l.t (, %s10)
144  %r = sdiv i64 %a, 3
145  ret i64 %r
146}
147
148; Function Attrs: norecurse nounwind readnone
149define signext i32 @divi32ri(i32 signext %a, i32 signext %b) {
150; CHECK-LABEL: divi32ri:
151; CHECK:       # %bb.0:
152; CHECK-NEXT:    lea %s1, 1431655766
153; CHECK-NEXT:    muls.l %s0, %s0, %s1
154; CHECK-NEXT:    srl %s1, %s0, 63
155; CHECK-NEXT:    srl %s0, %s0, 32
156; CHECK-NEXT:    adds.w.sx %s0, %s0, %s1
157; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
158; CHECK-NEXT:    b.l.t (, %s10)
159  %r = sdiv i32 %a, 3
160  ret i32 %r
161}
162
163; Function Attrs: norecurse nounwind readnone
164define i128 @divu128ri(i128) {
165; CHECK-LABEL: divu128ri:
166; CHECK:       .LBB{{[0-9]+}}_2:
167; CHECK-NEXT:    lea %s2, __udivti3@lo
168; CHECK-NEXT:    and %s2, %s2, (32)0
169; CHECK-NEXT:    lea.sl %s12, __udivti3@hi(, %s2)
170; CHECK-NEXT:    or %s2, 3, (0)1
171; CHECK-NEXT:    or %s3, 0, (0)1
172; CHECK-NEXT:    bsic %s10, (, %s12)
173; CHECK-NEXT:    or %s11, 0, %s9
174  %2 = udiv i128 %0, 3
175  ret i128 %2
176}
177
178; Function Attrs: norecurse nounwind readnone
179define i64 @divu64ri(i64 %a, i64 %b) {
180; CHECK-LABEL: divu64ri:
181; CHECK:       # %bb.0:
182; CHECK-NEXT:    divu.l %s0, %s0, (62)0
183; CHECK-NEXT:    b.l.t (, %s10)
184  %r = udiv i64 %a, 3
185  ret i64 %r
186}
187
188; Function Attrs: norecurse nounwind readnone
189define zeroext i32 @divu32ri(i32 zeroext %a, i32 zeroext %b) {
190; CHECK-LABEL: divu32ri:
191; CHECK:       # %bb.0:
192; CHECK-NEXT:    lea %s1, -1431655765
193; CHECK-NEXT:    and %s1, %s1, (32)0
194; CHECK-NEXT:    muls.l %s0, %s0, %s1
195; CHECK-NEXT:    srl %s0, %s0, 33
196; CHECK-NEXT:    b.l.t (, %s10)
197  %r = udiv i32 %a, 3
198  ret i32 %r
199}
200
201; Function Attrs: norecurse nounwind readnone
202define i128 @divi128li(i128) {
203; CHECK-LABEL: divi128li:
204; CHECK:       .LBB{{[0-9]+}}_2:
205; CHECK-NEXT:    or %s3, 0, %s1
206; CHECK-NEXT:    or %s2, 0, %s0
207; CHECK-NEXT:    lea %s0, __divti3@lo
208; CHECK-NEXT:    and %s0, %s0, (32)0
209; CHECK-NEXT:    lea.sl %s12, __divti3@hi(, %s0)
210; CHECK-NEXT:    or %s0, 3, (0)1
211; CHECK-NEXT:    or %s1, 0, (0)1
212; CHECK-NEXT:    bsic %s10, (, %s12)
213; CHECK-NEXT:    or %s11, 0, %s9
214  %2 = sdiv i128 3, %0
215  ret i128 %2
216}
217
218; Function Attrs: norecurse nounwind readnone
219define i64 @divi64li(i64 %a, i64 %b) {
220; CHECK-LABEL: divi64li:
221; CHECK:       # %bb.0:
222; CHECK-NEXT:    divs.l %s0, 3, %s1
223; CHECK-NEXT:    b.l.t (, %s10)
224  %r = sdiv i64 3, %b
225  ret i64 %r
226}
227
228; Function Attrs: norecurse nounwind readnone
229define signext i32 @divi32li(i32 signext %a, i32 signext %b) {
230; CHECK-LABEL: divi32li:
231; CHECK:       # %bb.0:
232; CHECK-NEXT:    divs.w.sx %s0, 3, %s1
233; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
234; CHECK-NEXT:    b.l.t (, %s10)
235  %r = sdiv i32 3, %b
236  ret i32 %r
237}
238
239; Function Attrs: norecurse nounwind readnone
240define i128 @divu128li(i128) {
241; CHECK-LABEL: divu128li:
242; CHECK:       .LBB{{[0-9]+}}_2:
243; CHECK-NEXT:    or %s3, 0, %s1
244; CHECK-NEXT:    or %s2, 0, %s0
245; CHECK-NEXT:    lea %s0, __udivti3@lo
246; CHECK-NEXT:    and %s0, %s0, (32)0
247; CHECK-NEXT:    lea.sl %s12, __udivti3@hi(, %s0)
248; CHECK-NEXT:    or %s0, 3, (0)1
249; CHECK-NEXT:    or %s1, 0, (0)1
250; CHECK-NEXT:    bsic %s10, (, %s12)
251; CHECK-NEXT:    or %s11, 0, %s9
252  %2 = udiv i128 3, %0
253  ret i128 %2
254}
255
256; Function Attrs: norecurse nounwind readnone
257define i64 @divu64li(i64 %a, i64 %b) {
258; CHECK-LABEL: divu64li:
259; CHECK:       # %bb.0:
260; CHECK-NEXT:    divu.l %s0, 3, %s1
261; CHECK-NEXT:    b.l.t (, %s10)
262  %r = udiv i64 3, %b
263  ret i64 %r
264}
265
266; Function Attrs: norecurse nounwind readnone
267define zeroext i32 @divu32li(i32 zeroext %a, i32 zeroext %b) {
268; CHECK-LABEL: divu32li:
269; CHECK:       # %bb.0:
270; CHECK-NEXT:    divu.w %s0, 3, %s1
271; CHECK-NEXT:    adds.w.zx %s0, %s0, (0)1
272; CHECK-NEXT:    b.l.t (, %s10)
273  %r = udiv i32 3, %b
274  ret i32 %r
275}
276