1; RUN: llc < %s -mtriple=ve | FileCheck %s 2 3;;; Test atomic load for all types and all memory order 4;;; 5;;; Note: 6;;; We test i1/i8/i16/i32/i64/i128/u8/u16/u32/u64/u128. 7;;; We test relaxed, acquire, and seq_cst. 8;;; We test an object, a stack object, and a global variable. 9 10%"struct.std::__1::atomic" = type { %"struct.std::__1::__atomic_base" } 11%"struct.std::__1::__atomic_base" = type { %"struct.std::__1::__cxx_atomic_impl" } 12%"struct.std::__1::__cxx_atomic_impl" = type { %"struct.std::__1::__cxx_atomic_base_impl" } 13%"struct.std::__1::__cxx_atomic_base_impl" = type { i8 } 14%"struct.std::__1::atomic.0" = type { %"struct.std::__1::__atomic_base.1" } 15%"struct.std::__1::__atomic_base.1" = type { %"struct.std::__1::__atomic_base.2" } 16%"struct.std::__1::__atomic_base.2" = type { %"struct.std::__1::__cxx_atomic_impl.3" } 17%"struct.std::__1::__cxx_atomic_impl.3" = type { %"struct.std::__1::__cxx_atomic_base_impl.4" } 18%"struct.std::__1::__cxx_atomic_base_impl.4" = type { i8 } 19%"struct.std::__1::atomic.5" = type { %"struct.std::__1::__atomic_base.6" } 20%"struct.std::__1::__atomic_base.6" = type { %"struct.std::__1::__atomic_base.7" } 21%"struct.std::__1::__atomic_base.7" = type { %"struct.std::__1::__cxx_atomic_impl.8" } 22%"struct.std::__1::__cxx_atomic_impl.8" = type { %"struct.std::__1::__cxx_atomic_base_impl.9" } 23%"struct.std::__1::__cxx_atomic_base_impl.9" = type { i8 } 24%"struct.std::__1::atomic.10" = type { %"struct.std::__1::__atomic_base.11" } 25%"struct.std::__1::__atomic_base.11" = type { %"struct.std::__1::__atomic_base.12" } 26%"struct.std::__1::__atomic_base.12" = type { %"struct.std::__1::__cxx_atomic_impl.13" } 27%"struct.std::__1::__cxx_atomic_impl.13" = type { %"struct.std::__1::__cxx_atomic_base_impl.14" } 28%"struct.std::__1::__cxx_atomic_base_impl.14" = type { i16 } 29%"struct.std::__1::atomic.15" = type { %"struct.std::__1::__atomic_base.16" } 30%"struct.std::__1::__atomic_base.16" = type { %"struct.std::__1::__atomic_base.17" } 31%"struct.std::__1::__atomic_base.17" = type { %"struct.std::__1::__cxx_atomic_impl.18" } 32%"struct.std::__1::__cxx_atomic_impl.18" = type { %"struct.std::__1::__cxx_atomic_base_impl.19" } 33%"struct.std::__1::__cxx_atomic_base_impl.19" = type { i16 } 34%"struct.std::__1::atomic.20" = type { %"struct.std::__1::__atomic_base.21" } 35%"struct.std::__1::__atomic_base.21" = type { %"struct.std::__1::__atomic_base.22" } 36%"struct.std::__1::__atomic_base.22" = type { %"struct.std::__1::__cxx_atomic_impl.23" } 37%"struct.std::__1::__cxx_atomic_impl.23" = type { %"struct.std::__1::__cxx_atomic_base_impl.24" } 38%"struct.std::__1::__cxx_atomic_base_impl.24" = type { i32 } 39%"struct.std::__1::atomic.25" = type { %"struct.std::__1::__atomic_base.26" } 40%"struct.std::__1::__atomic_base.26" = type { %"struct.std::__1::__atomic_base.27" } 41%"struct.std::__1::__atomic_base.27" = type { %"struct.std::__1::__cxx_atomic_impl.28" } 42%"struct.std::__1::__cxx_atomic_impl.28" = type { %"struct.std::__1::__cxx_atomic_base_impl.29" } 43%"struct.std::__1::__cxx_atomic_base_impl.29" = type { i32 } 44%"struct.std::__1::atomic.30" = type { %"struct.std::__1::__atomic_base.31" } 45%"struct.std::__1::__atomic_base.31" = type { %"struct.std::__1::__atomic_base.32" } 46%"struct.std::__1::__atomic_base.32" = type { %"struct.std::__1::__cxx_atomic_impl.33" } 47%"struct.std::__1::__cxx_atomic_impl.33" = type { %"struct.std::__1::__cxx_atomic_base_impl.34" } 48%"struct.std::__1::__cxx_atomic_base_impl.34" = type { i64 } 49%"struct.std::__1::atomic.35" = type { %"struct.std::__1::__atomic_base.36" } 50%"struct.std::__1::__atomic_base.36" = type { %"struct.std::__1::__atomic_base.37" } 51%"struct.std::__1::__atomic_base.37" = type { %"struct.std::__1::__cxx_atomic_impl.38" } 52%"struct.std::__1::__cxx_atomic_impl.38" = type { %"struct.std::__1::__cxx_atomic_base_impl.39" } 53%"struct.std::__1::__cxx_atomic_base_impl.39" = type { i64 } 54%"struct.std::__1::atomic.40" = type { %"struct.std::__1::__atomic_base.41" } 55%"struct.std::__1::__atomic_base.41" = type { %"struct.std::__1::__atomic_base.42" } 56%"struct.std::__1::__atomic_base.42" = type { %"struct.std::__1::__cxx_atomic_impl.43" } 57%"struct.std::__1::__cxx_atomic_impl.43" = type { %"struct.std::__1::__cxx_atomic_base_impl.44" } 58%"struct.std::__1::__cxx_atomic_base_impl.44" = type { i128 } 59%"struct.std::__1::atomic.45" = type { %"struct.std::__1::__atomic_base.46" } 60%"struct.std::__1::__atomic_base.46" = type { %"struct.std::__1::__atomic_base.47" } 61%"struct.std::__1::__atomic_base.47" = type { %"struct.std::__1::__cxx_atomic_impl.48" } 62%"struct.std::__1::__cxx_atomic_impl.48" = type { %"struct.std::__1::__cxx_atomic_base_impl.49" } 63%"struct.std::__1::__cxx_atomic_base_impl.49" = type { i128 } 64 65@gv_i1 = global %"struct.std::__1::atomic" zeroinitializer, align 4 66@gv_i8 = global %"struct.std::__1::atomic.0" zeroinitializer, align 4 67@gv_u8 = global %"struct.std::__1::atomic.5" zeroinitializer, align 4 68@gv_i16 = global %"struct.std::__1::atomic.10" zeroinitializer, align 4 69@gv_u16 = global %"struct.std::__1::atomic.15" zeroinitializer, align 4 70@gv_i32 = global %"struct.std::__1::atomic.20" zeroinitializer, align 4 71@gv_u32 = global %"struct.std::__1::atomic.25" zeroinitializer, align 4 72@gv_i64 = global %"struct.std::__1::atomic.30" zeroinitializer, align 8 73@gv_u64 = global %"struct.std::__1::atomic.35" zeroinitializer, align 8 74@gv_i128 = global %"struct.std::__1::atomic.40" zeroinitializer, align 16 75@gv_u128 = global %"struct.std::__1::atomic.45" zeroinitializer, align 16 76 77; Function Attrs: nofree norecurse nounwind mustprogress 78define zeroext i1 @_Z22atomic_load_relaxed_i1RNSt3__16atomicIbEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 79; CHECK-LABEL: _Z22atomic_load_relaxed_i1RNSt3__16atomicIbEE: 80; CHECK: # %bb.0: 81; CHECK-NEXT: ld1b.zx %s0, (, %s0) 82; CHECK-NEXT: and %s0, 1, %s0 83; CHECK-NEXT: b.l.t (, %s10) 84 %2 = load atomic i8, ptr %0 monotonic, align 1 85 %3 = and i8 %2, 1 86 %4 = icmp ne i8 %3, 0 87 ret i1 %4 88} 89 90; Function Attrs: nofree norecurse nounwind mustprogress 91define signext i8 @_Z22atomic_load_relaxed_i8RNSt3__16atomicIcEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 92; CHECK-LABEL: _Z22atomic_load_relaxed_i8RNSt3__16atomicIcEE: 93; CHECK: # %bb.0: 94; CHECK-NEXT: ld1b.sx %s0, (, %s0) 95; CHECK-NEXT: b.l.t (, %s10) 96 %2 = load atomic i8, ptr %0 monotonic, align 1 97 ret i8 %2 98} 99 100; Function Attrs: nofree norecurse nounwind mustprogress 101define zeroext i8 @_Z22atomic_load_relaxed_u8RNSt3__16atomicIhEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 102; CHECK-LABEL: _Z22atomic_load_relaxed_u8RNSt3__16atomicIhEE: 103; CHECK: # %bb.0: 104; CHECK-NEXT: ld1b.zx %s0, (, %s0) 105; CHECK-NEXT: b.l.t (, %s10) 106 %2 = load atomic i8, ptr %0 monotonic, align 1 107 ret i8 %2 108} 109 110; Function Attrs: nofree norecurse nounwind mustprogress 111define signext i16 @_Z23atomic_load_relaxed_i16RNSt3__16atomicIsEE(ptr nocapture nonnull readonly align 2 dereferenceable(2) %0) { 112; CHECK-LABEL: _Z23atomic_load_relaxed_i16RNSt3__16atomicIsEE: 113; CHECK: # %bb.0: 114; CHECK-NEXT: ld2b.sx %s0, (, %s0) 115; CHECK-NEXT: b.l.t (, %s10) 116 %2 = load atomic i16, ptr %0 monotonic, align 2 117 ret i16 %2 118} 119 120; Function Attrs: nofree norecurse nounwind mustprogress 121define zeroext i16 @_Z23atomic_load_relaxed_u16RNSt3__16atomicItEE(ptr nocapture nonnull readonly align 2 dereferenceable(2) %0) { 122; CHECK-LABEL: _Z23atomic_load_relaxed_u16RNSt3__16atomicItEE: 123; CHECK: # %bb.0: 124; CHECK-NEXT: ld2b.zx %s0, (, %s0) 125; CHECK-NEXT: b.l.t (, %s10) 126 %2 = load atomic i16, ptr %0 monotonic, align 2 127 ret i16 %2 128} 129 130; Function Attrs: nofree norecurse nounwind mustprogress 131define signext i32 @_Z23atomic_load_relaxed_i32RNSt3__16atomicIiEE(ptr nocapture nonnull readonly align 4 dereferenceable(4) %0) { 132; CHECK-LABEL: _Z23atomic_load_relaxed_i32RNSt3__16atomicIiEE: 133; CHECK: # %bb.0: 134; CHECK-NEXT: ldl.sx %s0, (, %s0) 135; CHECK-NEXT: b.l.t (, %s10) 136 %2 = load atomic i32, ptr %0 monotonic, align 4 137 ret i32 %2 138} 139 140; Function Attrs: nofree norecurse nounwind mustprogress 141define zeroext i32 @_Z23atomic_load_relaxed_u32RNSt3__16atomicIjEE(ptr nocapture nonnull readonly align 4 dereferenceable(4) %0) { 142; CHECK-LABEL: _Z23atomic_load_relaxed_u32RNSt3__16atomicIjEE: 143; CHECK: # %bb.0: 144; CHECK-NEXT: ldl.zx %s0, (, %s0) 145; CHECK-NEXT: b.l.t (, %s10) 146 %2 = load atomic i32, ptr %0 monotonic, align 4 147 ret i32 %2 148} 149 150; Function Attrs: nofree norecurse nounwind mustprogress 151define i64 @_Z23atomic_load_relaxed_i64RNSt3__16atomicIlEE(ptr nocapture nonnull readonly align 8 dereferenceable(8) %0) { 152; CHECK-LABEL: _Z23atomic_load_relaxed_i64RNSt3__16atomicIlEE: 153; CHECK: # %bb.0: 154; CHECK-NEXT: ld %s0, (, %s0) 155; CHECK-NEXT: b.l.t (, %s10) 156 %2 = load atomic i64, ptr %0 monotonic, align 8 157 ret i64 %2 158} 159 160; Function Attrs: nofree norecurse nounwind mustprogress 161define i64 @_Z23atomic_load_relaxed_u64RNSt3__16atomicImEE(ptr nocapture nonnull readonly align 8 dereferenceable(8) %0) { 162; CHECK-LABEL: _Z23atomic_load_relaxed_u64RNSt3__16atomicImEE: 163; CHECK: # %bb.0: 164; CHECK-NEXT: ld %s0, (, %s0) 165; CHECK-NEXT: b.l.t (, %s10) 166 %2 = load atomic i64, ptr %0 monotonic, align 8 167 ret i64 %2 168} 169 170; Function Attrs: nofree nounwind mustprogress 171define i128 @_Z24atomic_load_relaxed_i128RNSt3__16atomicInEE(ptr nonnull align 16 dereferenceable(16) %0) { 172; CHECK-LABEL: _Z24atomic_load_relaxed_i128RNSt3__16atomicInEE: 173; CHECK: .LBB{{[0-9]+}}_2: 174; CHECK-NEXT: or %s1, 0, %s0 175; CHECK-NEXT: lea %s0, __atomic_load@lo 176; CHECK-NEXT: and %s0, %s0, (32)0 177; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 178; CHECK-NEXT: lea %s2, 240(, %s11) 179; CHECK-NEXT: or %s0, 16, (0)1 180; CHECK-NEXT: or %s3, 0, (0)1 181; CHECK-NEXT: bsic %s10, (, %s12) 182; CHECK-NEXT: ld %s1, 248(, %s11) 183; CHECK-NEXT: ld %s0, 240(, %s11) 184; CHECK-NEXT: or %s11, 0, %s9 185 %2 = alloca i128, align 16 186 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) 187 call void @__atomic_load(i64 16, ptr nonnull %0, ptr nonnull %2, i32 signext 0) 188 %3 = load i128, ptr %2, align 16, !tbaa !2 189 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) 190 ret i128 %3 191} 192 193; Function Attrs: nofree nounwind mustprogress 194define i128 @_Z24atomic_load_relaxed_u128RNSt3__16atomicIoEE(ptr nonnull align 16 dereferenceable(16) %0) { 195; CHECK-LABEL: _Z24atomic_load_relaxed_u128RNSt3__16atomicIoEE: 196; CHECK: .LBB{{[0-9]+}}_2: 197; CHECK-NEXT: or %s1, 0, %s0 198; CHECK-NEXT: lea %s0, __atomic_load@lo 199; CHECK-NEXT: and %s0, %s0, (32)0 200; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 201; CHECK-NEXT: lea %s2, 240(, %s11) 202; CHECK-NEXT: or %s0, 16, (0)1 203; CHECK-NEXT: or %s3, 0, (0)1 204; CHECK-NEXT: bsic %s10, (, %s12) 205; CHECK-NEXT: ld %s1, 248(, %s11) 206; CHECK-NEXT: ld %s0, 240(, %s11) 207; CHECK-NEXT: or %s11, 0, %s9 208 %2 = alloca i128, align 16 209 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) 210 call void @__atomic_load(i64 16, ptr nonnull %0, ptr nonnull %2, i32 signext 0) 211 %3 = load i128, ptr %2, align 16, !tbaa !2 212 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) 213 ret i128 %3 214} 215 216; Function Attrs: nofree norecurse nounwind mustprogress 217define zeroext i1 @_Z22atomic_load_acquire_i1RNSt3__16atomicIbEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 218; CHECK-LABEL: _Z22atomic_load_acquire_i1RNSt3__16atomicIbEE: 219; CHECK: # %bb.0: 220; CHECK-NEXT: ld1b.zx %s0, (, %s0) 221; CHECK-NEXT: and %s0, 1, %s0 222; CHECK-NEXT: fencem 2 223; CHECK-NEXT: b.l.t (, %s10) 224 %2 = load atomic i8, ptr %0 acquire, align 1 225 %3 = and i8 %2, 1 226 %4 = icmp ne i8 %3, 0 227 ret i1 %4 228} 229 230; Function Attrs: nofree norecurse nounwind mustprogress 231define signext i8 @_Z22atomic_load_acquire_i8RNSt3__16atomicIcEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 232; CHECK-LABEL: _Z22atomic_load_acquire_i8RNSt3__16atomicIcEE: 233; CHECK: # %bb.0: 234; CHECK-NEXT: ld1b.sx %s0, (, %s0) 235; CHECK-NEXT: fencem 2 236; CHECK-NEXT: b.l.t (, %s10) 237 %2 = load atomic i8, ptr %0 acquire, align 1 238 ret i8 %2 239} 240 241; Function Attrs: nofree norecurse nounwind mustprogress 242define zeroext i8 @_Z22atomic_load_acquire_u8RNSt3__16atomicIhEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 243; CHECK-LABEL: _Z22atomic_load_acquire_u8RNSt3__16atomicIhEE: 244; CHECK: # %bb.0: 245; CHECK-NEXT: ld1b.zx %s0, (, %s0) 246; CHECK-NEXT: fencem 2 247; CHECK-NEXT: b.l.t (, %s10) 248 %2 = load atomic i8, ptr %0 acquire, align 1 249 ret i8 %2 250} 251 252; Function Attrs: nofree norecurse nounwind mustprogress 253define signext i16 @_Z23atomic_load_acquire_i16RNSt3__16atomicIsEE(ptr nocapture nonnull readonly align 2 dereferenceable(2) %0) { 254; CHECK-LABEL: _Z23atomic_load_acquire_i16RNSt3__16atomicIsEE: 255; CHECK: # %bb.0: 256; CHECK-NEXT: ld2b.sx %s0, (, %s0) 257; CHECK-NEXT: fencem 2 258; CHECK-NEXT: b.l.t (, %s10) 259 %2 = load atomic i16, ptr %0 acquire, align 2 260 ret i16 %2 261} 262 263; Function Attrs: nofree norecurse nounwind mustprogress 264define zeroext i16 @_Z23atomic_load_acquire_u16RNSt3__16atomicItEE(ptr nocapture nonnull readonly align 2 dereferenceable(2) %0) { 265; CHECK-LABEL: _Z23atomic_load_acquire_u16RNSt3__16atomicItEE: 266; CHECK: # %bb.0: 267; CHECK-NEXT: ld2b.zx %s0, (, %s0) 268; CHECK-NEXT: fencem 2 269; CHECK-NEXT: b.l.t (, %s10) 270 %2 = load atomic i16, ptr %0 acquire, align 2 271 ret i16 %2 272} 273 274; Function Attrs: nofree norecurse nounwind mustprogress 275define signext i32 @_Z23atomic_load_acquire_i32RNSt3__16atomicIiEE(ptr nocapture nonnull readonly align 4 dereferenceable(4) %0) { 276; CHECK-LABEL: _Z23atomic_load_acquire_i32RNSt3__16atomicIiEE: 277; CHECK: # %bb.0: 278; CHECK-NEXT: ldl.sx %s0, (, %s0) 279; CHECK-NEXT: fencem 2 280; CHECK-NEXT: b.l.t (, %s10) 281 %2 = load atomic i32, ptr %0 acquire, align 4 282 ret i32 %2 283} 284 285; Function Attrs: nofree norecurse nounwind mustprogress 286define zeroext i32 @_Z23atomic_load_acquire_u32RNSt3__16atomicIjEE(ptr nocapture nonnull readonly align 4 dereferenceable(4) %0) { 287; CHECK-LABEL: _Z23atomic_load_acquire_u32RNSt3__16atomicIjEE: 288; CHECK: # %bb.0: 289; CHECK-NEXT: ldl.zx %s0, (, %s0) 290; CHECK-NEXT: fencem 2 291; CHECK-NEXT: b.l.t (, %s10) 292 %2 = load atomic i32, ptr %0 acquire, align 4 293 ret i32 %2 294} 295 296; Function Attrs: nofree norecurse nounwind mustprogress 297define i64 @_Z23atomic_load_acquire_i64RNSt3__16atomicIlEE(ptr nocapture nonnull readonly align 8 dereferenceable(8) %0) { 298; CHECK-LABEL: _Z23atomic_load_acquire_i64RNSt3__16atomicIlEE: 299; CHECK: # %bb.0: 300; CHECK-NEXT: ld %s0, (, %s0) 301; CHECK-NEXT: fencem 2 302; CHECK-NEXT: b.l.t (, %s10) 303 %2 = load atomic i64, ptr %0 acquire, align 8 304 ret i64 %2 305} 306 307; Function Attrs: nofree norecurse nounwind mustprogress 308define i64 @_Z23atomic_load_acquire_u64RNSt3__16atomicImEE(ptr nocapture nonnull readonly align 8 dereferenceable(8) %0) { 309; CHECK-LABEL: _Z23atomic_load_acquire_u64RNSt3__16atomicImEE: 310; CHECK: # %bb.0: 311; CHECK-NEXT: ld %s0, (, %s0) 312; CHECK-NEXT: fencem 2 313; CHECK-NEXT: b.l.t (, %s10) 314 %2 = load atomic i64, ptr %0 acquire, align 8 315 ret i64 %2 316} 317 318; Function Attrs: nofree nounwind mustprogress 319define i128 @_Z24atomic_load_acquire_i128RNSt3__16atomicInEE(ptr nonnull align 16 dereferenceable(16) %0) { 320; CHECK-LABEL: _Z24atomic_load_acquire_i128RNSt3__16atomicInEE: 321; CHECK: .LBB{{[0-9]+}}_2: 322; CHECK-NEXT: or %s1, 0, %s0 323; CHECK-NEXT: lea %s0, __atomic_load@lo 324; CHECK-NEXT: and %s0, %s0, (32)0 325; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 326; CHECK-NEXT: lea %s2, 240(, %s11) 327; CHECK-NEXT: or %s0, 16, (0)1 328; CHECK-NEXT: or %s3, 2, (0)1 329; CHECK-NEXT: bsic %s10, (, %s12) 330; CHECK-NEXT: ld %s1, 248(, %s11) 331; CHECK-NEXT: ld %s0, 240(, %s11) 332; CHECK-NEXT: or %s11, 0, %s9 333 %2 = alloca i128, align 16 334 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) 335 call void @__atomic_load(i64 16, ptr nonnull %0, ptr nonnull %2, i32 signext 2) 336 %3 = load i128, ptr %2, align 16, !tbaa !2 337 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) 338 ret i128 %3 339} 340 341; Function Attrs: nofree nounwind mustprogress 342define i128 @_Z24atomic_load_acquire_u128RNSt3__16atomicIoEE(ptr nonnull align 16 dereferenceable(16) %0) { 343; CHECK-LABEL: _Z24atomic_load_acquire_u128RNSt3__16atomicIoEE: 344; CHECK: .LBB{{[0-9]+}}_2: 345; CHECK-NEXT: or %s1, 0, %s0 346; CHECK-NEXT: lea %s0, __atomic_load@lo 347; CHECK-NEXT: and %s0, %s0, (32)0 348; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 349; CHECK-NEXT: lea %s2, 240(, %s11) 350; CHECK-NEXT: or %s0, 16, (0)1 351; CHECK-NEXT: or %s3, 2, (0)1 352; CHECK-NEXT: bsic %s10, (, %s12) 353; CHECK-NEXT: ld %s1, 248(, %s11) 354; CHECK-NEXT: ld %s0, 240(, %s11) 355; CHECK-NEXT: or %s11, 0, %s9 356 %2 = alloca i128, align 16 357 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) 358 call void @__atomic_load(i64 16, ptr nonnull %0, ptr nonnull %2, i32 signext 2) 359 %3 = load i128, ptr %2, align 16, !tbaa !2 360 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) 361 ret i128 %3 362} 363 364; Function Attrs: nofree norecurse nounwind mustprogress 365define zeroext i1 @_Z22atomic_load_seq_cst_i1RNSt3__16atomicIbEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 366; CHECK-LABEL: _Z22atomic_load_seq_cst_i1RNSt3__16atomicIbEE: 367; CHECK: # %bb.0: 368; CHECK-NEXT: ld1b.zx %s0, (, %s0) 369; CHECK-NEXT: and %s0, 1, %s0 370; CHECK-NEXT: fencem 3 371; CHECK-NEXT: b.l.t (, %s10) 372 %2 = load atomic i8, ptr %0 seq_cst, align 1 373 %3 = and i8 %2, 1 374 %4 = icmp ne i8 %3, 0 375 ret i1 %4 376} 377 378; Function Attrs: nofree norecurse nounwind mustprogress 379define signext i8 @_Z22atomic_load_seq_cst_i8RNSt3__16atomicIcEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 380; CHECK-LABEL: _Z22atomic_load_seq_cst_i8RNSt3__16atomicIcEE: 381; CHECK: # %bb.0: 382; CHECK-NEXT: ld1b.sx %s0, (, %s0) 383; CHECK-NEXT: fencem 3 384; CHECK-NEXT: b.l.t (, %s10) 385 %2 = load atomic i8, ptr %0 seq_cst, align 1 386 ret i8 %2 387} 388 389; Function Attrs: nofree norecurse nounwind mustprogress 390define zeroext i8 @_Z22atomic_load_seq_cst_u8RNSt3__16atomicIhEE(ptr nocapture nonnull readonly align 1 dereferenceable(1) %0) { 391; CHECK-LABEL: _Z22atomic_load_seq_cst_u8RNSt3__16atomicIhEE: 392; CHECK: # %bb.0: 393; CHECK-NEXT: ld1b.zx %s0, (, %s0) 394; CHECK-NEXT: fencem 3 395; CHECK-NEXT: b.l.t (, %s10) 396 %2 = load atomic i8, ptr %0 seq_cst, align 1 397 ret i8 %2 398} 399 400; Function Attrs: nofree norecurse nounwind mustprogress 401define signext i16 @_Z23atomic_load_seq_cst_i16RNSt3__16atomicIsEE(ptr nocapture nonnull readonly align 2 dereferenceable(2) %0) { 402; CHECK-LABEL: _Z23atomic_load_seq_cst_i16RNSt3__16atomicIsEE: 403; CHECK: # %bb.0: 404; CHECK-NEXT: ld2b.sx %s0, (, %s0) 405; CHECK-NEXT: fencem 3 406; CHECK-NEXT: b.l.t (, %s10) 407 %2 = load atomic i16, ptr %0 seq_cst, align 2 408 ret i16 %2 409} 410 411; Function Attrs: nofree norecurse nounwind mustprogress 412define zeroext i16 @_Z23atomic_load_seq_cst_u16RNSt3__16atomicItEE(ptr nocapture nonnull readonly align 2 dereferenceable(2) %0) { 413; CHECK-LABEL: _Z23atomic_load_seq_cst_u16RNSt3__16atomicItEE: 414; CHECK: # %bb.0: 415; CHECK-NEXT: ld2b.zx %s0, (, %s0) 416; CHECK-NEXT: fencem 3 417; CHECK-NEXT: b.l.t (, %s10) 418 %2 = load atomic i16, ptr %0 seq_cst, align 2 419 ret i16 %2 420} 421 422; Function Attrs: nofree norecurse nounwind mustprogress 423define signext i32 @_Z23atomic_load_seq_cst_i32RNSt3__16atomicIiEE(ptr nocapture nonnull readonly align 4 dereferenceable(4) %0) { 424; CHECK-LABEL: _Z23atomic_load_seq_cst_i32RNSt3__16atomicIiEE: 425; CHECK: # %bb.0: 426; CHECK-NEXT: ldl.sx %s0, (, %s0) 427; CHECK-NEXT: fencem 3 428; CHECK-NEXT: b.l.t (, %s10) 429 %2 = load atomic i32, ptr %0 seq_cst, align 4 430 ret i32 %2 431} 432 433; Function Attrs: nofree norecurse nounwind mustprogress 434define zeroext i32 @_Z23atomic_load_seq_cst_u32RNSt3__16atomicIjEE(ptr nocapture nonnull readonly align 4 dereferenceable(4) %0) { 435; CHECK-LABEL: _Z23atomic_load_seq_cst_u32RNSt3__16atomicIjEE: 436; CHECK: # %bb.0: 437; CHECK-NEXT: ldl.zx %s0, (, %s0) 438; CHECK-NEXT: fencem 3 439; CHECK-NEXT: b.l.t (, %s10) 440 %2 = load atomic i32, ptr %0 seq_cst, align 4 441 ret i32 %2 442} 443 444; Function Attrs: nofree norecurse nounwind mustprogress 445define i64 @_Z23atomic_load_seq_cst_i64RNSt3__16atomicIlEE(ptr nocapture nonnull readonly align 8 dereferenceable(8) %0) { 446; CHECK-LABEL: _Z23atomic_load_seq_cst_i64RNSt3__16atomicIlEE: 447; CHECK: # %bb.0: 448; CHECK-NEXT: ld %s0, (, %s0) 449; CHECK-NEXT: fencem 3 450; CHECK-NEXT: b.l.t (, %s10) 451 %2 = load atomic i64, ptr %0 seq_cst, align 8 452 ret i64 %2 453} 454 455; Function Attrs: nofree norecurse nounwind mustprogress 456define i64 @_Z23atomic_load_seq_cst_u64RNSt3__16atomicImEE(ptr nocapture nonnull readonly align 8 dereferenceable(8) %0) { 457; CHECK-LABEL: _Z23atomic_load_seq_cst_u64RNSt3__16atomicImEE: 458; CHECK: # %bb.0: 459; CHECK-NEXT: ld %s0, (, %s0) 460; CHECK-NEXT: fencem 3 461; CHECK-NEXT: b.l.t (, %s10) 462 %2 = load atomic i64, ptr %0 seq_cst, align 8 463 ret i64 %2 464} 465 466; Function Attrs: nofree nounwind mustprogress 467define i128 @_Z24atomic_load_seq_cst_i128RNSt3__16atomicInEE(ptr nonnull align 16 dereferenceable(16) %0) { 468; CHECK-LABEL: _Z24atomic_load_seq_cst_i128RNSt3__16atomicInEE: 469; CHECK: .LBB{{[0-9]+}}_2: 470; CHECK-NEXT: or %s1, 0, %s0 471; CHECK-NEXT: lea %s0, __atomic_load@lo 472; CHECK-NEXT: and %s0, %s0, (32)0 473; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 474; CHECK-NEXT: lea %s2, 240(, %s11) 475; CHECK-NEXT: or %s0, 16, (0)1 476; CHECK-NEXT: or %s3, 5, (0)1 477; CHECK-NEXT: bsic %s10, (, %s12) 478; CHECK-NEXT: ld %s1, 248(, %s11) 479; CHECK-NEXT: ld %s0, 240(, %s11) 480; CHECK-NEXT: or %s11, 0, %s9 481 %2 = alloca i128, align 16 482 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) 483 call void @__atomic_load(i64 16, ptr nonnull %0, ptr nonnull %2, i32 signext 5) 484 %3 = load i128, ptr %2, align 16, !tbaa !2 485 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) 486 ret i128 %3 487} 488 489; Function Attrs: nofree nounwind mustprogress 490define i128 @_Z24atomic_load_seq_cst_u128RNSt3__16atomicIoEE(ptr nonnull align 16 dereferenceable(16) %0) { 491; CHECK-LABEL: _Z24atomic_load_seq_cst_u128RNSt3__16atomicIoEE: 492; CHECK: .LBB{{[0-9]+}}_2: 493; CHECK-NEXT: or %s1, 0, %s0 494; CHECK-NEXT: lea %s0, __atomic_load@lo 495; CHECK-NEXT: and %s0, %s0, (32)0 496; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 497; CHECK-NEXT: lea %s2, 240(, %s11) 498; CHECK-NEXT: or %s0, 16, (0)1 499; CHECK-NEXT: or %s3, 5, (0)1 500; CHECK-NEXT: bsic %s10, (, %s12) 501; CHECK-NEXT: ld %s1, 248(, %s11) 502; CHECK-NEXT: ld %s0, 240(, %s11) 503; CHECK-NEXT: or %s11, 0, %s9 504 %2 = alloca i128, align 16 505 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) 506 call void @__atomic_load(i64 16, ptr nonnull %0, ptr nonnull %2, i32 signext 5) 507 %3 = load i128, ptr %2, align 16, !tbaa !2 508 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) 509 ret i128 %3 510} 511 512; Function Attrs: mustprogress 513define zeroext i1 @_Z26atomic_load_relaxed_stk_i1v() { 514; CHECK-LABEL: _Z26atomic_load_relaxed_stk_i1v: 515; CHECK: .LBB{{[0-9]+}}_2: 516; CHECK-NEXT: lea %s0, _Z6fun_i1RNSt3__16atomicIbEE@lo 517; CHECK-NEXT: and %s0, %s0, (32)0 518; CHECK-NEXT: lea.sl %s12, _Z6fun_i1RNSt3__16atomicIbEE@hi(, %s0) 519; CHECK-NEXT: lea %s0, 248(, %s11) 520; CHECK-NEXT: bsic %s10, (, %s12) 521; CHECK-NEXT: ld1b.zx %s0, 248(, %s11) 522; CHECK-NEXT: and %s0, 1, %s0 523; CHECK-NEXT: or %s11, 0, %s9 524 %1 = alloca %"struct.std::__1::atomic", align 8 525 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) 526 call void @_Z6fun_i1RNSt3__16atomicIbEE(ptr nonnull align 1 dereferenceable(1) %1) 527 %2 = load atomic i8, ptr %1 monotonic, align 1 528 %3 = and i8 %2, 1 529 %4 = icmp ne i8 %3, 0 530 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1) 531 ret i1 %4 532} 533 534; Function Attrs: argmemonly nofree nosync nounwind willreturn 535declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) 536 537declare void @_Z6fun_i1RNSt3__16atomicIbEE(ptr nonnull align 1 dereferenceable(1)) 538 539; Function Attrs: argmemonly nofree nosync nounwind willreturn 540declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) 541 542; Function Attrs: mustprogress 543define signext i8 @_Z26atomic_load_relaxed_stk_i8v() { 544; CHECK-LABEL: _Z26atomic_load_relaxed_stk_i8v: 545; CHECK: .LBB{{[0-9]+}}_2: 546; CHECK-NEXT: lea %s0, _Z6fun_i8RNSt3__16atomicIcEE@lo 547; CHECK-NEXT: and %s0, %s0, (32)0 548; CHECK-NEXT: lea.sl %s12, _Z6fun_i8RNSt3__16atomicIcEE@hi(, %s0) 549; CHECK-NEXT: lea %s0, 248(, %s11) 550; CHECK-NEXT: bsic %s10, (, %s12) 551; CHECK-NEXT: ld1b.sx %s0, 248(, %s11) 552; CHECK-NEXT: or %s11, 0, %s9 553 %1 = alloca %"struct.std::__1::atomic.0", align 8 554 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) 555 call void @_Z6fun_i8RNSt3__16atomicIcEE(ptr nonnull align 1 dereferenceable(1) %1) 556 %2 = load atomic i8, ptr %1 monotonic, align 1 557 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1) 558 ret i8 %2 559} 560 561declare void @_Z6fun_i8RNSt3__16atomicIcEE(ptr nonnull align 1 dereferenceable(1)) 562 563; Function Attrs: mustprogress 564define zeroext i8 @_Z26atomic_load_relaxed_stk_u8v() { 565; CHECK-LABEL: _Z26atomic_load_relaxed_stk_u8v: 566; CHECK: .LBB{{[0-9]+}}_2: 567; CHECK-NEXT: lea %s0, _Z6fun_u8RNSt3__16atomicIhEE@lo 568; CHECK-NEXT: and %s0, %s0, (32)0 569; CHECK-NEXT: lea.sl %s12, _Z6fun_u8RNSt3__16atomicIhEE@hi(, %s0) 570; CHECK-NEXT: lea %s0, 248(, %s11) 571; CHECK-NEXT: bsic %s10, (, %s12) 572; CHECK-NEXT: ld1b.zx %s0, 248(, %s11) 573; CHECK-NEXT: or %s11, 0, %s9 574 %1 = alloca %"struct.std::__1::atomic.5", align 8 575 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %1) 576 call void @_Z6fun_u8RNSt3__16atomicIhEE(ptr nonnull align 1 dereferenceable(1) %1) 577 %2 = load atomic i8, ptr %1 monotonic, align 1 578 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %1) 579 ret i8 %2 580} 581 582declare void @_Z6fun_u8RNSt3__16atomicIhEE(ptr nonnull align 1 dereferenceable(1)) 583 584; Function Attrs: mustprogress 585define signext i16 @_Z27atomic_load_relaxed_stk_i16v() { 586; CHECK-LABEL: _Z27atomic_load_relaxed_stk_i16v: 587; CHECK: .LBB{{[0-9]+}}_2: 588; CHECK-NEXT: lea %s0, _Z7fun_i16RNSt3__16atomicIsEE@lo 589; CHECK-NEXT: and %s0, %s0, (32)0 590; CHECK-NEXT: lea.sl %s12, _Z7fun_i16RNSt3__16atomicIsEE@hi(, %s0) 591; CHECK-NEXT: lea %s0, 248(, %s11) 592; CHECK-NEXT: bsic %s10, (, %s12) 593; CHECK-NEXT: ld2b.sx %s0, 248(, %s11) 594; CHECK-NEXT: or %s11, 0, %s9 595 %1 = alloca %"struct.std::__1::atomic.10", align 8 596 call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %1) 597 call void @_Z7fun_i16RNSt3__16atomicIsEE(ptr nonnull align 2 dereferenceable(2) %1) 598 %2 = load atomic i16, ptr %1 monotonic, align 2 599 call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %1) 600 ret i16 %2 601} 602 603declare void @_Z7fun_i16RNSt3__16atomicIsEE(ptr nonnull align 2 dereferenceable(2)) 604 605; Function Attrs: mustprogress 606define zeroext i16 @_Z27atomic_load_relaxed_stk_u16v() { 607; CHECK-LABEL: _Z27atomic_load_relaxed_stk_u16v: 608; CHECK: .LBB{{[0-9]+}}_2: 609; CHECK-NEXT: lea %s0, _Z7fun_u16RNSt3__16atomicItEE@lo 610; CHECK-NEXT: and %s0, %s0, (32)0 611; CHECK-NEXT: lea.sl %s12, _Z7fun_u16RNSt3__16atomicItEE@hi(, %s0) 612; CHECK-NEXT: lea %s0, 248(, %s11) 613; CHECK-NEXT: bsic %s10, (, %s12) 614; CHECK-NEXT: ld2b.zx %s0, 248(, %s11) 615; CHECK-NEXT: or %s11, 0, %s9 616 %1 = alloca %"struct.std::__1::atomic.15", align 8 617 call void @llvm.lifetime.start.p0(i64 2, ptr nonnull %1) 618 call void @_Z7fun_u16RNSt3__16atomicItEE(ptr nonnull align 2 dereferenceable(2) %1) 619 %2 = load atomic i16, ptr %1 monotonic, align 2 620 call void @llvm.lifetime.end.p0(i64 2, ptr nonnull %1) 621 ret i16 %2 622} 623 624declare void @_Z7fun_u16RNSt3__16atomicItEE(ptr nonnull align 2 dereferenceable(2)) 625 626; Function Attrs: mustprogress 627define signext i32 @_Z27atomic_load_relaxed_stk_i32v() { 628; CHECK-LABEL: _Z27atomic_load_relaxed_stk_i32v: 629; CHECK: .LBB{{[0-9]+}}_2: 630; CHECK-NEXT: lea %s0, _Z7fun_i32RNSt3__16atomicIiEE@lo 631; CHECK-NEXT: and %s0, %s0, (32)0 632; CHECK-NEXT: lea.sl %s12, _Z7fun_i32RNSt3__16atomicIiEE@hi(, %s0) 633; CHECK-NEXT: lea %s0, 248(, %s11) 634; CHECK-NEXT: bsic %s10, (, %s12) 635; CHECK-NEXT: ldl.sx %s0, 248(, %s11) 636; CHECK-NEXT: or %s11, 0, %s9 637 %1 = alloca %"struct.std::__1::atomic.20", align 8 638 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) 639 call void @_Z7fun_i32RNSt3__16atomicIiEE(ptr nonnull align 4 dereferenceable(4) %1) 640 %2 = load atomic i32, ptr %1 monotonic, align 4 641 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) 642 ret i32 %2 643} 644 645declare void @_Z7fun_i32RNSt3__16atomicIiEE(ptr nonnull align 4 dereferenceable(4)) 646 647; Function Attrs: mustprogress 648define zeroext i32 @_Z27atomic_load_relaxed_stk_u32v() { 649; CHECK-LABEL: _Z27atomic_load_relaxed_stk_u32v: 650; CHECK: .LBB{{[0-9]+}}_2: 651; CHECK-NEXT: lea %s0, _Z7fun_u32RNSt3__16atomicIjEE@lo 652; CHECK-NEXT: and %s0, %s0, (32)0 653; CHECK-NEXT: lea.sl %s12, _Z7fun_u32RNSt3__16atomicIjEE@hi(, %s0) 654; CHECK-NEXT: lea %s0, 248(, %s11) 655; CHECK-NEXT: bsic %s10, (, %s12) 656; CHECK-NEXT: ldl.zx %s0, 248(, %s11) 657; CHECK-NEXT: or %s11, 0, %s9 658 %1 = alloca %"struct.std::__1::atomic.25", align 8 659 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) 660 call void @_Z7fun_u32RNSt3__16atomicIjEE(ptr nonnull align 4 dereferenceable(4) %1) 661 %2 = load atomic i32, ptr %1 monotonic, align 4 662 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) 663 ret i32 %2 664} 665 666declare void @_Z7fun_u32RNSt3__16atomicIjEE(ptr nonnull align 4 dereferenceable(4)) 667 668; Function Attrs: mustprogress 669define i64 @_Z27atomic_load_relaxed_stk_i64v() { 670; CHECK-LABEL: _Z27atomic_load_relaxed_stk_i64v: 671; CHECK: .LBB{{[0-9]+}}_2: 672; CHECK-NEXT: lea %s0, _Z7fun_i64RNSt3__16atomicIlEE@lo 673; CHECK-NEXT: and %s0, %s0, (32)0 674; CHECK-NEXT: lea.sl %s12, _Z7fun_i64RNSt3__16atomicIlEE@hi(, %s0) 675; CHECK-NEXT: lea %s0, 248(, %s11) 676; CHECK-NEXT: bsic %s10, (, %s12) 677; CHECK-NEXT: ld %s0, 248(, %s11) 678; CHECK-NEXT: or %s11, 0, %s9 679 %1 = alloca %"struct.std::__1::atomic.30", align 8 680 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) 681 call void @_Z7fun_i64RNSt3__16atomicIlEE(ptr nonnull align 8 dereferenceable(8) %1) 682 %2 = load atomic i64, ptr %1 monotonic, align 8 683 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) 684 ret i64 %2 685} 686 687declare void @_Z7fun_i64RNSt3__16atomicIlEE(ptr nonnull align 8 dereferenceable(8)) 688 689; Function Attrs: mustprogress 690define i64 @_Z27atomic_load_relaxed_stk_u64v() { 691; CHECK-LABEL: _Z27atomic_load_relaxed_stk_u64v: 692; CHECK: .LBB{{[0-9]+}}_2: 693; CHECK-NEXT: lea %s0, _Z7fun_u64RNSt3__16atomicImEE@lo 694; CHECK-NEXT: and %s0, %s0, (32)0 695; CHECK-NEXT: lea.sl %s12, _Z7fun_u64RNSt3__16atomicImEE@hi(, %s0) 696; CHECK-NEXT: lea %s0, 248(, %s11) 697; CHECK-NEXT: bsic %s10, (, %s12) 698; CHECK-NEXT: ld %s0, 248(, %s11) 699; CHECK-NEXT: or %s11, 0, %s9 700 %1 = alloca %"struct.std::__1::atomic.35", align 8 701 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) 702 call void @_Z7fun_u64RNSt3__16atomicImEE(ptr nonnull align 8 dereferenceable(8) %1) 703 %2 = load atomic i64, ptr %1 monotonic, align 8 704 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) 705 ret i64 %2 706} 707 708declare void @_Z7fun_u64RNSt3__16atomicImEE(ptr nonnull align 8 dereferenceable(8)) 709 710; Function Attrs: mustprogress 711define i128 @_Z28atomic_load_relaxed_stk_i128v() { 712; CHECK-LABEL: _Z28atomic_load_relaxed_stk_i128v: 713; CHECK: .LBB{{[0-9]+}}_2: 714; CHECK-NEXT: lea %s0, _Z8fun_i128RNSt3__16atomicInEE@lo 715; CHECK-NEXT: and %s0, %s0, (32)0 716; CHECK-NEXT: lea.sl %s12, _Z8fun_i128RNSt3__16atomicInEE@hi(, %s0) 717; CHECK-NEXT: lea %s0, 240(, %s11) 718; CHECK-NEXT: bsic %s10, (, %s12) 719; CHECK-NEXT: lea %s0, __atomic_load@lo 720; CHECK-NEXT: and %s0, %s0, (32)0 721; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 722; CHECK-NEXT: lea %s1, 240(, %s11) 723; CHECK-NEXT: lea %s2, 256(, %s11) 724; CHECK-NEXT: or %s0, 16, (0)1 725; CHECK-NEXT: or %s3, 0, (0)1 726; CHECK-NEXT: bsic %s10, (, %s12) 727; CHECK-NEXT: ld %s1, 264(, %s11) 728; CHECK-NEXT: ld %s0, 256(, %s11) 729; CHECK-NEXT: or %s11, 0, %s9 730 %1 = alloca i128, align 16 731 %2 = alloca %"struct.std::__1::atomic.40", align 16 732 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) 733 call void @_Z8fun_i128RNSt3__16atomicInEE(ptr nonnull align 16 dereferenceable(16) %2) 734 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) 735 call void @__atomic_load(i64 16, ptr nonnull %2, ptr nonnull %1, i32 signext 0) 736 %3 = load i128, ptr %1, align 16, !tbaa !2 737 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) 738 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) 739 ret i128 %3 740} 741 742declare void @_Z8fun_i128RNSt3__16atomicInEE(ptr nonnull align 16 dereferenceable(16)) 743 744; Function Attrs: mustprogress 745define i128 @_Z28atomic_load_relaxed_stk_u128v() { 746; CHECK-LABEL: _Z28atomic_load_relaxed_stk_u128v: 747; CHECK: .LBB{{[0-9]+}}_2: 748; CHECK-NEXT: lea %s0, _Z8fun_u128RNSt3__16atomicIoEE@lo 749; CHECK-NEXT: and %s0, %s0, (32)0 750; CHECK-NEXT: lea.sl %s12, _Z8fun_u128RNSt3__16atomicIoEE@hi(, %s0) 751; CHECK-NEXT: lea %s0, 240(, %s11) 752; CHECK-NEXT: bsic %s10, (, %s12) 753; CHECK-NEXT: lea %s0, __atomic_load@lo 754; CHECK-NEXT: and %s0, %s0, (32)0 755; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 756; CHECK-NEXT: lea %s1, 240(, %s11) 757; CHECK-NEXT: lea %s2, 256(, %s11) 758; CHECK-NEXT: or %s0, 16, (0)1 759; CHECK-NEXT: or %s3, 0, (0)1 760; CHECK-NEXT: bsic %s10, (, %s12) 761; CHECK-NEXT: ld %s1, 264(, %s11) 762; CHECK-NEXT: ld %s0, 256(, %s11) 763; CHECK-NEXT: or %s11, 0, %s9 764 %1 = alloca i128, align 16 765 %2 = alloca %"struct.std::__1::atomic.45", align 16 766 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) 767 call void @_Z8fun_u128RNSt3__16atomicIoEE(ptr nonnull align 16 dereferenceable(16) %2) 768 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) 769 call void @__atomic_load(i64 16, ptr nonnull %2, ptr nonnull %1, i32 signext 0) 770 %3 = load i128, ptr %1, align 16, !tbaa !2 771 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) 772 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) 773 ret i128 %3 774} 775 776declare void @_Z8fun_u128RNSt3__16atomicIoEE(ptr nonnull align 16 dereferenceable(16)) 777 778; Function Attrs: nofree norecurse nounwind mustprogress 779define zeroext i1 @_Z25atomic_load_relaxed_gv_i1v() { 780; CHECK-LABEL: _Z25atomic_load_relaxed_gv_i1v: 781; CHECK: # %bb.0: 782; CHECK-NEXT: lea %s0, gv_i1@lo 783; CHECK-NEXT: and %s0, %s0, (32)0 784; CHECK-NEXT: lea.sl %s0, gv_i1@hi(, %s0) 785; CHECK-NEXT: ld1b.zx %s0, (, %s0) 786; CHECK-NEXT: and %s0, 1, %s0 787; CHECK-NEXT: b.l.t (, %s10) 788 %1 = load atomic i8, ptr @gv_i1 monotonic, align 4 789 %2 = and i8 %1, 1 790 %3 = icmp ne i8 %2, 0 791 ret i1 %3 792} 793 794; Function Attrs: nofree norecurse nounwind mustprogress 795define signext i8 @_Z25atomic_load_relaxed_gv_i8v() { 796; CHECK-LABEL: _Z25atomic_load_relaxed_gv_i8v: 797; CHECK: # %bb.0: 798; CHECK-NEXT: lea %s0, gv_i8@lo 799; CHECK-NEXT: and %s0, %s0, (32)0 800; CHECK-NEXT: lea.sl %s0, gv_i8@hi(, %s0) 801; CHECK-NEXT: ld1b.sx %s0, (, %s0) 802; CHECK-NEXT: b.l.t (, %s10) 803 %1 = load atomic i8, ptr @gv_i8 monotonic, align 4 804 ret i8 %1 805} 806 807; Function Attrs: nofree norecurse nounwind mustprogress 808define zeroext i8 @_Z25atomic_load_relaxed_gv_u8v() { 809; CHECK-LABEL: _Z25atomic_load_relaxed_gv_u8v: 810; CHECK: # %bb.0: 811; CHECK-NEXT: lea %s0, gv_u8@lo 812; CHECK-NEXT: and %s0, %s0, (32)0 813; CHECK-NEXT: lea.sl %s0, gv_u8@hi(, %s0) 814; CHECK-NEXT: ld1b.zx %s0, (, %s0) 815; CHECK-NEXT: b.l.t (, %s10) 816 %1 = load atomic i8, ptr @gv_u8 monotonic, align 4 817 ret i8 %1 818} 819 820; Function Attrs: nofree norecurse nounwind mustprogress 821define signext i16 @_Z26atomic_load_relaxed_gv_i16v() { 822; CHECK-LABEL: _Z26atomic_load_relaxed_gv_i16v: 823; CHECK: # %bb.0: 824; CHECK-NEXT: lea %s0, gv_i16@lo 825; CHECK-NEXT: and %s0, %s0, (32)0 826; CHECK-NEXT: lea.sl %s0, gv_i16@hi(, %s0) 827; CHECK-NEXT: ld2b.sx %s0, (, %s0) 828; CHECK-NEXT: b.l.t (, %s10) 829 %1 = load atomic i16, ptr @gv_i16 monotonic, align 4 830 ret i16 %1 831} 832 833; Function Attrs: nofree norecurse nounwind mustprogress 834define zeroext i16 @_Z26atomic_load_relaxed_gv_u16v() { 835; CHECK-LABEL: _Z26atomic_load_relaxed_gv_u16v: 836; CHECK: # %bb.0: 837; CHECK-NEXT: lea %s0, gv_u16@lo 838; CHECK-NEXT: and %s0, %s0, (32)0 839; CHECK-NEXT: lea.sl %s0, gv_u16@hi(, %s0) 840; CHECK-NEXT: ld2b.zx %s0, (, %s0) 841; CHECK-NEXT: b.l.t (, %s10) 842 %1 = load atomic i16, ptr @gv_u16 monotonic, align 4 843 ret i16 %1 844} 845 846; Function Attrs: nofree norecurse nounwind mustprogress 847define signext i32 @_Z26atomic_load_relaxed_gv_i32v() { 848; CHECK-LABEL: _Z26atomic_load_relaxed_gv_i32v: 849; CHECK: # %bb.0: 850; CHECK-NEXT: lea %s0, gv_i32@lo 851; CHECK-NEXT: and %s0, %s0, (32)0 852; CHECK-NEXT: lea.sl %s0, gv_i32@hi(, %s0) 853; CHECK-NEXT: ldl.sx %s0, (, %s0) 854; CHECK-NEXT: b.l.t (, %s10) 855 %1 = load atomic i32, ptr @gv_i32 monotonic, align 4 856 ret i32 %1 857} 858 859; Function Attrs: nofree norecurse nounwind mustprogress 860define zeroext i32 @_Z26atomic_load_relaxed_gv_u32v() { 861; CHECK-LABEL: _Z26atomic_load_relaxed_gv_u32v: 862; CHECK: # %bb.0: 863; CHECK-NEXT: lea %s0, gv_u32@lo 864; CHECK-NEXT: and %s0, %s0, (32)0 865; CHECK-NEXT: lea.sl %s0, gv_u32@hi(, %s0) 866; CHECK-NEXT: ldl.zx %s0, (, %s0) 867; CHECK-NEXT: b.l.t (, %s10) 868 %1 = load atomic i32, ptr @gv_u32 monotonic, align 4 869 ret i32 %1 870} 871 872; Function Attrs: nofree norecurse nounwind mustprogress 873define i64 @_Z26atomic_load_relaxed_gv_i64v() { 874; CHECK-LABEL: _Z26atomic_load_relaxed_gv_i64v: 875; CHECK: # %bb.0: 876; CHECK-NEXT: lea %s0, gv_i64@lo 877; CHECK-NEXT: and %s0, %s0, (32)0 878; CHECK-NEXT: lea.sl %s0, gv_i64@hi(, %s0) 879; CHECK-NEXT: ld %s0, (, %s0) 880; CHECK-NEXT: b.l.t (, %s10) 881 %1 = load atomic i64, ptr @gv_i64 monotonic, align 8 882 ret i64 %1 883} 884 885; Function Attrs: nofree norecurse nounwind mustprogress 886define i64 @_Z26atomic_load_relaxed_gv_u64v() { 887; CHECK-LABEL: _Z26atomic_load_relaxed_gv_u64v: 888; CHECK: # %bb.0: 889; CHECK-NEXT: lea %s0, gv_u64@lo 890; CHECK-NEXT: and %s0, %s0, (32)0 891; CHECK-NEXT: lea.sl %s0, gv_u64@hi(, %s0) 892; CHECK-NEXT: ld %s0, (, %s0) 893; CHECK-NEXT: b.l.t (, %s10) 894 %1 = load atomic i64, ptr @gv_u64 monotonic, align 8 895 ret i64 %1 896} 897 898; Function Attrs: nofree nounwind mustprogress 899define i128 @_Z27atomic_load_relaxed_gv_i128v() { 900; CHECK-LABEL: _Z27atomic_load_relaxed_gv_i128v: 901; CHECK: .LBB{{[0-9]+}}_2: 902; CHECK-NEXT: lea %s0, __atomic_load@lo 903; CHECK-NEXT: and %s0, %s0, (32)0 904; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 905; CHECK-NEXT: lea %s0, gv_i128@lo 906; CHECK-NEXT: and %s0, %s0, (32)0 907; CHECK-NEXT: lea.sl %s1, gv_i128@hi(, %s0) 908; CHECK-NEXT: lea %s2, 240(, %s11) 909; CHECK-NEXT: or %s0, 16, (0)1 910; CHECK-NEXT: or %s3, 0, (0)1 911; CHECK-NEXT: bsic %s10, (, %s12) 912; CHECK-NEXT: ld %s1, 248(, %s11) 913; CHECK-NEXT: ld %s0, 240(, %s11) 914; CHECK-NEXT: or %s11, 0, %s9 915 %1 = alloca i128, align 16 916 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) 917 call void @__atomic_load(i64 16, ptr nonnull @gv_i128, ptr nonnull %1, i32 signext 0) 918 %2 = load i128, ptr %1, align 16, !tbaa !2 919 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) 920 ret i128 %2 921} 922 923; Function Attrs: nofree nounwind mustprogress 924define i128 @_Z27atomic_load_relaxed_gv_u128v() { 925; CHECK-LABEL: _Z27atomic_load_relaxed_gv_u128v: 926; CHECK: .LBB{{[0-9]+}}_2: 927; CHECK-NEXT: lea %s0, __atomic_load@lo 928; CHECK-NEXT: and %s0, %s0, (32)0 929; CHECK-NEXT: lea.sl %s12, __atomic_load@hi(, %s0) 930; CHECK-NEXT: lea %s0, gv_u128@lo 931; CHECK-NEXT: and %s0, %s0, (32)0 932; CHECK-NEXT: lea.sl %s1, gv_u128@hi(, %s0) 933; CHECK-NEXT: lea %s2, 240(, %s11) 934; CHECK-NEXT: or %s0, 16, (0)1 935; CHECK-NEXT: or %s3, 0, (0)1 936; CHECK-NEXT: bsic %s10, (, %s12) 937; CHECK-NEXT: ld %s1, 248(, %s11) 938; CHECK-NEXT: ld %s0, 240(, %s11) 939; CHECK-NEXT: or %s11, 0, %s9 940 %1 = alloca i128, align 16 941 call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %1) 942 call void @__atomic_load(i64 16, ptr nonnull @gv_u128, ptr nonnull %1, i32 signext 0) 943 %2 = load i128, ptr %1, align 16, !tbaa !2 944 call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %1) 945 ret i128 %2 946} 947 948; Function Attrs: nofree nounwind willreturn 949declare void @__atomic_load(i64, ptr, ptr, i32) 950 951!2 = !{!3, !3, i64 0} 952!3 = !{!"__int128", !4, i64 0} 953!4 = !{!"omnipotent char", !5, i64 0} 954!5 = !{!"Simple C++ TBAA"} 955