xref: /llvm-project/llvm/test/CodeGen/Thumb2/thumb2-tbh.ll (revision b5b663aac17415625340eb29c8010832bfc4c21c)
1; RUN: llc < %s -mtriple=thumbv7-apple-darwin -relocation-model=pic | FileCheck %s --check-prefix=CHECK --check-prefix=T2
2; RUN: llc < %s -mtriple=thumbv6m-apple-darwin -relocation-model=pic | FileCheck %s --check-prefix=T1DISABLED
3; FIXME: llc < %s -mtriple=thumbv6m-apple-darwin -relocation-model=pic | FileCheck %s --check-prefix=CHECK --check-prefix=T1
4; FIXME: llc < %s -mtriple=thumbv6m-apple-darwin -relocation-model=static | FileCheck %s --check-prefix=CHECK --check-prefix=T1
5
6; FIXME: Thumb1 tests temporarily disabled; MachineLICM is now hoisting the
7; subs, so the jump table can't be formed.
8; T1DISABLED: .data_region jt32
9
10; Thumb2 target should reorder the bb's in order to use tbb / tbh.
11
12	%struct.R_flstr = type { i32, i32, ptr }
13	%struct._T_tstr = type { i32, ptr, ptr }
14@_C_nextcmd = external global i32		; <ptr> [#uses=3]
15@.str31 = external constant [28 x i8], align 1		; <ptr> [#uses=1]
16@_T_gtol = external global ptr		; <ptr> [#uses=2]
17
18declare i32 @strlen(ptr nocapture) nounwind readonly
19
20declare void @Z_fatal(ptr) noreturn nounwind
21
22declare noalias ptr @calloc(i32, i32) nounwind
23
24; Jump tables are not anchored next to the TBB/TBH any more. Make sure the
25; correct address is still calculated (i.e. via a PC-relative symbol *at* the
26; TBB/TBH).
27define i32 @main(i32 %argc, ptr nocapture %argv) nounwind {
28; CHECK-LABEL: main:
29; CHECK-NOT: adr {{r[0-9]+}}, LJTI
30; T1:          lsls r[[x:[0-9]+]], {{r[0-9]+}}, #1
31; CHECK: [[PCREL_ANCHOR:LCPI[0-9]+_[0-9]+]]:
32; T2-NEXT:     tbb [pc, {{r[0-9]+}}]
33; T1-NEXT:     add  pc, r[[x]]
34
35; CHECK: LJTI0_0:
36; CHECK-NEXT: .data_region jt8
37; CHECK-NEXT: .byte (LBB{{[0-9]+_[0-9]+}}-([[PCREL_ANCHOR]]+4))/2
38
39entry:
40	br label %bb42.i
41
42bb1.i2:		; preds = %bb42.i
43	br label %bb40.i
44
45bb5.i:		; preds = %bb42.i
46	%0 = or i32 %argc, 32		; <i32> [#uses=1]
47	br label %bb40.i
48
49bb7.i:		; preds = %bb42.i
50	call  void @_T_addtol(ptr @_T_gtol, i32 0, ptr null) nounwind
51	unreachable
52
53bb15.i:		; preds = %bb42.i
54	call  void @_T_addtol(ptr @_T_gtol, i32 2, ptr null) nounwind
55	unreachable
56
57bb23.i:		; preds = %bb42.i
58	%1 = call  i32 @strlen(ptr null) nounwind readonly		; <i32> [#uses=0]
59	unreachable
60
61bb33.i:		; preds = %bb42.i
62	store i32 0, ptr @_C_nextcmd, align 4
63	%2 = call  noalias ptr @calloc(i32 21, i32 1) nounwind		; <ptr> [#uses=0]
64	unreachable
65
66bb34.i:		; preds = %bb42.i
67	%3 = load i32, ptr @_C_nextcmd, align 4		; <i32> [#uses=1]
68	%4 = add i32 %3, 1		; <i32> [#uses=1]
69	store i32 %4, ptr @_C_nextcmd, align 4
70	%5 = call  noalias ptr @calloc(i32 22, i32 1) nounwind		; <ptr> [#uses=0]
71	unreachable
72
73bb35.i:		; preds = %bb42.i
74	%6 = call  noalias ptr @calloc(i32 20, i32 1) nounwind		; <ptr> [#uses=0]
75	unreachable
76
77bb37.i:		; preds = %bb42.i
78	%7 = call  noalias ptr @calloc(i32 14, i32 1) nounwind		; <ptr> [#uses=0]
79	unreachable
80
81bb39.i:		; preds = %bb42.i
82	call  void @Z_fatal(ptr @.str31) nounwind
83	unreachable
84
85bb40.i:		; preds = %bb42.i, %bb5.i, %bb1.i2
86	br label %bb42.i
87
88bb42.i:		; preds = %bb40.i, %entry
89	switch i32 %argc, label %bb39.i [
90		i32 67, label %bb33.i
91		i32 70, label %bb35.i
92		i32 77, label %bb37.i
93		i32 83, label %bb34.i
94		i32 97, label %bb7.i
95		i32 100, label %bb5.i
96		i32 101, label %bb40.i
97		i32 102, label %bb23.i
98		i32 105, label %bb15.i
99		i32 116, label %bb1.i2
100	]
101}
102
103declare void @_T_addtol(ptr nocapture, i32, ptr) nounwind
104