1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s 3 4define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { 5; CHECK-LABEL: t1: 6; CHECK: @ %bb.0: 7; CHECK-NEXT: mov r0, r1 8; CHECK-NEXT: mvn r1, #-2147483648 9; CHECK-NEXT: cmp r2, #10 10; CHECK-NEXT: it le 11; CHECK-NEXT: addle r0, r1 12; CHECK-NEXT: bx lr 13 %tmp1 = icmp sgt i32 %c, 10 14 %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 15 %tmp3 = add i32 %tmp2, %b 16 ret i32 %tmp3 17} 18 19define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind { 20; CHECK-LABEL: t2: 21; CHECK: @ %bb.0: 22; CHECK-NEXT: mov r0, r1 23; CHECK-NEXT: cmp r2, #10 24; CHECK-NEXT: it le 25; CHECK-NEXT: addle.w r0, r0, #-2147483648 26; CHECK-NEXT: bx lr 27 28 %tmp1 = icmp sgt i32 %c, 10 29 %tmp2 = select i1 %tmp1, i32 0, i32 2147483648 30 %tmp3 = add i32 %tmp2, %b 31 ret i32 %tmp3 32} 33 34define i32 @t3(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { 35; CHECK-LABEL: t3: 36; CHECK: @ %bb.0: 37; CHECK-NEXT: mov r0, r1 38; CHECK-NEXT: cmp r2, #10 39; CHECK-NEXT: it le 40; CHECK-NEXT: suble r0, #10 41; CHECK-NEXT: bx lr 42 %tmp1 = icmp sgt i32 %c, 10 43 %tmp2 = select i1 %tmp1, i32 0, i32 10 44 %tmp3 = sub i32 %b, %tmp2 45 ret i32 %tmp3 46} 47