1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 | FileCheck %s 3; RUN: llc < %s -mtriple=thumb-eabi | FileCheck %s -check-prefix=THUMB1 4 5define i32 @f1(i32 %a) { 6; CHECK-LABEL: f1: 7; CHECK: @ %bb.0: 8; CHECK-NEXT: ror.w r0, r0, #22 9; CHECK-NEXT: bx lr 10; 11; THUMB1-LABEL: f1: 12; THUMB1: @ %bb.0: 13; THUMB1-NEXT: movs r1, #22 14; THUMB1-NEXT: rors r0, r1 15; THUMB1-NEXT: bx lr 16 %l8 = shl i32 %a, 10 17 %r8 = lshr i32 %a, 22 18 %tmp = or i32 %l8, %r8 19 ret i32 %tmp 20} 21 22define i32 @f2(i32 %v, i32 %nbits) { 23; CHECK-LABEL: f2: 24; CHECK: @ %bb.0: @ %entry 25; CHECK-NEXT: rors r0, r1 26; CHECK-NEXT: bx lr 27; 28; THUMB1-LABEL: f2: 29; THUMB1: @ %bb.0: @ %entry 30; THUMB1-NEXT: rors r0, r1 31; THUMB1-NEXT: bx lr 32entry: 33 %and = and i32 %nbits, 31 34 %shr = lshr i32 %v, %and 35 %sub = sub i32 32, %and 36 %shl = shl i32 %v, %sub 37 %or = or i32 %shl, %shr 38 ret i32 %or 39} 40