xref: /llvm-project/llvm/test/CodeGen/Thumb2/thumb2-cmp.ll (revision d2c739230ced8e1557c67bc661e91cf807be0a32)
1; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
2
3; These tests would be improved by 'movs r0, #0' being rematerialized below the
4; test as 'mov.w r0, #0'.
5
6; 0x000000bb = 187
7define i32 @f1(i32 %a) {
8; CHECK-LABEL: f1:
9; CHECK: cmp {{.*}}, #187
10    %tmp = icmp ne i32 %a, 187
11    %ret = select i1 %tmp, i32 42, i32 24
12    ret i32 %ret
13}
14
15; 0x00aa00aa = 11141290
16define i32 @f2(i32 %a) {
17; CHECK-LABEL: f2:
18; CHECK: cmp.w {{.*}}, #11141290
19    %tmp = icmp eq i32 %a, 11141290
20    %ret = select i1 %tmp, i32 42, i32 24
21    ret i32 %ret
22}
23
24; 0xcc00cc00 = 3422604288
25define i32 @f3(i32 %a) {
26; CHECK-LABEL: f3:
27; CHECK: cmp.w {{.*}}, #-872363008
28    %tmp = icmp ne i32 %a, 3422604288
29    %ret = select i1 %tmp, i32 42, i32 24
30    ret i32 %ret
31}
32
33; 0xdddddddd = 3722304989
34define i32 @f4(i32 %a) {
35; CHECK-LABEL: f4:
36; CHECK: cmp.w {{.*}}, #-572662307
37    %tmp = icmp ne i32 %a, 3722304989
38    %ret = select i1 %tmp, i32 42, i32 24
39    ret i32 %ret
40}
41
42; 0x00110000 = 1114112
43define i32 @f5(i32 %a) {
44; CHECK-LABEL: f5:
45; CHECK: cmp.w {{.*}}, #1114112
46    %tmp = icmp eq i32 %a, 1114112
47    %ret = select i1 %tmp, i32 42, i32 24
48    ret i32 %ret
49}
50
51; Check that we don't do an invalid (a > b) --> !(a < b + 1) transform.
52;
53; CHECK-LABEL: f6:
54; CHECK-NOT: cmp.w {{.*}}, #-2147483648
55; CHECK: bx lr
56define i32 @f6(i32 %a) {
57    %tmp = icmp sgt i32 %a, 2147483647
58    br i1 %tmp, label %true, label %false
59true:
60    ret i32 2
61false:
62    ret i32 0
63}
64
65define i32 @slt_poweroftwo(i32 %a) {
66; CHECK-LABEL: slt_poweroftwo:
67; CHECK: cmp.w   r0, #4096
68  %b = icmp slt i32 %a, 4096
69  br i1 %b, label %true, label %false
70
71true:
72  ret i32 1
73
74false:
75  ret i32 2
76}
77
78define i32 @sle_poweroftwo(i32 %a) {
79; CHECK-LABEL: sle_poweroftwo:
80; CHECK: cmp.w   r0, #4096
81  %b = icmp sle i32 %a, 4096
82  br i1 %b, label %true, label %false
83
84true:
85  ret i32 1
86
87false:
88  ret i32 2
89}
90
91define i32 @sge_poweroftwo(i32 %a) {
92; CHECK-LABEL: sge_poweroftwo:
93; CHECK: cmp.w   r0, #4096
94  %b = icmp sge i32 %a, 4096
95  br i1 %b, label %true, label %false
96
97true:
98  ret i32 1
99
100false:
101  ret i32 2
102}
103
104define i32 @sgt_poweroftwo(i32 %a) {
105; CHECK-LABEL: sgt_poweroftwo:
106; CHECK: cmp.w   r0, #4096
107  %b = icmp sgt i32 %a, 4096
108  br i1 %b, label %true, label %false
109
110true:
111  ret i32 1
112
113false:
114  ret i32 2
115}
116
117define i32 @slt_nearpoweroftwo(i32 %a) {
118; CHECK-LABEL: slt_nearpoweroftwo:
119; CHECK: cmp.w   r0, #4096
120  %b = icmp slt i32 %a, 4097
121  br i1 %b, label %true, label %false
122
123true:
124  ret i32 1
125
126false:
127  ret i32 2
128}
129
130define i32 @sle_nearpoweroftwo(i32 %a) {
131; CHECK-LABEL: sle_nearpoweroftwo:
132; CHECK: cmp.w   r0, #4096
133  %b = icmp sle i32 %a, 4095
134  br i1 %b, label %true, label %false
135
136true:
137  ret i32 1
138
139false:
140  ret i32 2
141}
142
143
144define i32 @sge_nearpoweroftwo(i32 %a) {
145; CHECK-LABEL: sge_nearpoweroftwo:
146; CHECK: cmp.w   r0, #4096
147  %b = icmp sge i32 %a, 4097
148  br i1 %b, label %true, label %false
149
150true:
151  ret i32 1
152
153false:
154  ret i32 2
155}
156
157define i32 @sgt_nearpoweroftwo(i32 %a) {
158; CHECK-LABEL: sgt_nearpoweroftwo:
159; CHECK: cmp.w   r0, #4096
160  %b = icmp sgt i32 %a, 4095
161  br i1 %b, label %true, label %false
162
163true:
164  ret i32 1
165
166false:
167  ret i32 2
168}
169
170define i32 @slt_neg_soimm(i32 %a) {
171; CHECK-LABEL: slt_neg_soimm:
172; CHECK: cmn.w r0, #7929856
173  %b = icmp slt i32 %a, -7929856
174  br i1 %b, label %true, label %false
175
176true:
177  ret i32 1
178
179false:
180  ret i32 2
181}
182
183define i32 @sle_neg_soimm(i32 %a) {
184; CHECK-LABEL: sle_neg_soimm:
185; CHECK: cmn.w   r0, #7929856
186  %b = icmp sle i32 %a, -7929856
187  br i1 %b, label %true, label %false
188
189true:
190  ret i32 1
191
192false:
193  ret i32 2
194}
195
196define i32 @sge_neg_soimm(i32 %a) {
197; CHECK-LABEL: sge_neg_soimm:
198; CHECK: cmn.w   r0, #7929856
199  %b = icmp sge i32 %a, -7929856
200  br i1 %b, label %true, label %false
201
202true:
203  ret i32 1
204
205false:
206  ret i32 2
207}
208
209define i32 @sgt_neg_soimm(i32 %a) {
210; CHECK-LABEL: sgt_neg_soimm:
211; CHECK: cmn.w r0, #7929856
212  %b = icmp sgt i32 %a, -7929856
213  br i1 %b, label %true, label %false
214
215true:
216  ret i32 1
217
218false:
219  ret i32 2
220}
221
222define i32 @slt_notneg_soimm(i32 %a) {
223; CHECK-LABEL: slt_notneg_soimm:
224; CHECK: cmp.w r0, #-2013231104
225  %b = icmp slt i32 %a, -2013231104
226  br i1 %b, label %true, label %false
227
228true:
229  ret i32 1
230
231false:
232  ret i32 2
233}
234
235define i32 @sle_notneg_soimm(i32 %a) {
236; CHECK-LABEL: sle_notneg_soimm:
237; CHECK: cmp.w   r0, #-2013231104
238  %b = icmp sle i32 %a, -2013231104
239  br i1 %b, label %true, label %false
240
241true:
242  ret i32 1
243
244false:
245  ret i32 2
246}
247
248define i32 @sge_notneg_soimm(i32 %a) {
249; CHECK-LABEL: sge_notneg_soimm:
250; CHECK: cmp.w   r0, #-2013231104
251  %b = icmp sge i32 %a, -2013231104
252  br i1 %b, label %true, label %false
253
254true:
255  ret i32 1
256
257false:
258  ret i32 2
259}
260
261define i32 @sgt_notneg_soimm(i32 %a) {
262; CHECK-LABEL: sgt_notneg_soimm:
263; CHECK: cmp.w r0, #-2013231104
264  %b = icmp sgt i32 %a, -2013231104
265  br i1 %b, label %true, label %false
266
267true:
268  ret i32 1
269
270false:
271  ret i32 2
272}
273
274define i32 @sgt_movw(i32 %a) {
275; CHECK-LABEL: sgt_movw:
276; CHECK: movw  r1, #2167
277  %b = icmp sgt i32 %a, 2166
278  br i1 %b, label %true, label %false
279
280true:
281  ret i32 1
282
283false:
284  ret i32 2
285}
286
287define i32 @sgt_neg_movw(i32 %a) {
288; CHECK-LABEL: sgt_neg_movw:
289; CHECK: movw    r1, #63371
290; CHECK: movt    r1, #65535
291  %b = icmp sgt i32 %a, -2166
292  br i1 %b, label %true, label %false
293
294true:
295  ret i32 1
296
297false:
298  ret i32 2
299}
300