xref: /llvm-project/llvm/test/CodeGen/Thumb2/thumb2-asr.ll (revision 905b6d192cadd43401964f4ff05534a65b007cf2)
1; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
2
3define i32 @f1(i32 %a, i32 %b) {
4; CHECK-LABEL: f1:
5; CHECK: asrs r0, r1
6    %tmp = ashr i32 %a, %b
7    ret i32 %tmp
8}
9