xref: /llvm-project/llvm/test/CodeGen/Thumb2/pacbti-m-varargs-2.ll (revision dff114b3565e4c981fcb40f24f72a0cb426294fe)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s
3; RUN: llc --filetype=obj %s -o - | llvm-readelf --unwind - | FileCheck %s --check-prefix=UNWIND
4target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
5target triple = "thumbv8.1m.main-arm-none-eabi"
6
7; C++
8; int g(int);
9;
10; int f(int n, ...) {
11;   __builtin_va_list ap;
12;   __builtin_va_start(ap, n);
13;   int s = 0;
14;   for (int i = 0; i < n; ++i)
15;     s += g(__builtin_va_arg(ap, int));
16;   __builtin_va_end(ap);
17;   return s;
18; }
19
20%"struct.std::__va_list" = type { ptr }
21
22define hidden i32 @_Z1fiz(i32 %n, ...) local_unnamed_addr #0 {
23; CHECK-LABEL: _Z1fiz:
24; CHECK:         .cfi_sections .debug_frame
25; CHECK-NEXT:    .cfi_startproc
26; CHECK-NEXT:  @ %bb.0: @ %entry
27; CHECK-NEXT:    pac r12, lr, sp
28; CHECK-NEXT:    .pad #12
29; CHECK-NEXT:    sub sp, #12
30; CHECK-NEXT:    .cfi_def_cfa_offset 12
31; CHECK-NEXT:    .save {r4, r5, r7, ra_auth_code, lr}
32; CHECK-NEXT:    push.w {r4, r5, r7, r12, lr}
33; CHECK-NEXT:    .cfi_def_cfa_offset 32
34; CHECK-NEXT:    .cfi_offset lr, -16
35; CHECK-NEXT:    .cfi_offset ra_auth_code, -20
36; CHECK-NEXT:    .cfi_offset r7, -24
37; CHECK-NEXT:    .cfi_offset r5, -28
38; CHECK-NEXT:    .cfi_offset r4, -32
39; CHECK-NEXT:    .pad #8
40; CHECK-NEXT:    sub sp, #8
41; CHECK-NEXT:    .cfi_def_cfa_offset 40
42; CHECK-NEXT:    mov r4, r0
43; CHECK-NEXT:    add r0, sp, #28
44; CHECK-NEXT:    movs r5, #0
45; CHECK-NEXT:    cmp r4, #1
46; CHECK-NEXT:    stm r0!, {r1, r2, r3}
47; CHECK-NEXT:    add r0, sp, #28
48; CHECK-NEXT:    str r0, [sp, #4]
49; CHECK-NEXT:    blt .LBB0_2
50; CHECK-NEXT:  .LBB0_1: @ %for.body
51; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
52; CHECK-NEXT:    ldr r0, [sp, #4]
53; CHECK-NEXT:    adds r1, r0, #4
54; CHECK-NEXT:    str r1, [sp, #4]
55; CHECK-NEXT:    ldr r0, [r0]
56; CHECK-NEXT:    bl _Z1gi
57; CHECK-NEXT:    add r5, r0
58; CHECK-NEXT:    subs r4, #1
59; CHECK-NEXT:    bne .LBB0_1
60; CHECK-NEXT:  .LBB0_2: @ %for.cond.cleanup
61; CHECK-NEXT:    mov r0, r5
62; CHECK-NEXT:    add sp, #8
63; CHECK-NEXT:    pop.w {r4, r5, r7, r12, lr}
64; CHECK-NEXT:    add sp, #12
65; CHECK-NEXT:    aut r12, lr, sp
66; CHECK-NEXT:    bx lr
67entry:
68  %ap = alloca %"struct.std::__va_list", align 4
69  call void @llvm.va_start(ptr nonnull %ap)
70  %cmp7 = icmp sgt i32 %n, 0
71  br i1 %cmp7, label %for.body.lr.ph, label %for.cond.cleanup
72
73for.body.lr.ph:                                   ; preds = %entry
74  br label %for.body
75
76for.cond.cleanup:                                 ; preds = %for.body, %entry
77  %s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ]
78  call void @llvm.va_end(ptr nonnull %ap)
79  ret i32 %s.0.lcssa
80
81for.body:                                         ; preds = %for.body.lr.ph, %for.body
82  %i.09 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ]
83  %s.08 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ]
84  %argp.cur = load ptr, ptr %ap, align 4
85  %argp.next = getelementptr inbounds i8, ptr %argp.cur, i32 4
86  store ptr %argp.next, ptr %ap, align 4
87  %0 = load i32, ptr %argp.cur, align 4
88  %call = call i32 @_Z1gi(i32 %0)
89  %add = add nsw i32 %call, %s.08
90  %inc = add nuw nsw i32 %i.09, 1
91  %exitcond.not = icmp eq i32 %inc, %n
92  br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
93}
94
95declare void @llvm.va_start(ptr) #1
96declare void @llvm.va_end(ptr) #1
97
98declare dso_local i32 @_Z1gi(i32) local_unnamed_addr
99
100attributes #0 = { optsize "sign-return-address"="non-leaf"}
101attributes #1 = { nounwind "sign-return-address"="non-leaf"}
102
103!llvm.module.flags = !{!0, !1, !2}
104
105!0 = !{i32 8, !"branch-target-enforcement", i32 0}
106!1 = !{i32 8, !"sign-return-address", i32 1}
107!2 = !{i32 8, !"sign-return-address-all", i32 0}
108
109; UNWIND-LABEL: FunctionAddress
110; UNWIND:      0x01      ; vsp = vsp + 8
111; UNWIND-NEXT: 0x80 0x0B ; pop {r4, r5, r7}
112; UNWIND-NEXT: 0xB4      ; pop ra_auth_code
113; UNWIND-NEXT: 0x84 0x00 ; pop {lr}
114; UNWIND-NEXT: 0x02      ; vsp = vsp + 12
115
116