1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 2; RUN: llc --force-dwarf-frame-section %s -o - | FileCheck %s 3target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 4target triple = "thumbv8.1m.main-arm-none-eabi" 5 6%"struct.std::__va_list" = type { ptr } 7 8define hidden i32 @_Z1fiz(i32 %n, ...) local_unnamed_addr #0 { 9; CHECK-LABEL: _Z1fiz: 10; CHECK: .cfi_sections .debug_frame 11; CHECK-NEXT: .cfi_startproc 12; CHECK-NEXT: @ %bb.0: @ %entry 13; CHECK-NEXT: pac r12, lr, sp 14; CHECK-NEXT: .pad #12 15; CHECK-NEXT: sub sp, #12 16; CHECK-NEXT: .cfi_def_cfa_offset 12 17; CHECK-NEXT: .save {r7, ra_auth_code, lr} 18; CHECK-NEXT: push.w {r7, r12, lr} 19; CHECK-NEXT: .cfi_def_cfa_offset 24 20; CHECK-NEXT: .cfi_offset lr, -16 21; CHECK-NEXT: .cfi_offset ra_auth_code, -20 22; CHECK-NEXT: .cfi_offset r7, -24 23; CHECK-NEXT: .pad #4 24; CHECK-NEXT: sub sp, #4 25; CHECK-NEXT: .cfi_def_cfa_offset 28 26; CHECK-NEXT: add.w r12, sp, #16 27; CHECK-NEXT: cmp r0, #1 28; CHECK-NEXT: stm.w r12, {r1, r2, r3} 29; CHECK-NEXT: add r1, sp, #16 30; CHECK-NEXT: str r1, [sp] 31; CHECK-NEXT: blt .LBB0_3 32; CHECK-NEXT: @ %bb.1: @ %for.body.lr.ph 33; CHECK-NEXT: ldr r1, [sp] 34; CHECK-NEXT: dls lr, r0 35; CHECK-NEXT: movs r0, #0 36; CHECK-NEXT: adds r1, #4 37; CHECK-NEXT: .LBB0_2: @ %for.body 38; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 39; CHECK-NEXT: str r1, [sp] 40; CHECK-NEXT: ldr r2, [r1, #-4] 41; CHECK-NEXT: adds r1, #4 42; CHECK-NEXT: add r0, r2 43; CHECK-NEXT: le lr, .LBB0_2 44; CHECK-NEXT: b .LBB0_4 45; CHECK-NEXT: .LBB0_3: 46; CHECK-NEXT: movs r0, #0 47; CHECK-NEXT: .LBB0_4: @ %for.cond.cleanup 48; CHECK-NEXT: add sp, #4 49; CHECK-NEXT: pop.w {r7, r12, lr} 50; CHECK-NEXT: add sp, #12 51; CHECK-NEXT: aut r12, lr, sp 52; CHECK-NEXT: bx lr 53entry: 54 %ap = alloca %"struct.std::__va_list", align 4 55 call void @llvm.va_start(ptr nonnull %ap) 56 %cmp7 = icmp sgt i32 %n, 0 57 br i1 %cmp7, label %for.body.lr.ph, label %for.cond.cleanup 58 59for.body.lr.ph: ; preds = %entry 60 %argp.cur.pre = load ptr, ptr %ap, align 4 61 br label %for.body 62 63for.cond.cleanup: ; preds = %for.body, %entry 64 %s.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ] 65 call void @llvm.va_end(ptr nonnull %ap) 66 ret i32 %s.0.lcssa 67 68for.body: ; preds = %for.body.lr.ph, %for.body 69 %argp.cur = phi ptr [ %argp.cur.pre, %for.body.lr.ph ], [ %argp.next, %for.body ] 70 %i.09 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] 71 %s.08 = phi i32 [ 0, %for.body.lr.ph ], [ %add, %for.body ] 72 %argp.next = getelementptr inbounds i8, ptr %argp.cur, i32 4 73 store ptr %argp.next, ptr %ap, align 4 74 %0 = load i32, ptr %argp.cur, align 4 75 %add = add nsw i32 %0, %s.08 76 %inc = add nuw nsw i32 %i.09, 1 77 %exitcond.not = icmp eq i32 %inc, %n 78 br i1 %exitcond.not, label %for.cond.cleanup, label %for.body 79} 80 81declare void @llvm.va_start(ptr) #1 82declare void @llvm.va_end(ptr) #1 83 84attributes #0 = { nounwind optsize "sign-return-address"="non-leaf" } 85attributes #1 = { nounwind "sign-return-address"="non-leaf" } 86 87!llvm.module.flags = !{!0, !1, !2} 88 89!0 = !{i32 8, !"branch-target-enforcement", i32 0} 90!1 = !{i32 8, !"sign-return-address", i32 1} 91!2 = !{i32 8, !"sign-return-address-all", i32 0} 92