1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s 3 4define arm_aapcs_vfpcc void @start12(ptr nocapture readonly %x, ptr nocapture readonly %y, ptr noalias nocapture %z, float %a, i32 %n) { 5; CHECK-LABEL: start12: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: .save {r4, lr} 8; CHECK-NEXT: push {r4, lr} 9; CHECK-NEXT: cmp r3, #1 10; CHECK-NEXT: it lt 11; CHECK-NEXT: poplt {r4, pc} 12; CHECK-NEXT: .LBB0_1: @ %vector.ph 13; CHECK-NEXT: vmov r12, s0 14; CHECK-NEXT: subs r3, #12 15; CHECK-NEXT: adds r0, #48 16; CHECK-NEXT: adds r1, #48 17; CHECK-NEXT: adds r2, #48 18; CHECK-NEXT: dlstp.32 lr, r3 19; CHECK-NEXT: .LBB0_2: @ %vector.body 20; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 21; CHECK-NEXT: vldrw.u32 q0, [r1], #16 22; CHECK-NEXT: vldrw.u32 q1, [r0], #16 23; CHECK-NEXT: vfmas.f32 q1, q0, r12 24; CHECK-NEXT: vstrw.32 q1, [r2], #16 25; CHECK-NEXT: letp lr, .LBB0_2 26; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup 27; CHECK-NEXT: pop {r4, pc} 28entry: 29 %cmp8 = icmp sgt i32 %n, 0 30 br i1 %cmp8, label %vector.ph, label %for.cond.cleanup 31 32vector.ph: ; preds = %entry 33 %n.rnd.up = add i32 %n, 3 34 %n.vec = and i32 %n.rnd.up, -4 35 %broadcast.splatinsert13 = insertelement <4 x float> undef, float %a, i32 0 36 %broadcast.splat14 = shufflevector <4 x float> %broadcast.splatinsert13, <4 x float> undef, <4 x i32> zeroinitializer 37 br label %vector.body 38 39vector.body: ; preds = %vector.body, %vector.ph 40 %index = phi i32 [ 12, %vector.ph ], [ %index.next, %vector.body ] 41 %0 = getelementptr inbounds float, ptr %x, i32 %index 42 %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %n) 43 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %0, i32 4, <4 x i1> %1, <4 x float> undef) 44 %2 = getelementptr inbounds float, ptr %y, i32 %index 45 %wide.masked.load12 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %2, i32 4, <4 x i1> %1, <4 x float> undef) 46 %3 = call fast <4 x float> @llvm.fma.v4f32(<4 x float> %wide.masked.load, <4 x float> %wide.masked.load12, <4 x float> %broadcast.splat14) 47 %4 = getelementptr inbounds float, ptr %z, i32 %index 48 call void @llvm.masked.store.v4f32.p0(<4 x float> %3, ptr %4, i32 4, <4 x i1> %1) 49 %index.next = add i32 %index, 4 50 %5 = icmp eq i32 %index.next, %n.vec 51 br i1 %5, label %for.cond.cleanup, label %vector.body 52 53for.cond.cleanup: ; preds = %vector.body, %entry 54 ret void 55} 56 57 58define arm_aapcs_vfpcc void @start11(ptr nocapture readonly %x, ptr nocapture readonly %y, ptr noalias nocapture %z, float %a, i32 %n) { 59; CHECK-LABEL: start11: 60; CHECK: @ %bb.0: @ %entry 61; CHECK-NEXT: cmp r3, #1 62; CHECK-NEXT: it lt 63; CHECK-NEXT: bxlt lr 64; CHECK-NEXT: .LBB1_1: @ %vector.ph 65; CHECK-NEXT: .save {r4, r5, r7, lr} 66; CHECK-NEXT: push {r4, r5, r7, lr} 67; CHECK-NEXT: vmov r12, s0 68; CHECK-NEXT: adds r4, r3, #3 69; CHECK-NEXT: adr r5, .LCPI1_0 70; CHECK-NEXT: bic lr, r4, #3 71; CHECK-NEXT: adds r0, #44 72; CHECK-NEXT: adds r1, #44 73; CHECK-NEXT: adds r2, #44 74; CHECK-NEXT: vldrw.u32 q0, [r5] 75; CHECK-NEXT: movs r4, #11 76; CHECK-NEXT: vdup.32 q1, r3 77; CHECK-NEXT: .LBB1_2: @ %vector.body 78; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 79; CHECK-NEXT: vqadd.u32 q2, q0, r4 80; CHECK-NEXT: adds r4, #4 81; CHECK-NEXT: cmp lr, r4 82; CHECK-NEXT: vptt.u32 hi, q1, q2 83; CHECK-NEXT: vldrwt.u32 q2, [r1], #16 84; CHECK-NEXT: vldrwt.u32 q3, [r0], #16 85; CHECK-NEXT: vfmas.f32 q3, q2, r12 86; CHECK-NEXT: vpst 87; CHECK-NEXT: vstrwt.32 q3, [r2], #16 88; CHECK-NEXT: bne .LBB1_2 89; CHECK-NEXT: @ %bb.3: 90; CHECK-NEXT: pop.w {r4, r5, r7, lr} 91; CHECK-NEXT: bx lr 92; CHECK-NEXT: .p2align 4 93; CHECK-NEXT: @ %bb.4: 94; CHECK-NEXT: .LCPI1_0: 95; CHECK-NEXT: .long 0 @ 0x0 96; CHECK-NEXT: .long 1 @ 0x1 97; CHECK-NEXT: .long 2 @ 0x2 98; CHECK-NEXT: .long 3 @ 0x3 99entry: 100 %cmp8 = icmp sgt i32 %n, 0 101 br i1 %cmp8, label %vector.ph, label %for.cond.cleanup 102 103vector.ph: ; preds = %entry 104 %n.rnd.up = add i32 %n, 3 105 %n.vec = and i32 %n.rnd.up, -4 106 %broadcast.splatinsert13 = insertelement <4 x float> undef, float %a, i32 0 107 %broadcast.splat14 = shufflevector <4 x float> %broadcast.splatinsert13, <4 x float> undef, <4 x i32> zeroinitializer 108 br label %vector.body 109 110vector.body: ; preds = %vector.body, %vector.ph 111 %index = phi i32 [ 11, %vector.ph ], [ %index.next, %vector.body ] 112 %0 = getelementptr inbounds float, ptr %x, i32 %index 113 %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %n) 114 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %0, i32 4, <4 x i1> %1, <4 x float> undef) 115 %2 = getelementptr inbounds float, ptr %y, i32 %index 116 %wide.masked.load12 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %2, i32 4, <4 x i1> %1, <4 x float> undef) 117 %3 = call fast <4 x float> @llvm.fma.v4f32(<4 x float> %wide.masked.load, <4 x float> %wide.masked.load12, <4 x float> %broadcast.splat14) 118 %4 = getelementptr inbounds float, ptr %z, i32 %index 119 call void @llvm.masked.store.v4f32.p0(<4 x float> %3, ptr %4, i32 4, <4 x i1> %1) 120 %index.next = add i32 %index, 4 121 %5 = icmp eq i32 %index.next, %n.vec 122 br i1 %5, label %for.cond.cleanup, label %vector.body 123 124for.cond.cleanup: ; preds = %vector.body, %entry 125 ret void 126} 127 128define arm_aapcs_vfpcc void @startS(i32 %S, ptr nocapture readonly %x, ptr nocapture readonly %y, ptr noalias nocapture %z, float %a, i32 %n) { 129; CHECK-LABEL: startS: 130; CHECK: @ %bb.0: @ %entry 131; CHECK-NEXT: .save {r4, r5, r7, lr} 132; CHECK-NEXT: push {r4, r5, r7, lr} 133; CHECK-NEXT: ldr r5, [sp, #16] 134; CHECK-NEXT: cmp r5, #1 135; CHECK-NEXT: blt .LBB2_3 136; CHECK-NEXT: @ %bb.1: @ %vector.ph 137; CHECK-NEXT: vmov r12, s0 138; CHECK-NEXT: adds r4, r5, #3 139; CHECK-NEXT: bic lr, r4, #3 140; CHECK-NEXT: adr r4, .LCPI2_0 141; CHECK-NEXT: add.w r1, r1, r0, lsl #2 142; CHECK-NEXT: add.w r2, r2, r0, lsl #2 143; CHECK-NEXT: add.w r3, r3, r0, lsl #2 144; CHECK-NEXT: vldrw.u32 q0, [r4] 145; CHECK-NEXT: vdup.32 q1, r5 146; CHECK-NEXT: .LBB2_2: @ %vector.body 147; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 148; CHECK-NEXT: vqadd.u32 q2, q0, r0 149; CHECK-NEXT: adds r0, #4 150; CHECK-NEXT: cmp lr, r0 151; CHECK-NEXT: vptt.u32 hi, q1, q2 152; CHECK-NEXT: vldrwt.u32 q2, [r2], #16 153; CHECK-NEXT: vldrwt.u32 q3, [r1], #16 154; CHECK-NEXT: vfmas.f32 q3, q2, r12 155; CHECK-NEXT: vpst 156; CHECK-NEXT: vstrwt.32 q3, [r3], #16 157; CHECK-NEXT: bne .LBB2_2 158; CHECK-NEXT: .LBB2_3: @ %for.cond.cleanup 159; CHECK-NEXT: pop {r4, r5, r7, pc} 160; CHECK-NEXT: .p2align 4 161; CHECK-NEXT: @ %bb.4: 162; CHECK-NEXT: .LCPI2_0: 163; CHECK-NEXT: .long 0 @ 0x0 164; CHECK-NEXT: .long 1 @ 0x1 165; CHECK-NEXT: .long 2 @ 0x2 166; CHECK-NEXT: .long 3 @ 0x3 167entry: 168 %cmp8 = icmp sgt i32 %n, 0 169 br i1 %cmp8, label %vector.ph, label %for.cond.cleanup 170 171vector.ph: ; preds = %entry 172 %n.rnd.up = add i32 %n, 3 173 %n.vec = and i32 %n.rnd.up, -4 174 %broadcast.splatinsert13 = insertelement <4 x float> undef, float %a, i32 0 175 %broadcast.splat14 = shufflevector <4 x float> %broadcast.splatinsert13, <4 x float> undef, <4 x i32> zeroinitializer 176 br label %vector.body 177 178vector.body: ; preds = %vector.body, %vector.ph 179 %index = phi i32 [ %S, %vector.ph ], [ %index.next, %vector.body ] 180 %0 = getelementptr inbounds float, ptr %x, i32 %index 181 %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %n) 182 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %0, i32 4, <4 x i1> %1, <4 x float> undef) 183 %2 = getelementptr inbounds float, ptr %y, i32 %index 184 %wide.masked.load12 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %2, i32 4, <4 x i1> %1, <4 x float> undef) 185 %3 = call fast <4 x float> @llvm.fma.v4f32(<4 x float> %wide.masked.load, <4 x float> %wide.masked.load12, <4 x float> %broadcast.splat14) 186 %4 = getelementptr inbounds float, ptr %z, i32 %index 187 call void @llvm.masked.store.v4f32.p0(<4 x float> %3, ptr %4, i32 4, <4 x i1> %1) 188 %index.next = add i32 %index, 4 189 %5 = icmp eq i32 %index.next, %n.vec 190 br i1 %5, label %for.cond.cleanup, label %vector.body 191 192for.cond.cleanup: ; preds = %vector.body, %entry 193 ret void 194} 195 196define arm_aapcs_vfpcc void @startSmod4(i32 %S, ptr nocapture readonly %x, ptr nocapture readonly %y, ptr noalias nocapture %z, float %a, i32 %n) { 197; CHECK-LABEL: startSmod4: 198; CHECK: @ %bb.0: @ %entry 199; CHECK-NEXT: .save {r4, lr} 200; CHECK-NEXT: push {r4, lr} 201; CHECK-NEXT: ldr.w lr, [sp, #8] 202; CHECK-NEXT: cmp.w lr, #1 203; CHECK-NEXT: it lt 204; CHECK-NEXT: poplt {r4, pc} 205; CHECK-NEXT: .LBB3_1: @ %vector.ph 206; CHECK-NEXT: vmov r12, s0 207; CHECK-NEXT: mvn r4, #12 208; CHECK-NEXT: and.w r4, r4, r0, lsl #2 209; CHECK-NEXT: add r1, r4 210; CHECK-NEXT: add r2, r4 211; CHECK-NEXT: add r3, r4 212; CHECK-NEXT: sub.w r0, lr, #4 213; CHECK-NEXT: dlstp.32 lr, r0 214; CHECK-NEXT: .LBB3_2: @ %vector.body 215; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1 216; CHECK-NEXT: vldrw.u32 q0, [r2], #16 217; CHECK-NEXT: vldrw.u32 q1, [r1], #16 218; CHECK-NEXT: vfmas.f32 q1, q0, r12 219; CHECK-NEXT: vstrw.32 q1, [r3], #16 220; CHECK-NEXT: letp lr, .LBB3_2 221; CHECK-NEXT: @ %bb.3: @ %for.cond.cleanup 222; CHECK-NEXT: pop {r4, pc} 223entry: 224 %cmp8 = icmp sgt i32 %n, 0 225 br i1 %cmp8, label %vector.ph, label %for.cond.cleanup 226 227vector.ph: ; preds = %entry 228 %Sm = and i32 %S, -4 229 %n.rnd.up = add i32 %n, 3 230 %n.vec = and i32 %n.rnd.up, -4 231 %broadcast.splatinsert13 = insertelement <4 x float> undef, float %a, i32 0 232 %broadcast.splat14 = shufflevector <4 x float> %broadcast.splatinsert13, <4 x float> undef, <4 x i32> zeroinitializer 233 br label %vector.body 234 235vector.body: ; preds = %vector.body, %vector.ph 236 %index = phi i32 [ %Sm, %vector.ph ], [ %index.next, %vector.body ] 237 %0 = getelementptr inbounds float, ptr %x, i32 %index 238 %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %n) 239 %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %0, i32 4, <4 x i1> %1, <4 x float> undef) 240 %2 = getelementptr inbounds float, ptr %y, i32 %index 241 %wide.masked.load12 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %2, i32 4, <4 x i1> %1, <4 x float> undef) 242 %3 = call fast <4 x float> @llvm.fma.v4f32(<4 x float> %wide.masked.load, <4 x float> %wide.masked.load12, <4 x float> %broadcast.splat14) 243 %4 = getelementptr inbounds float, ptr %z, i32 %index 244 call void @llvm.masked.store.v4f32.p0(<4 x float> %3, ptr %4, i32 4, <4 x i1> %1) 245 %index.next = add i32 %index, 4 246 %5 = icmp eq i32 %index.next, %n.vec 247 br i1 %5, label %for.cond.cleanup, label %vector.body 248 249for.cond.cleanup: ; preds = %vector.body, %entry 250 ret void 251} 252 253 254declare <4 x float> @llvm.masked.load.v4f32.p0(ptr, i32 immarg, <4 x i1>, <4 x float>) 255declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) 256declare void @llvm.masked.store.v4f32.p0(<4 x float>, ptr, i32 immarg, <4 x i1>) 257declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32) 258 259