xref: /llvm-project/llvm/test/CodeGen/Thumb2/mve-postinc-distribute.ll (revision b31fffbc7f1e0491bf599e82b7195e320d26e140) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s
3
4; Check some loop postinc's for properly distributed post-incs
5
6define i32 @vaddv(ptr nocapture readonly %data, i32 %N) {
7; CHECK-LABEL: vaddv:
8; CHECK:       @ %bb.0: @ %entry
9; CHECK-NEXT:    .save {r7, lr}
10; CHECK-NEXT:    push {r7, lr}
11; CHECK-NEXT:    mov lr, r1
12; CHECK-NEXT:    cmp r1, #1
13; CHECK-NEXT:    blt .LBB0_4
14; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader
15; CHECK-NEXT:    mov r1, r0
16; CHECK-NEXT:    movs r0, #0
17; CHECK-NEXT:  .LBB0_2: @ %for.body
18; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
19; CHECK-NEXT:    vldrw.u32 q0, [r1], #32
20; CHECK-NEXT:    vaddva.s32 r0, q0
21; CHECK-NEXT:    vldrw.u32 q0, [r1, #-16]
22; CHECK-NEXT:    vaddva.s32 r0, q0
23; CHECK-NEXT:    le lr, .LBB0_2
24; CHECK-NEXT:  @ %bb.3: @ %for.cond.cleanup
25; CHECK-NEXT:    pop {r7, pc}
26; CHECK-NEXT:  .LBB0_4:
27; CHECK-NEXT:    movs r0, #0
28; CHECK-NEXT:    pop {r7, pc}
29entry:
30  %cmp11 = icmp sgt i32 %N, 0
31  br i1 %cmp11, label %for.body, label %for.cond.cleanup
32
33for.cond.cleanup:                                 ; preds = %for.body, %entry
34  %x.0.lcssa = phi i32 [ 0, %entry ], [ %7, %for.body ]
35  ret i32 %x.0.lcssa
36
37for.body:                                         ; preds = %entry, %for.body
38  %data.addr.014 = phi ptr [ %add.ptr1, %for.body ], [ %data, %entry ]
39  %i.013 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
40  %x.012 = phi i32 [ %7, %for.body ], [ 0, %entry ]
41  %0 = bitcast ptr %data.addr.014 to ptr
42  %1 = load <4 x i32>, ptr %0, align 4
43  %2 = tail call i32 @llvm.arm.mve.addv.v4i32(<4 x i32> %1, i32 0)
44  %3 = add i32 %2, %x.012
45  %add.ptr = getelementptr inbounds i32, ptr %data.addr.014, i32 4
46  %4 = bitcast ptr %add.ptr to ptr
47  %5 = load <4 x i32>, ptr %4, align 4
48  %6 = tail call i32 @llvm.arm.mve.addv.v4i32(<4 x i32> %5, i32 0)
49  %7 = add i32 %3, %6
50  %add.ptr1 = getelementptr inbounds i32, ptr %data.addr.014, i32 8
51  %inc = add nuw nsw i32 %i.013, 1
52  %exitcond = icmp eq i32 %inc, %N
53  br i1 %exitcond, label %for.cond.cleanup, label %for.body
54}
55
56define void @arm_cmplx_dot_prod_q15(ptr nocapture readonly %pSrcA, ptr nocapture readonly %pSrcB, i32 %numSamples, ptr nocapture %realResult, ptr nocapture %imagResult) {
57; CHECK-LABEL: arm_cmplx_dot_prod_q15:
58; CHECK:       @ %bb.0: @ %entry
59; CHECK-NEXT:    .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
60; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, r10, r11, lr}
61; CHECK-NEXT:    mvn r7, #7
62; CHECK-NEXT:    mov.w r12, #0
63; CHECK-NEXT:    add.w r7, r7, r2, lsl #1
64; CHECK-NEXT:    vldrh.u16 q0, [r0]
65; CHECK-NEXT:    vldrh.u16 q1, [r1]
66; CHECK-NEXT:    movs r4, #0
67; CHECK-NEXT:    lsr.w r9, r7, #3
68; CHECK-NEXT:    mov r7, r12
69; CHECK-NEXT:    mov r11, r12
70; CHECK-NEXT:    wls lr, r9, .LBB1_4
71; CHECK-NEXT:  @ %bb.1: @ %while.body.preheader
72; CHECK-NEXT:    add.w r8, r0, r9, lsl #5
73; CHECK-NEXT:    mov.w r11, #0
74; CHECK-NEXT:    adds r0, #32
75; CHECK-NEXT:    add.w r6, r1, #32
76; CHECK-NEXT:    lsl.w r9, r9, #4
77; CHECK-NEXT:    mov r4, r11
78; CHECK-NEXT:    movs r7, #0
79; CHECK-NEXT:    mov r12, r11
80; CHECK-NEXT:  .LBB1_2: @ %while.body
81; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
82; CHECK-NEXT:    vldrh.u16 q2, [r6, #-16]
83; CHECK-NEXT:    vldrh.u16 q3, [r0, #-16]
84; CHECK-NEXT:    vmlaldavax.s16 r4, r11, q0, q1
85; CHECK-NEXT:    vmlsldava.s16 r12, r7, q0, q1
86; CHECK-NEXT:    vldrh.u16 q0, [r0], #32
87; CHECK-NEXT:    vldrh.u16 q1, [r6], #32
88; CHECK-NEXT:    vmlaldavax.s16 r4, r11, q3, q2
89; CHECK-NEXT:    vmlsldava.s16 r12, r7, q3, q2
90; CHECK-NEXT:    le lr, .LBB1_2
91; CHECK-NEXT:  @ %bb.3: @ %while.cond.while.end_crit_edge
92; CHECK-NEXT:    add.w r1, r1, r9, lsl #1
93; CHECK-NEXT:    mov r0, r8
94; CHECK-NEXT:  .LBB1_4: @ %while.end
95; CHECK-NEXT:    vmlaldavax.s16 r4, r11, q0, q1
96; CHECK-NEXT:    vmlsldava.s16 r12, r7, q0, q1
97; CHECK-NEXT:    mov r10, r4
98; CHECK-NEXT:    mov r5, r11
99; CHECK-NEXT:    lsrl r10, r5, #6
100; CHECK-NEXT:    ldr.w r8, [sp, #36]
101; CHECK-NEXT:    mov r6, r12
102; CHECK-NEXT:    mov r5, r7
103; CHECK-NEXT:    and r2, r2, #3
104; CHECK-NEXT:    lsrl r6, r5, #6
105; CHECK-NEXT:    wls lr, r2, .LBB1_7
106; CHECK-NEXT:  .LBB1_5: @ %while.body11
107; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
108; CHECK-NEXT:    ldrsh r9, [r0], #4
109; CHECK-NEXT:    ldrsh r6, [r1], #4
110; CHECK-NEXT:    ldrsh r5, [r0, #-2]
111; CHECK-NEXT:    ldrsh r2, [r1, #-2]
112; CHECK-NEXT:    smlalbb r12, r7, r6, r9
113; CHECK-NEXT:    smlalbb r4, r11, r6, r5
114; CHECK-NEXT:    muls r5, r2, r5
115; CHECK-NEXT:    smlalbb r4, r11, r2, r9
116; CHECK-NEXT:    subs.w r12, r12, r5
117; CHECK-NEXT:    sbc.w r7, r7, r5, asr #31
118; CHECK-NEXT:    le lr, .LBB1_5
119; CHECK-NEXT:  @ %bb.6: @ %while.end34.loopexit
120; CHECK-NEXT:    lsrl r12, r7, #6
121; CHECK-NEXT:    lsrl r4, r11, #6
122; CHECK-NEXT:    mov r6, r12
123; CHECK-NEXT:    mov r10, r4
124; CHECK-NEXT:  .LBB1_7: @ %while.end34
125; CHECK-NEXT:    str r6, [r3]
126; CHECK-NEXT:    str.w r10, [r8]
127; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, r10, r11, pc}
128entry:
129  %mul = shl i32 %numSamples, 1
130  %sub = add i32 %mul, -8
131  %shr = lshr i32 %sub, 3
132  %vecSrcB.0.in102 = bitcast ptr %pSrcB to ptr
133  %vecSrcB.0103 = load <8 x i16>, ptr %vecSrcB.0.in102, align 2
134  %vecSrcA.0.in104 = bitcast ptr %pSrcA to ptr
135  %vecSrcA.0105 = load <8 x i16>, ptr %vecSrcA.0.in104, align 2
136  %cmp106 = icmp eq i32 %shr, 0
137  br i1 %cmp106, label %while.end, label %while.body.preheader
138
139while.body.preheader:                             ; preds = %entry
140  %0 = shl i32 %shr, 4
141  %scevgep = getelementptr i16, ptr %pSrcA, i32 %0
142  br label %while.body
143
144while.body:                                       ; preds = %while.body.preheader, %while.body
145  %vecSrcA.0115 = phi <8 x i16> [ %vecSrcA.0, %while.body ], [ %vecSrcA.0105, %while.body.preheader ]
146  %vecSrcB.0114 = phi <8 x i16> [ %vecSrcB.0, %while.body ], [ %vecSrcB.0103, %while.body.preheader ]
147  %vecSrcB.0.in.in113 = phi ptr [ %add.ptr3, %while.body ], [ %pSrcB, %while.body.preheader ]
148  %vecSrcA.0.in.in112 = phi ptr [ %add.ptr2, %while.body ], [ %pSrcA, %while.body.preheader ]
149  %accImag.0.off32111 = phi i32 [ %15, %while.body ], [ 0, %while.body.preheader ]
150  %accImag.0.off0110 = phi i32 [ %16, %while.body ], [ 0, %while.body.preheader ]
151  %accReal.0.off32109 = phi i32 [ %12, %while.body ], [ 0, %while.body.preheader ]
152  %accReal.0.off0108 = phi i32 [ %13, %while.body ], [ 0, %while.body.preheader ]
153  %blkCnt.0107 = phi i32 [ %dec, %while.body ], [ %shr, %while.body.preheader ]
154  %pSrcB.addr.0 = getelementptr inbounds i16, ptr %vecSrcB.0.in.in113, i32 8
155  %pSrcA.addr.0 = getelementptr inbounds i16, ptr %vecSrcA.0.in.in112, i32 8
156  %1 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 1, i32 0, i32 %accReal.0.off0108, i32 %accReal.0.off32109, <8 x i16> %vecSrcA.0115, <8 x i16> %vecSrcB.0114)
157  %2 = extractvalue { i32, i32 } %1, 1
158  %3 = extractvalue { i32, i32 } %1, 0
159  %4 = bitcast ptr %pSrcA.addr.0 to ptr
160  %5 = load <8 x i16>, ptr %4, align 2
161  %add.ptr2 = getelementptr inbounds i16, ptr %vecSrcA.0.in.in112, i32 16
162  %6 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 0, i32 1, i32 %accImag.0.off0110, i32 %accImag.0.off32111, <8 x i16> %vecSrcA.0115, <8 x i16> %vecSrcB.0114)
163  %7 = extractvalue { i32, i32 } %6, 1
164  %8 = extractvalue { i32, i32 } %6, 0
165  %9 = bitcast ptr %pSrcB.addr.0 to ptr
166  %10 = load <8 x i16>, ptr %9, align 2
167  %add.ptr3 = getelementptr inbounds i16, ptr %vecSrcB.0.in.in113, i32 16
168  %11 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 1, i32 0, i32 %3, i32 %2, <8 x i16> %5, <8 x i16> %10)
169  %12 = extractvalue { i32, i32 } %11, 1
170  %13 = extractvalue { i32, i32 } %11, 0
171  %14 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 0, i32 1, i32 %8, i32 %7, <8 x i16> %5, <8 x i16> %10)
172  %15 = extractvalue { i32, i32 } %14, 1
173  %16 = extractvalue { i32, i32 } %14, 0
174  %dec = add nsw i32 %blkCnt.0107, -1
175  %vecSrcB.0.in = bitcast ptr %add.ptr3 to ptr
176  %vecSrcB.0 = load <8 x i16>, ptr %vecSrcB.0.in, align 2
177  %vecSrcA.0.in = bitcast ptr %add.ptr2 to ptr
178  %vecSrcA.0 = load <8 x i16>, ptr %vecSrcA.0.in, align 2
179  %cmp = icmp eq i32 %dec, 0
180  br i1 %cmp, label %while.cond.while.end_crit_edge, label %while.body
181
182while.cond.while.end_crit_edge:                   ; preds = %while.body
183  %scevgep136 = getelementptr i16, ptr %pSrcB, i32 %0
184  br label %while.end
185
186while.end:                                        ; preds = %while.cond.while.end_crit_edge, %entry
187  %accReal.0.off0.lcssa = phi i32 [ %13, %while.cond.while.end_crit_edge ], [ 0, %entry ]
188  %accReal.0.off32.lcssa = phi i32 [ %12, %while.cond.while.end_crit_edge ], [ 0, %entry ]
189  %accImag.0.off0.lcssa = phi i32 [ %16, %while.cond.while.end_crit_edge ], [ 0, %entry ]
190  %accImag.0.off32.lcssa = phi i32 [ %15, %while.cond.while.end_crit_edge ], [ 0, %entry ]
191  %vecSrcA.0.in.in.lcssa = phi ptr [ %scevgep, %while.cond.while.end_crit_edge ], [ %pSrcA, %entry ]
192  %vecSrcB.0.in.in.lcssa = phi ptr [ %scevgep136, %while.cond.while.end_crit_edge ], [ %pSrcB, %entry ]
193  %vecSrcB.0.lcssa = phi <8 x i16> [ %vecSrcB.0, %while.cond.while.end_crit_edge ], [ %vecSrcB.0103, %entry ]
194  %vecSrcA.0.lcssa = phi <8 x i16> [ %vecSrcA.0, %while.cond.while.end_crit_edge ], [ %vecSrcA.0105, %entry ]
195  %17 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 1, i32 0, i32 %accReal.0.off0.lcssa, i32 %accReal.0.off32.lcssa, <8 x i16> %vecSrcA.0.lcssa, <8 x i16> %vecSrcB.0.lcssa)
196  %18 = extractvalue { i32, i32 } %17, 1
197  %19 = zext i32 %18 to i64
198  %20 = shl nuw i64 %19, 32
199  %21 = extractvalue { i32, i32 } %17, 0
200  %22 = zext i32 %21 to i64
201  %23 = or i64 %20, %22
202  %24 = tail call { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32 0, i32 0, i32 1, i32 %accImag.0.off0.lcssa, i32 %accImag.0.off32.lcssa, <8 x i16> %vecSrcA.0.lcssa, <8 x i16> %vecSrcB.0.lcssa)
203  %25 = extractvalue { i32, i32 } %24, 1
204  %26 = zext i32 %25 to i64
205  %27 = shl nuw i64 %26, 32
206  %28 = extractvalue { i32, i32 } %24, 0
207  %29 = zext i32 %28 to i64
208  %30 = or i64 %27, %29
209  %shr8 = and i32 %numSamples, 3
210  %cmp1095 = icmp eq i32 %shr8, 0
211  %extract = lshr i64 %23, 6
212  %extract.t = trunc i64 %extract to i32
213  %extract129 = lshr i64 %30, 6
214  %extract.t130 = trunc i64 %extract129 to i32
215  br i1 %cmp1095, label %while.end34, label %while.body11
216
217while.body11:                                     ; preds = %while.end, %while.body11
218  %pSrcA.addr.1100 = phi ptr [ %incdec.ptr12, %while.body11 ], [ %vecSrcA.0.in.in.lcssa, %while.end ]
219  %pSrcB.addr.199 = phi ptr [ %incdec.ptr14, %while.body11 ], [ %vecSrcB.0.in.in.lcssa, %while.end ]
220  %accImag.198 = phi i64 [ %add32, %while.body11 ], [ %30, %while.end ]
221  %accReal.197 = phi i64 [ %sub27, %while.body11 ], [ %23, %while.end ]
222  %blkCnt.196 = phi i32 [ %dec33, %while.body11 ], [ %shr8, %while.end ]
223  %incdec.ptr = getelementptr inbounds i16, ptr %pSrcA.addr.1100, i32 1
224  %31 = load i16, ptr %pSrcA.addr.1100, align 2
225  %incdec.ptr12 = getelementptr inbounds i16, ptr %pSrcA.addr.1100, i32 2
226  %32 = load i16, ptr %incdec.ptr, align 2
227  %incdec.ptr13 = getelementptr inbounds i16, ptr %pSrcB.addr.199, i32 1
228  %33 = load i16, ptr %pSrcB.addr.199, align 2
229  %incdec.ptr14 = getelementptr inbounds i16, ptr %pSrcB.addr.199, i32 2
230  %34 = load i16, ptr %incdec.ptr13, align 2
231  %conv = sext i16 %31 to i32
232  %conv15 = sext i16 %33 to i32
233  %mul16 = mul nsw i32 %conv15, %conv
234  %conv17 = sext i32 %mul16 to i64
235  %add = add nsw i64 %accReal.197, %conv17
236  %conv19 = sext i16 %34 to i32
237  %mul20 = mul nsw i32 %conv19, %conv
238  %conv21 = sext i32 %mul20 to i64
239  %conv23 = sext i16 %32 to i32
240  %mul25 = mul nsw i32 %conv19, %conv23
241  %conv26 = sext i32 %mul25 to i64
242  %sub27 = sub i64 %add, %conv26
243  %mul30 = mul nsw i32 %conv15, %conv23
244  %conv31 = sext i32 %mul30 to i64
245  %add22 = add i64 %accImag.198, %conv31
246  %add32 = add i64 %add22, %conv21
247  %dec33 = add nsw i32 %blkCnt.196, -1
248  %cmp10 = icmp eq i32 %dec33, 0
249  br i1 %cmp10, label %while.end34.loopexit, label %while.body11
250
251while.end34.loopexit:                             ; preds = %while.body11
252  %extract131 = lshr i64 %add32, 6
253  %extract.t132 = trunc i64 %extract131 to i32
254  %extract127 = lshr i64 %sub27, 6
255  %extract.t128 = trunc i64 %extract127 to i32
256  br label %while.end34
257
258while.end34:                                      ; preds = %while.end34.loopexit, %while.end
259  %accReal.1.lcssa.off6 = phi i32 [ %extract.t, %while.end ], [ %extract.t128, %while.end34.loopexit ]
260  %accImag.1.lcssa.off6 = phi i32 [ %extract.t130, %while.end ], [ %extract.t132, %while.end34.loopexit ]
261  store i32 %accReal.1.lcssa.off6, ptr %realResult, align 4
262  store i32 %accImag.1.lcssa.off6, ptr %imagResult, align 4
263  ret void
264}
265
266
267define void @fma8(ptr noalias nocapture readonly %A, ptr noalias nocapture readonly %B, ptr noalias nocapture %C, i32 %n) {
268; CHECK-LABEL: fma8:
269; CHECK:       @ %bb.0: @ %entry
270; CHECK-NEXT:    .save {r4, r5, r6, lr}
271; CHECK-NEXT:    push {r4, r5, r6, lr}
272; CHECK-NEXT:    cmp r3, #1
273; CHECK-NEXT:    blt .LBB2_8
274; CHECK-NEXT:  @ %bb.1: @ %for.body.preheader
275; CHECK-NEXT:    cmp r3, #7
276; CHECK-NEXT:    bhi .LBB2_3
277; CHECK-NEXT:  @ %bb.2:
278; CHECK-NEXT:    mov.w r12, #0
279; CHECK-NEXT:    b .LBB2_6
280; CHECK-NEXT:  .LBB2_3: @ %vector.ph
281; CHECK-NEXT:    bic r12, r3, #7
282; CHECK-NEXT:    movs r5, #1
283; CHECK-NEXT:    sub.w r6, r12, #8
284; CHECK-NEXT:    mov r4, r0
285; CHECK-NEXT:    add.w lr, r5, r6, lsr #3
286; CHECK-NEXT:    mov r5, r1
287; CHECK-NEXT:    mov r6, r2
288; CHECK-NEXT:  .LBB2_4: @ %vector.body
289; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
290; CHECK-NEXT:    vldrw.u32 q0, [r4, #16]
291; CHECK-NEXT:    vldrw.u32 q1, [r5, #16]
292; CHECK-NEXT:    vldrw.u32 q2, [r6, #16]
293; CHECK-NEXT:    vldrw.u32 q3, [r6]
294; CHECK-NEXT:    vfma.f32 q2, q1, q0
295; CHECK-NEXT:    vldrw.u32 q0, [r4], #32
296; CHECK-NEXT:    vldrw.u32 q1, [r5], #32
297; CHECK-NEXT:    vfma.f32 q3, q1, q0
298; CHECK-NEXT:    vstrw.32 q3, [r6], #32
299; CHECK-NEXT:    vstrw.32 q2, [r6, #-16]
300; CHECK-NEXT:    le lr, .LBB2_4
301; CHECK-NEXT:  @ %bb.5: @ %middle.block
302; CHECK-NEXT:    cmp r12, r3
303; CHECK-NEXT:    it eq
304; CHECK-NEXT:    popeq {r4, r5, r6, pc}
305; CHECK-NEXT:  .LBB2_6: @ %for.body.preheader12
306; CHECK-NEXT:    sub.w lr, r3, r12
307; CHECK-NEXT:    add.w r0, r0, r12, lsl #2
308; CHECK-NEXT:    add.w r1, r1, r12, lsl #2
309; CHECK-NEXT:    add.w r2, r2, r12, lsl #2
310; CHECK-NEXT:  .LBB2_7: @ %for.body
311; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
312; CHECK-NEXT:    vldmia r0!, {s0}
313; CHECK-NEXT:    vldmia r1!, {s2}
314; CHECK-NEXT:    vldr s4, [r2]
315; CHECK-NEXT:    vfma.f32 s4, s2, s0
316; CHECK-NEXT:    vstmia r2!, {s4}
317; CHECK-NEXT:    le lr, .LBB2_7
318; CHECK-NEXT:  .LBB2_8: @ %for.cond.cleanup
319; CHECK-NEXT:    pop {r4, r5, r6, pc}
320entry:
321  %cmp8 = icmp sgt i32 %n, 0
322  br i1 %cmp8, label %for.body.preheader, label %for.cond.cleanup
323
324for.body.preheader:                               ; preds = %entry
325  %min.iters.check = icmp ult i32 %n, 8
326  br i1 %min.iters.check, label %for.body.preheader12, label %vector.ph
327
328for.body.preheader12:                             ; preds = %middle.block, %for.body.preheader
329  %i.09.ph = phi i32 [ 0, %for.body.preheader ], [ %n.vec, %middle.block ]
330  br label %for.body
331
332vector.ph:                                        ; preds = %for.body.preheader
333  %n.vec = and i32 %n, -8
334  br label %vector.body
335
336vector.body:                                      ; preds = %vector.body, %vector.ph
337  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
338  %0 = getelementptr inbounds float, ptr %A, i32 %index
339  %1 = bitcast ptr %0 to ptr
340  %wide.load = load <8 x float>, ptr %1, align 4
341  %2 = getelementptr inbounds float, ptr %B, i32 %index
342  %3 = bitcast ptr %2 to ptr
343  %wide.load10 = load <8 x float>, ptr %3, align 4
344  %4 = fmul fast <8 x float> %wide.load10, %wide.load
345  %5 = getelementptr inbounds float, ptr %C, i32 %index
346  %6 = bitcast ptr %5 to ptr
347  %wide.load11 = load <8 x float>, ptr %6, align 4
348  %7 = fadd fast <8 x float> %wide.load11, %4
349  store <8 x float> %7, ptr %6, align 4
350  %index.next = add i32 %index, 8
351  %8 = icmp eq i32 %index.next, %n.vec
352  br i1 %8, label %middle.block, label %vector.body
353
354middle.block:                                     ; preds = %vector.body
355  %cmp.n = icmp eq i32 %n.vec, %n
356  br i1 %cmp.n, label %for.cond.cleanup, label %for.body.preheader12
357
358for.cond.cleanup:                                 ; preds = %for.body, %middle.block, %entry
359  ret void
360
361for.body:                                         ; preds = %for.body.preheader12, %for.body
362  %i.09 = phi i32 [ %inc, %for.body ], [ %i.09.ph, %for.body.preheader12 ]
363  %arrayidx = getelementptr inbounds float, ptr %A, i32 %i.09
364  %9 = load float, ptr %arrayidx, align 4
365  %arrayidx1 = getelementptr inbounds float, ptr %B, i32 %i.09
366  %10 = load float, ptr %arrayidx1, align 4
367  %mul = fmul fast float %10, %9
368  %arrayidx2 = getelementptr inbounds float, ptr %C, i32 %i.09
369  %11 = load float, ptr %arrayidx2, align 4
370  %add = fadd fast float %11, %mul
371  store float %add, ptr %arrayidx2, align 4
372  %inc = add nuw nsw i32 %i.09, 1
373  %exitcond = icmp eq i32 %inc, %n
374  br i1 %exitcond, label %for.cond.cleanup, label %for.body
375}
376
377declare i32 @llvm.arm.mve.addv.v4i32(<4 x i32>, i32)
378declare { i32, i32 } @llvm.arm.mve.vmlldava.v8i16(i32, i32, i32, i32, i32, <8 x i16>, <8 x i16>)
379