1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s 3 4define arm_aapcs_vfpcc <16 x i8> @neg_v16i8(<16 x i8> %s1) { 5; CHECK-LABEL: neg_v16i8: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: vneg.s8 q0, q0 8; CHECK-NEXT: bx lr 9entry: 10 %0 = sub nsw <16 x i8> zeroinitializer, %s1 11 ret <16 x i8> %0 12} 13 14define arm_aapcs_vfpcc <8 x i16> @neg_v8i16(<8 x i16> %s1) { 15; CHECK-LABEL: neg_v8i16: 16; CHECK: @ %bb.0: @ %entry 17; CHECK-NEXT: vneg.s16 q0, q0 18; CHECK-NEXT: bx lr 19entry: 20 %0 = sub nsw <8 x i16> zeroinitializer, %s1 21 ret <8 x i16> %0 22} 23 24define arm_aapcs_vfpcc <4 x i32> @neg_v4i32(<4 x i32> %s1) { 25; CHECK-LABEL: neg_v4i32: 26; CHECK: @ %bb.0: @ %entry 27; CHECK-NEXT: vneg.s32 q0, q0 28; CHECK-NEXT: bx lr 29entry: 30 %0 = sub nsw <4 x i32> zeroinitializer, %s1 31 ret <4 x i32> %0 32} 33 34define arm_aapcs_vfpcc <2 x i64> @neg_v2i64(<2 x i64> %s1) { 35; CHECK-LABEL: neg_v2i64: 36; CHECK: @ %bb.0: @ %entry 37; CHECK-NEXT: vmov r0, r1, d1 38; CHECK-NEXT: mov.w r12, #0 39; CHECK-NEXT: vmov r3, r2, d0 40; CHECK-NEXT: rsbs r0, r0, #0 41; CHECK-NEXT: sbc.w r1, r12, r1 42; CHECK-NEXT: rsbs r3, r3, #0 43; CHECK-NEXT: sbc.w r2, r12, r2 44; CHECK-NEXT: vmov q0[2], q0[0], r3, r0 45; CHECK-NEXT: vmov q0[3], q0[1], r2, r1 46; CHECK-NEXT: bx lr 47entry: 48 %0 = sub nsw <2 x i64> zeroinitializer, %s1 49 ret <2 x i64> %0 50} 51 52