1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s 3 4define i32 @incorrectmmo() { 5; CHECK-LABEL: incorrectmmo: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: .pad #12 8; CHECK-NEXT: sub sp, #12 9; CHECK-NEXT: movw r0, #1023 10; CHECK-NEXT: vmsr p0, r0 11; CHECK-NEXT: adr r0, .LCPI0_0 12; CHECK-NEXT: vldrw.u32 q0, [r0] 13; CHECK-NEXT: add.w r0, sp, #2 14; CHECK-NEXT: vpst 15; CHECK-NEXT: vstrbt.8 q0, [r0] 16; CHECK-NEXT: ldrb.w r0, [sp, #2] 17; CHECK-NEXT: ldrb.w r1, [sp, #3] 18; CHECK-NEXT: ldrb.w r2, [sp, #4] 19; CHECK-NEXT: add r0, r1 20; CHECK-NEXT: ldrb.w r3, [sp, #10] 21; CHECK-NEXT: add r0, r2 22; CHECK-NEXT: ldrb.w r1, [sp, #11] 23; CHECK-NEXT: add r0, r3 24; CHECK-NEXT: add r0, r1 25; CHECK-NEXT: add sp, #12 26; CHECK-NEXT: bx lr 27; CHECK-NEXT: .p2align 4 28; CHECK-NEXT: @ %bb.1: 29; CHECK-NEXT: .LCPI0_0: 30; CHECK-NEXT: .byte 0 @ 0x0 31; CHECK-NEXT: .byte 1 @ 0x1 32; CHECK-NEXT: .byte 2 @ 0x2 33; CHECK-NEXT: .byte 3 @ 0x3 34; CHECK-NEXT: .byte 4 @ 0x4 35; CHECK-NEXT: .byte 5 @ 0x5 36; CHECK-NEXT: .byte 6 @ 0x6 37; CHECK-NEXT: .byte 7 @ 0x7 38; CHECK-NEXT: .byte 8 @ 0x8 39; CHECK-NEXT: .byte 9 @ 0x9 40; CHECK-NEXT: .zero 1 41; CHECK-NEXT: .zero 1 42; CHECK-NEXT: .zero 1 43; CHECK-NEXT: .zero 1 44; CHECK-NEXT: .zero 1 45; CHECK-NEXT: .zero 1 46entry: 47 %x = alloca [10 x i8], align 1 48 call void @llvm.lifetime.start.p0(i64 10, ptr nonnull %x) 49 call void @llvm.masked.store.v16i8.p0(<16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>, ptr %x, i32 1, <16 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>) 50 %0 = load i8, ptr %x, align 1 51 %conv1 = zext i8 %0 to i32 52 %arrayidx2 = getelementptr inbounds [10 x i8], ptr %x, i32 0, i32 1 53 %1 = load i8, ptr %arrayidx2, align 1 54 %conv3 = zext i8 %1 to i32 55 %add = add nuw nsw i32 %conv3, %conv1 56 %arrayidx4 = getelementptr inbounds [10 x i8], ptr %x, i32 0, i32 2 57 %2 = load i8, ptr %arrayidx4, align 1 58 %conv5 = zext i8 %2 to i32 59 %add6 = add nuw nsw i32 %add, %conv5 60 %arrayidx7 = getelementptr inbounds [10 x i8], ptr %x, i32 0, i32 8 61 %3 = load i8, ptr %arrayidx7, align 1 62 %conv8 = zext i8 %3 to i32 63 %add9 = add nuw nsw i32 %add6, %conv8 64 %arrayidx10 = getelementptr inbounds [10 x i8], ptr %x, i32 0, i32 9 65 %4 = load i8, ptr %arrayidx10, align 1 66 %conv11 = zext i8 %4 to i32 67 %add12 = add nuw nsw i32 %add9, %conv11 68 call void @llvm.lifetime.end.p0(i64 10, ptr nonnull %x) 69 ret i32 %add12 70} 71 72declare void @llvm.masked.store.v16i8.p0(<16 x i8>, ptr, i32, <16 x i1>) 73declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) 74declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) 75