1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs %s -o - | FileCheck %s 3 4define arm_aapcs_vfpcc i32 @u8_explicit_extend(<16 x i8> %a) { 5; CHECK-LABEL: u8_explicit_extend: 6; CHECK: @ %bb.0: @ %entry 7; CHECK-NEXT: vmov.u8 r0, q0[10] 8; CHECK-NEXT: bx lr 9entry: 10 %0 = extractelement <16 x i8> %a, i32 10 11 %1 = zext i8 %0 to i32 12 ret i32 %1 13} 14 15define arm_aapcs_vfpcc i32 @s8_explicit_extend(<16 x i8> %a) { 16; CHECK-LABEL: s8_explicit_extend: 17; CHECK: @ %bb.0: @ %entry 18; CHECK-NEXT: vmov.s8 r0, q0[10] 19; CHECK-NEXT: bx lr 20entry: 21 %0 = extractelement <16 x i8> %a, i32 10 22 %1 = sext i8 %0 to i32 23 ret i32 %1 24} 25 26define arm_aapcs_vfpcc i8 @u8_extend_via_pcs(<16 x i8> %a) { 27; CHECK-LABEL: u8_extend_via_pcs: 28; CHECK: @ %bb.0: @ %entry 29; CHECK-NEXT: vmov.u8 r0, q0[10] 30; CHECK-NEXT: bx lr 31entry: 32 %0 = extractelement <16 x i8> %a, i32 10 33 ret i8 %0 34} 35 36define arm_aapcs_vfpcc signext i8 @s8_extend_via_pcs(<16 x i8> %a) { 37; CHECK-LABEL: s8_extend_via_pcs: 38; CHECK: @ %bb.0: @ %entry 39; CHECK-NEXT: vmov.s8 r0, q0[10] 40; CHECK-NEXT: bx lr 41entry: 42 %0 = extractelement <16 x i8> %a, i32 10 43 ret i8 %0 44} 45 46define arm_aapcs_vfpcc i32 @u16_explicit_extend(<8 x i16> %a) { 47; CHECK-LABEL: u16_explicit_extend: 48; CHECK: @ %bb.0: @ %entry 49; CHECK-NEXT: vmov.u16 r0, q0[5] 50; CHECK-NEXT: bx lr 51entry: 52 %0 = extractelement <8 x i16> %a, i32 5 53 %1 = zext i16 %0 to i32 54 ret i32 %1 55} 56 57define arm_aapcs_vfpcc i32 @s16_explicit_extend(<8 x i16> %a) { 58; CHECK-LABEL: s16_explicit_extend: 59; CHECK: @ %bb.0: @ %entry 60; CHECK-NEXT: vmov.s16 r0, q0[5] 61; CHECK-NEXT: bx lr 62entry: 63 %0 = extractelement <8 x i16> %a, i32 5 64 %1 = sext i16 %0 to i32 65 ret i32 %1 66} 67 68define arm_aapcs_vfpcc i16 @u16_extend_via_pcs(<8 x i16> %a) { 69; CHECK-LABEL: u16_extend_via_pcs: 70; CHECK: @ %bb.0: @ %entry 71; CHECK-NEXT: vmov.u16 r0, q0[5] 72; CHECK-NEXT: bx lr 73entry: 74 %0 = extractelement <8 x i16> %a, i32 5 75 ret i16 %0 76} 77 78define arm_aapcs_vfpcc signext i16 @s16_extend_via_pcs(<8 x i16> %a) { 79; CHECK-LABEL: s16_extend_via_pcs: 80; CHECK: @ %bb.0: @ %entry 81; CHECK-NEXT: vmov.s16 r0, q0[5] 82; CHECK-NEXT: bx lr 83entry: 84 %0 = extractelement <8 x i16> %a, i32 5 85 ret i16 %0 86} 87