xref: /llvm-project/llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-f16-add.ll (revision d52e2839f3b1a21d4a6090ccff6f4b7f1f89a1b3) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s --mattr=+mve.fp -o - | FileCheck %s
3
4target triple = "thumbv8.1m.main-none-none-eabi"
5
6
7; Expected to not transform
8define arm_aapcs_vfpcc <2 x half> @complex_add_v2f16(<2 x half> %a, <2 x half> %b) {
9; CHECK-LABEL: complex_add_v2f16:
10; CHECK:       @ %bb.0: @ %entry
11; CHECK-NEXT:    vmovx.f16 s2, s4
12; CHECK-NEXT:    vadd.f16 s2, s2, s0
13; CHECK-NEXT:    vmovx.f16 s0, s0
14; CHECK-NEXT:    vsub.f16 s0, s4, s0
15; CHECK-NEXT:    vins.f16 s0, s2
16; CHECK-NEXT:    bx lr
17entry:
18  %a.real = shufflevector <2 x half> %a, <2 x half> zeroinitializer, <1 x i32> <i32 0>
19  %a.imag = shufflevector <2 x half> %a, <2 x half> zeroinitializer, <1 x i32> <i32 1>
20  %b.real = shufflevector <2 x half> %b, <2 x half> zeroinitializer, <1 x i32> <i32 0>
21  %b.imag = shufflevector <2 x half> %b, <2 x half> zeroinitializer, <1 x i32> <i32 1>
22  %0 = fsub fast <1 x half> %b.real, %a.imag
23  %1 = fadd fast <1 x half> %b.imag, %a.real
24  %interleaved.vec = shufflevector <1 x half> %0, <1 x half> %1, <2 x i32> <i32 0, i32 1>
25  ret <2 x half> %interleaved.vec
26}
27
28; Expected to not transform
29define arm_aapcs_vfpcc <4 x half> @complex_add_v4f16(<4 x half> %a, <4 x half> %b) {
30; CHECK-LABEL: complex_add_v4f16:
31; CHECK:       @ %bb.0: @ %entry
32; CHECK-NEXT:    vmovx.f16 s12, s4
33; CHECK-NEXT:    vmovx.f16 s2, s5
34; CHECK-NEXT:    vmovx.f16 s8, s0
35; CHECK-NEXT:    vins.f16 s12, s2
36; CHECK-NEXT:    vmovx.f16 s2, s1
37; CHECK-NEXT:    vins.f16 s0, s1
38; CHECK-NEXT:    vins.f16 s8, s2
39; CHECK-NEXT:    vins.f16 s4, s5
40; CHECK-NEXT:    vadd.f16 q3, q3, q0
41; CHECK-NEXT:    vsub.f16 q0, q1, q2
42; CHECK-NEXT:    vmovx.f16 s1, s0
43; CHECK-NEXT:    vmovx.f16 s2, s12
44; CHECK-NEXT:    vins.f16 s0, s12
45; CHECK-NEXT:    vins.f16 s1, s2
46; CHECK-NEXT:    bx lr
47entry:
48  %a.real = shufflevector <4 x half> %a, <4 x half> zeroinitializer, <2 x i32> <i32 0, i32 2>
49  %a.imag = shufflevector <4 x half> %a, <4 x half> zeroinitializer, <2 x i32> <i32 1, i32 3>
50  %b.real = shufflevector <4 x half> %b, <4 x half> zeroinitializer, <2 x i32> <i32 0, i32 2>
51  %b.imag = shufflevector <4 x half> %b, <4 x half> zeroinitializer, <2 x i32> <i32 1, i32 3>
52  %0 = fsub fast <2 x half> %b.real, %a.imag
53  %1 = fadd fast <2 x half> %b.imag, %a.real
54  %interleaved.vec = shufflevector <2 x half> %0, <2 x half> %1, <4 x i32> <i32 0, i32 2, i32 1, i32 3>
55  ret <4 x half> %interleaved.vec
56}
57
58; Expected to transform
59define arm_aapcs_vfpcc <8 x half> @complex_add_v8f16(<8 x half> %a, <8 x half> %b) {
60; CHECK-LABEL: complex_add_v8f16:
61; CHECK:       @ %bb.0: @ %entry
62; CHECK-NEXT:    vcadd.f16 q0, q1, q0, #90
63; CHECK-NEXT:    bx lr
64entry:
65  %a.real = shufflevector <8 x half> %a, <8 x half> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
66  %a.imag = shufflevector <8 x half> %a, <8 x half> zeroinitializer, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
67  %b.real = shufflevector <8 x half> %b, <8 x half> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
68  %b.imag = shufflevector <8 x half> %b, <8 x half> zeroinitializer, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
69  %0 = fsub fast <4 x half> %b.real, %a.imag
70  %1 = fadd fast <4 x half> %b.imag, %a.real
71  %interleaved.vec = shufflevector <4 x half> %0, <4 x half> %1, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
72  ret <8 x half> %interleaved.vec
73}
74
75; Expected to transform
76define arm_aapcs_vfpcc <16 x half> @complex_add_v16f16(<16 x half> %a, <16 x half> %b) {
77; CHECK-LABEL: complex_add_v16f16:
78; CHECK:       @ %bb.0: @ %entry
79; CHECK-NEXT:    vcadd.f16 q0, q2, q0, #90
80; CHECK-NEXT:    vcadd.f16 q1, q3, q1, #90
81; CHECK-NEXT:    bx lr
82entry:
83  %a.real = shufflevector <16 x half> %a, <16 x half> zeroinitializer, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
84  %a.imag = shufflevector <16 x half> %a, <16 x half> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
85  %b.real = shufflevector <16 x half> %b, <16 x half> zeroinitializer, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
86  %b.imag = shufflevector <16 x half> %b, <16 x half> zeroinitializer, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
87  %0 = fsub fast <8 x half> %b.real, %a.imag
88  %1 = fadd fast <8 x half> %b.imag, %a.real
89  %interleaved.vec = shufflevector <8 x half> %0, <8 x half> %1, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11, i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
90  ret <16 x half> %interleaved.vec
91}
92
93; Expected to transform
94define arm_aapcs_vfpcc <32 x half> @complex_add_v32f16(<32 x half> %a, <32 x half> %b) {
95; CHECK-LABEL: complex_add_v32f16:
96; CHECK:       @ %bb.0: @ %entry
97; CHECK-NEXT:    .vsave {d8, d9}
98; CHECK-NEXT:    vpush {d8, d9}
99; CHECK-NEXT:    add r0, sp, #16
100; CHECK-NEXT:    vldrw.u32 q4, [r0]
101; CHECK-NEXT:    add r0, sp, #32
102; CHECK-NEXT:    vcadd.f16 q0, q4, q0, #90
103; CHECK-NEXT:    vldrw.u32 q4, [r0]
104; CHECK-NEXT:    add r0, sp, #48
105; CHECK-NEXT:    vcadd.f16 q1, q4, q1, #90
106; CHECK-NEXT:    vldrw.u32 q4, [r0]
107; CHECK-NEXT:    add r0, sp, #64
108; CHECK-NEXT:    vcadd.f16 q2, q4, q2, #90
109; CHECK-NEXT:    vldrw.u32 q4, [r0]
110; CHECK-NEXT:    vcadd.f16 q3, q4, q3, #90
111; CHECK-NEXT:    vpop {d8, d9}
112; CHECK-NEXT:    bx lr
113entry:
114  %a.real = shufflevector <32 x half> %a, <32 x half> zeroinitializer, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
115  %a.imag = shufflevector <32 x half> %a, <32 x half> zeroinitializer, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
116  %b.real = shufflevector <32 x half> %b, <32 x half> zeroinitializer, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
117  %b.imag = shufflevector <32 x half> %b, <32 x half> zeroinitializer, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
118  %0 = fsub fast <16 x half> %b.real, %a.imag
119  %1 = fadd fast <16 x half> %b.imag, %a.real
120  %interleaved.vec = shufflevector <16 x half> %0, <16 x half> %1, <32 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23, i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
121  ret <32 x half> %interleaved.vec
122}
123