xref: /llvm-project/llvm/test/CodeGen/Thumb2/expand-pseudos.mir (revision 343e204a52845dcd7bb7e7b8213513bcc33939c8) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -run-pass=arm-pseudo -verify-machineinstrs %s -o - | FileCheck %s
3--- |
4  target triple = "thumbv7---gnueabi"
5
6  @var = global i32 0
7  define i32 @test1(i32 %x) {
8  entry:
9    unreachable
10  }
11...
12---
13name:            test1
14alignment:       4
15tracksRegLiveness: true
16liveins:
17  - { reg: '$r0', virtual-reg: '' }
18  - { reg: '$r0_r1', virtual-reg: '' }
19body:             |
20  bb.0.entry:
21    liveins: $r0, $r0_r1
22
23    ; CHECK-LABEL: name: test1
24    ; CHECK: liveins: $r0, $r0_r1
25    ; CHECK-NEXT: {{  $}}
26    ; CHECK-NEXT: $r0 = t2LDRpci @var, 14 /* CC::al */, $noreg, implicit-def $r0_r1
27    ; CHECK-NEXT: $r0 = tPICADD $r0, 0, implicit-def $r0_r1
28    ; CHECK-NEXT: BX_RET 14 /* CC::al */, $noreg, implicit $r0
29    $r0 = t2LDRpci_pic @var, 0, implicit-def $r0_r1
30    BX_RET 14, $noreg, implicit $r0
31
32...
33