1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s 3--- | 4 define hidden void @vector_spill_in_loop() { 5 entry: 6 ret void 7 } 8 9 define hidden void @vector_spill_load_outside() { 10 entry: 11 ret void 12 } 13... 14--- 15name: vector_spill_in_loop 16tracksRegLiveness: true 17stack: 18 - { id: 0, name: '', type: spill-slot, offset: -120, size: 16, alignment: 8, 19 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 20 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 21body: | 22 ; CHECK-LABEL: name: vector_spill_in_loop 23 ; CHECK: bb.0: 24 ; CHECK-NEXT: successors: %bb.1(0x80000000) 25 ; CHECK-NEXT: liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12 26 ; CHECK-NEXT: {{ $}} 27 ; CHECK-NEXT: $r6 = tMOVr $r2, 14 /* CC::al */, $noreg 28 ; CHECK-NEXT: $r0 = tMOVr $r12, 14 /* CC::al */, $noreg 29 ; CHECK-NEXT: $lr = MVE_DLSTP_16 renamable $r3 30 ; CHECK-NEXT: {{ $}} 31 ; CHECK-NEXT: bb.1: 32 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 33 ; CHECK-NEXT: liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r10, $r11, $r12 34 ; CHECK-NEXT: {{ $}} 35 ; CHECK-NEXT: renamable $r0, renamable $q6 = MVE_VLDRHU16_post killed renamable $r0, 16, 0, $noreg, $noreg 36 ; CHECK-NEXT: renamable $q3 = MVE_VLDRHU16 renamable $r6, 0, 0, $noreg, $noreg 37 ; CHECK-NEXT: renamable $q5 = MVE_VSHR_immu16 killed renamable $q3, 11, 0, $noreg, $noreg, undef renamable $q5 38 ; CHECK-NEXT: MVE_VSTRWU32 killed renamable $q5, $sp, 80, 0, $noreg, $noreg :: (store (s128) into %stack.0, align 8) 39 ; CHECK-NEXT: dead renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8) 40 ; CHECK-NEXT: dead renamable $vpr = MVE_VCMPi16r killed renamable $q6, renamable $r8, 1, 0, killed $noreg, $noreg 41 ; CHECK-NEXT: $lr = MVE_LETP killed renamable $lr, %bb.1 42 ; CHECK-NEXT: {{ $}} 43 ; CHECK-NEXT: bb.2: 44 ; CHECK-NEXT: successors: %bb.3(0x04000000), %bb.0(0x7c000000) 45 ; CHECK-NEXT: liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12 46 ; CHECK-NEXT: {{ $}} 47 ; CHECK-NEXT: renamable $r0 = tLDRspi $sp, 1, 14 /* CC::al */, $noreg 48 ; CHECK-NEXT: renamable $r10 = nuw t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg 49 ; CHECK-NEXT: renamable $r12 = t2ADDrs killed renamable $r12, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg 50 ; CHECK-NEXT: renamable $r0 = tLDRspi $sp, 3, 14 /* CC::al */, $noreg 51 ; CHECK-NEXT: renamable $r2 = t2ADDrs killed renamable $r2, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg 52 ; CHECK-NEXT: renamable $r0 = tLDRspi $sp, 2, 14 /* CC::al */, $noreg 53 ; CHECK-NEXT: tCMPhir renamable $r10, killed renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr 54 ; CHECK-NEXT: tBcc %bb.0, 1 /* CC::ne */, killed $cpsr 55 ; CHECK-NEXT: {{ $}} 56 ; CHECK-NEXT: bb.3: 57 ; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 24, 14 /* CC::al */, $noreg 58 ; CHECK-NEXT: $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d8, def $d9, def $d10, def $d11, def $d12, def $d13, def $d14, def $d15 59 ; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg 60 ; CHECK-NEXT: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc 61 bb.0: 62 successors: %bb.1(0x80000000) 63 liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12 64 65 $r6 = tMOVr $r2, 14 /* CC::al */, $noreg 66 $r0 = tMOVr $r12, 14 /* CC::al */, $noreg 67 $r9 = tMOVr $r3, 14 /* CC::al */, $noreg 68 renamable $lr = t2DoLoopStartTP renamable $r1, renamable $r3 69 70 bb.1: 71 successors: %bb.1(0x7c000000), %bb.2(0x04000000) 72 liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $r12 73 74 renamable $vpr = MVE_VCTP16 renamable $r9, 0, $noreg, $noreg 75 MVE_VPST 8, implicit $vpr 76 renamable $r0, renamable $q6 = MVE_VLDRHU16_post killed renamable $r0, 16, 1, renamable $vpr, $noreg 77 renamable $q3 = MVE_VLDRHU16 renamable $r6, 0, 1, renamable $vpr, $noreg 78 MVE_VPST 2, implicit $vpr 79 renamable $q5 = MVE_VSHR_immu16 renamable $q3, 11, 1, renamable $vpr, $noreg, undef renamable $q5 80 renamable $r9 = nsw t2SUBri killed renamable $r9, 8, 14 /* CC::al */, $noreg, $noreg 81 MVE_VSTRWU32 killed renamable $q5, $sp, 80, 0, $noreg, $noreg :: (store (s128) into %stack.0, align 8) 82 MVE_VPST 8, implicit $vpr 83 renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8) 84 MVE_VPST 1, implicit $vpr 85 renamable $vpr = MVE_VCMPi16r killed renamable $q6, renamable $r8, 1, 1, killed renamable $vpr, $noreg 86 renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1, implicit-def dead $cpsr 87 tB %bb.2, 14 /* CC::al */, $noreg 88 89 bb.2: 90 successors: %bb.3(0x04000000), %bb.0(0x7c000000) 91 liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12 92 93 renamable $r0 = tLDRspi $sp, 1, 14 /* CC::al */, $noreg 94 renamable $r10 = nuw t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg 95 renamable $r12 = t2ADDrs killed renamable $r12, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg 96 renamable $r0 = tLDRspi $sp, 3, 14 /* CC::al */, $noreg 97 renamable $r2 = t2ADDrs killed renamable $r2, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg 98 renamable $r0 = tLDRspi $sp, 2, 14 /* CC::al */, $noreg 99 tCMPhir renamable $r10, killed renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr 100 tBcc %bb.0, 1 /* CC::ne */, killed $cpsr 101 102 bb.3: 103 $sp = frame-destroy tADDspi $sp, 24, 14 /* CC::al */, $noreg 104 $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d8, def $d9, def $d10, def $d11, def $d12, def $d13, def $d14, def $d15 105 $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg 106 $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc 107... 108--- 109name: vector_spill_load_outside 110stack: 111 - { id: 0, name: '', type: spill-slot, offset: -120, size: 16, alignment: 8, 112 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 113 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 114tracksRegLiveness: true 115body: | 116 ; CHECK-LABEL: name: vector_spill_load_outside 117 ; CHECK: bb.0: 118 ; CHECK-NEXT: successors: %bb.1(0x80000000) 119 ; CHECK-NEXT: liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12 120 ; CHECK-NEXT: {{ $}} 121 ; CHECK-NEXT: $r6 = tMOVr $r2, 14 /* CC::al */, $noreg 122 ; CHECK-NEXT: $r0 = tMOVr $r12, 14 /* CC::al */, $noreg 123 ; CHECK-NEXT: $r9 = tMOVr $r3, 14 /* CC::al */, $noreg 124 ; CHECK-NEXT: $lr = t2DLS renamable $r1 125 ; CHECK-NEXT: {{ $}} 126 ; CHECK-NEXT: bb.1: 127 ; CHECK-NEXT: successors: %bb.1(0x7c000000), %bb.2(0x04000000) 128 ; CHECK-NEXT: liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $r12 129 ; CHECK-NEXT: {{ $}} 130 ; CHECK-NEXT: renamable $vpr = MVE_VCTP16 renamable $r9, 0, $noreg, $noreg 131 ; CHECK-NEXT: MVE_VPST 8, implicit $vpr 132 ; CHECK-NEXT: renamable $r0, renamable $q6 = MVE_VLDRHU16_post killed renamable $r0, 16, 1, renamable $vpr, $noreg 133 ; CHECK-NEXT: renamable $q3 = MVE_VLDRHU16 renamable $r6, 0, 1, renamable $vpr, $noreg 134 ; CHECK-NEXT: MVE_VPST 2, implicit $vpr 135 ; CHECK-NEXT: renamable $q5 = MVE_VSHR_immu16 killed renamable $q3, 11, 1, renamable $vpr, $noreg, undef renamable $q5 136 ; CHECK-NEXT: renamable $r9 = nsw t2SUBri killed renamable $r9, 8, 14 /* CC::al */, $noreg, $noreg 137 ; CHECK-NEXT: MVE_VSTRWU32 killed renamable $q5, $sp, 80, 0, $noreg, $noreg :: (store (s128) into %stack.0, align 8) 138 ; CHECK-NEXT: MVE_VPST 8, implicit $vpr 139 ; CHECK-NEXT: dead renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8) 140 ; CHECK-NEXT: MVE_VPST 1, implicit $vpr 141 ; CHECK-NEXT: dead renamable $vpr = MVE_VCMPi16r killed renamable $q6, renamable $r8, 1, 1, killed renamable $vpr, $noreg 142 ; CHECK-NEXT: $lr = t2LEUpdate killed renamable $lr, %bb.1 143 ; CHECK-NEXT: {{ $}} 144 ; CHECK-NEXT: bb.2: 145 ; CHECK-NEXT: successors: %bb.3(0x04000000), %bb.0(0x7c000000) 146 ; CHECK-NEXT: liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12 147 ; CHECK-NEXT: {{ $}} 148 ; CHECK-NEXT: dead renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8) 149 ; CHECK-NEXT: renamable $r0 = tLDRspi $sp, 1, 14 /* CC::al */, $noreg 150 ; CHECK-NEXT: renamable $r10 = nuw t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg 151 ; CHECK-NEXT: renamable $r12 = t2ADDrs killed renamable $r12, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg 152 ; CHECK-NEXT: renamable $r0 = tLDRspi $sp, 3, 14 /* CC::al */, $noreg 153 ; CHECK-NEXT: renamable $r2 = t2ADDrs killed renamable $r2, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg 154 ; CHECK-NEXT: renamable $r0 = tLDRspi $sp, 2, 14 /* CC::al */, $noreg 155 ; CHECK-NEXT: tCMPhir renamable $r10, killed renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr 156 ; CHECK-NEXT: tBcc %bb.0, 1 /* CC::ne */, killed $cpsr 157 ; CHECK-NEXT: {{ $}} 158 ; CHECK-NEXT: bb.3: 159 ; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 24, 14 /* CC::al */, $noreg 160 ; CHECK-NEXT: $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d8, def $d9, def $d10, def $d11, def $d12, def $d13, def $d14, def $d15 161 ; CHECK-NEXT: $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg 162 ; CHECK-NEXT: $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc 163 bb.0: 164 successors: %bb.1(0x80000000) 165 liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12 166 167 $r6 = tMOVr $r2, 14 /* CC::al */, $noreg 168 $r0 = tMOVr $r12, 14 /* CC::al */, $noreg 169 $r9 = tMOVr $r3, 14 /* CC::al */, $noreg 170 renamable $lr = t2DoLoopStartTP renamable $r1, renamable $r3 171 172 bb.1: 173 successors: %bb.1(0x7c000000), %bb.2(0x04000000) 174 liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $r12 175 176 renamable $vpr = MVE_VCTP16 renamable $r9, 0, $noreg, $noreg 177 MVE_VPST 8, implicit $vpr 178 renamable $r0, renamable $q6 = MVE_VLDRHU16_post killed renamable $r0, 16, 1, renamable $vpr, $noreg 179 renamable $q3 = MVE_VLDRHU16 renamable $r6, 0, 1, renamable $vpr, $noreg 180 MVE_VPST 2, implicit $vpr 181 renamable $q5 = MVE_VSHR_immu16 renamable $q3, 11, 1, renamable $vpr, $noreg, undef renamable $q5 182 renamable $r9 = nsw t2SUBri killed renamable $r9, 8, 14 /* CC::al */, $noreg, $noreg 183 MVE_VSTRWU32 killed renamable $q5, $sp, 80, 0, $noreg, $noreg :: (store (s128) into %stack.0, align 8) 184 MVE_VPST 8, implicit $vpr 185 renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8) 186 MVE_VPST 1, implicit $vpr 187 renamable $vpr = MVE_VCMPi16r killed renamable $q6, renamable $r8, 1, 1, killed renamable $vpr, $noreg 188 renamable $lr = t2LoopEndDec killed renamable $lr, %bb.1, implicit-def dead $cpsr 189 tB %bb.2, 14 /* CC::al */, $noreg 190 191 bb.2: 192 successors: %bb.3(0x04000000), %bb.0(0x7c000000) 193 liveins: $q0, $r1, $r2, $r3, $r4, $r5, $r7, $r8, $r10, $r11, $r12 194 195 renamable $q7 = MVE_VLDRWU32 $sp, 80, 0, $noreg, $noreg :: (load (s128) from %stack.0, align 8) 196 renamable $r0 = tLDRspi $sp, 1, 14 /* CC::al */, $noreg 197 renamable $r10 = nuw t2ADDri killed renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg 198 renamable $r12 = t2ADDrs killed renamable $r12, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg 199 renamable $r0 = tLDRspi $sp, 3, 14 /* CC::al */, $noreg 200 renamable $r2 = t2ADDrs killed renamable $r2, killed renamable $r0, 10, 14 /* CC::al */, $noreg, $noreg 201 renamable $r0 = tLDRspi $sp, 2, 14 /* CC::al */, $noreg 202 tCMPhir renamable $r10, killed renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr 203 tBcc %bb.0, 1 /* CC::ne */, killed $cpsr 204 205 bb.3: 206 $sp = frame-destroy tADDspi $sp, 24, 14 /* CC::al */, $noreg 207 $sp = frame-destroy VLDMDIA_UPD $sp, 14 /* CC::al */, $noreg, def $d8, def $d9, def $d10, def $d11, def $d12, def $d13, def $d14, def $d15 208 $sp = frame-destroy tADDspi $sp, 1, 14 /* CC::al */, $noreg 209 $sp = frame-destroy t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc 210 211... 212