1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s 3 4--- | 5 define dso_local arm_aapcs_vfpcc void @unrolled_and_vector(ptr nocapture %res, ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %N) { 6 entry: 7 %cmp10 = icmp eq i32 %N, 0 8 br i1 %cmp10, label %for.cond.cleanup, label %vector.memcheck 9 10 vector.memcheck: ; preds = %entry 11 %scevgep = getelementptr i8, ptr %res, i32 %N 12 %scevgep12 = getelementptr i8, ptr %a, i32 %N 13 %scevgep13 = getelementptr i8, ptr %b, i32 %N 14 %bound0 = icmp ugt ptr %scevgep12, %res 15 %bound1 = icmp ugt ptr %scevgep, %a 16 %found.conflict = and i1 %bound0, %bound1 17 %bound014 = icmp ugt ptr %scevgep13, %res 18 %bound115 = icmp ugt ptr %scevgep, %b 19 %found.conflict16 = and i1 %bound014, %bound115 20 %conflict.rdx = or i1 %found.conflict, %found.conflict16 21 %0 = add i32 %N, 15 22 %1 = lshr i32 %0, 4 23 %2 = shl nuw i32 %1, 4 24 %3 = add i32 %2, -16 25 %4 = lshr i32 %3, 4 26 %5 = add nuw nsw i32 %4, 1 27 br i1 %conflict.rdx, label %for.body.preheader, label %vector.ph 28 29 for.body.preheader: ; preds = %vector.memcheck 30 %6 = add i32 %N, -1 31 %xtraiter = and i32 %N, 3 32 %7 = icmp ult i32 %6, 3 33 %8 = add i32 %N, -4 34 %9 = sub i32 %8, %xtraiter 35 %10 = lshr i32 %9, 2 36 %11 = add nuw nsw i32 %10, 1 37 br i1 %7, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new 38 39 for.body.preheader.new: ; preds = %for.body.preheader 40 %start1 = call i32 @llvm.start.loop.iterations.i32(i32 %11) 41 br label %for.body 42 43 vector.ph: ; preds = %vector.memcheck 44 %start2 = call i32 @llvm.start.loop.iterations.i32(i32 %5) 45 br label %vector.body 46 47 vector.body: ; preds = %vector.body, %vector.ph 48 %lsr.iv50 = phi ptr [ %scevgep51, %vector.body ], [ %res, %vector.ph ] 49 %lsr.iv47 = phi ptr [ %scevgep48, %vector.body ], [ %b, %vector.ph ] 50 %lsr.iv = phi ptr [ %scevgep45, %vector.body ], [ %a, %vector.ph ] 51 %12 = phi i32 [ %start2, %vector.ph ], [ %17, %vector.body ] 52 %13 = phi i32 [ %N, %vector.ph ], [ %15, %vector.body ] 53 %lsr.iv5052 = bitcast ptr %lsr.iv50 to ptr 54 %lsr.iv4749 = bitcast ptr %lsr.iv47 to ptr 55 %lsr.iv46 = bitcast ptr %lsr.iv to ptr 56 %14 = call <16 x i1> @llvm.arm.mve.vctp8(i32 %13) 57 %15 = sub i32 %13, 16 58 %wide.masked.load = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %lsr.iv46, i32 1, <16 x i1> %14, <16 x i8> undef) 59 %wide.masked.load19 = call <16 x i8> @llvm.masked.load.v16i8.p0(ptr %lsr.iv4749, i32 1, <16 x i1> %14, <16 x i8> undef) 60 %16 = add <16 x i8> %wide.masked.load19, %wide.masked.load 61 call void @llvm.masked.store.v16i8.p0(<16 x i8> %16, ptr %lsr.iv5052, i32 1, <16 x i1> %14) 62 %scevgep45 = getelementptr i8, ptr %lsr.iv, i32 16 63 %scevgep48 = getelementptr i8, ptr %lsr.iv47, i32 16 64 %scevgep51 = getelementptr i8, ptr %lsr.iv50, i32 16 65 %17 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %12, i32 1) 66 %18 = icmp ne i32 %17, 0 67 br i1 %18, label %vector.body, label %for.cond.cleanup 68 69 for.cond.cleanup.loopexit.unr-lcssa: ; preds = %for.body, %for.body.preheader 70 %i.011.unr = phi i32 [ 0, %for.body.preheader ], [ %inc.3, %for.body ] 71 %lcmp.mod = icmp eq i32 %xtraiter, 0 72 br i1 %lcmp.mod, label %for.cond.cleanup, label %for.body.epil 73 74 for.body.epil: ; preds = %for.cond.cleanup.loopexit.unr-lcssa 75 %arrayidx.epil = getelementptr inbounds i8, ptr %a, i32 %i.011.unr 76 %19 = load i8, ptr %arrayidx.epil, align 1 77 %arrayidx1.epil = getelementptr inbounds i8, ptr %b, i32 %i.011.unr 78 %20 = load i8, ptr %arrayidx1.epil, align 1 79 %add.epil = add i8 %20, %19 80 %arrayidx4.epil = getelementptr inbounds i8, ptr %res, i32 %i.011.unr 81 store i8 %add.epil, ptr %arrayidx4.epil, align 1 82 %inc.epil = add nuw i32 %i.011.unr, 1 83 %epil.iter.cmp = icmp eq i32 %xtraiter, 1 84 br i1 %epil.iter.cmp, label %for.cond.cleanup, label %for.body.epil.1 85 86 for.cond.cleanup: ; preds = %vector.body, %for.cond.cleanup.loopexit.unr-lcssa, %for.body.epil.1, %for.body.epil, %for.body.epil.2, %entry 87 ret void 88 89 for.body: ; preds = %for.body, %for.body.preheader.new 90 %i.011 = phi i32 [ 0, %for.body.preheader.new ], [ %inc.3, %for.body ] 91 %21 = phi i32 [ %start1, %for.body.preheader.new ], [ %30, %for.body ] 92 %scevgep23 = getelementptr i8, ptr %a, i32 %i.011 93 %scevgep2453 = bitcast ptr %scevgep23 to ptr 94 %22 = load i8, ptr %scevgep2453, align 1 95 %scevgep27 = getelementptr i8, ptr %b, i32 %i.011 96 %scevgep2854 = bitcast ptr %scevgep27 to ptr 97 %23 = load i8, ptr %scevgep2854, align 1 98 %add = add i8 %23, %22 99 %scevgep31 = getelementptr i8, ptr %res, i32 %i.011 100 %scevgep3255 = bitcast ptr %scevgep31 to ptr 101 store i8 %add, ptr %scevgep3255, align 1 102 %scevgep39 = getelementptr i8, ptr %a, i32 %i.011 103 %scevgep40 = getelementptr i8, ptr %scevgep39, i32 1 104 %24 = load i8, ptr %scevgep40, align 1 105 %scevgep41 = getelementptr i8, ptr %b, i32 %i.011 106 %scevgep42 = getelementptr i8, ptr %scevgep41, i32 1 107 %25 = load i8, ptr %scevgep42, align 1 108 %add.1 = add i8 %25, %24 109 %scevgep43 = getelementptr i8, ptr %res, i32 %i.011 110 %scevgep44 = getelementptr i8, ptr %scevgep43, i32 1 111 store i8 %add.1, ptr %scevgep44, align 1 112 %scevgep33 = getelementptr i8, ptr %a, i32 %i.011 113 %scevgep34 = getelementptr i8, ptr %scevgep33, i32 2 114 %26 = load i8, ptr %scevgep34, align 1 115 %scevgep35 = getelementptr i8, ptr %b, i32 %i.011 116 %scevgep36 = getelementptr i8, ptr %scevgep35, i32 2 117 %27 = load i8, ptr %scevgep36, align 1 118 %add.2 = add i8 %27, %26 119 %scevgep37 = getelementptr i8, ptr %res, i32 %i.011 120 %scevgep38 = getelementptr i8, ptr %scevgep37, i32 2 121 store i8 %add.2, ptr %scevgep38, align 1 122 %scevgep21 = getelementptr i8, ptr %a, i32 %i.011 123 %scevgep22 = getelementptr i8, ptr %scevgep21, i32 3 124 %28 = load i8, ptr %scevgep22, align 1 125 %scevgep25 = getelementptr i8, ptr %b, i32 %i.011 126 %scevgep26 = getelementptr i8, ptr %scevgep25, i32 3 127 %29 = load i8, ptr %scevgep26, align 1 128 %add.3 = add i8 %29, %28 129 %scevgep29 = getelementptr i8, ptr %res, i32 %i.011 130 %scevgep30 = getelementptr i8, ptr %scevgep29, i32 3 131 store i8 %add.3, ptr %scevgep30, align 1 132 %inc.3 = add nuw i32 %i.011, 4 133 %30 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %21, i32 1) 134 %31 = icmp ne i32 %30, 0 135 br i1 %31, label %for.body, label %for.cond.cleanup.loopexit.unr-lcssa 136 137 for.body.epil.1: ; preds = %for.body.epil 138 %arrayidx.epil.1 = getelementptr inbounds i8, ptr %a, i32 %inc.epil 139 %32 = load i8, ptr %arrayidx.epil.1, align 1 140 %arrayidx1.epil.1 = getelementptr inbounds i8, ptr %b, i32 %inc.epil 141 %33 = load i8, ptr %arrayidx1.epil.1, align 1 142 %add.epil.1 = add i8 %33, %32 143 %arrayidx4.epil.1 = getelementptr inbounds i8, ptr %res, i32 %inc.epil 144 store i8 %add.epil.1, ptr %arrayidx4.epil.1, align 1 145 %inc.epil.1 = add nuw i32 %i.011.unr, 2 146 %epil.iter.cmp.1 = icmp eq i32 %xtraiter, 2 147 br i1 %epil.iter.cmp.1, label %for.cond.cleanup, label %for.body.epil.2 148 149 for.body.epil.2: ; preds = %for.body.epil.1 150 %arrayidx.epil.2 = getelementptr inbounds i8, ptr %a, i32 %inc.epil.1 151 %34 = load i8, ptr %arrayidx.epil.2, align 1 152 %arrayidx1.epil.2 = getelementptr inbounds i8, ptr %b, i32 %inc.epil.1 153 %35 = load i8, ptr %arrayidx1.epil.2, align 1 154 %add.epil.2 = add i8 %35, %34 155 %arrayidx4.epil.2 = getelementptr inbounds i8, ptr %res, i32 %inc.epil.1 156 store i8 %add.epil.2, ptr %arrayidx4.epil.2, align 1 157 br label %for.cond.cleanup 158 } 159 160 declare <16 x i8> @llvm.masked.load.v16i8.p0(ptr, i32 immarg, <16 x i1>, <16 x i8>) #1 161 declare void @llvm.masked.store.v16i8.p0(<16 x i8>, ptr, i32 immarg, <16 x i1>) #2 162 declare i32 @llvm.start.loop.iterations.i32(i32) #3 163 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #3 164 declare <16 x i1> @llvm.arm.mve.vctp8(i32) #4 165 166... 167--- 168name: unrolled_and_vector 169alignment: 2 170exposesReturnsTwice: false 171legalized: false 172regBankSelected: false 173selected: false 174failedISel: false 175tracksRegLiveness: true 176hasWinCFI: false 177registers: [] 178liveins: 179 - { reg: '$r0', virtual-reg: '' } 180 - { reg: '$r1', virtual-reg: '' } 181 - { reg: '$r2', virtual-reg: '' } 182 - { reg: '$r3', virtual-reg: '' } 183frameInfo: 184 isFrameAddressTaken: false 185 isReturnAddressTaken: false 186 hasStackMap: false 187 hasPatchPoint: false 188 stackSize: 32 189 offsetAdjustment: -24 190 maxAlignment: 4 191 adjustsStack: false 192 hasCalls: false 193 stackProtector: '' 194 maxCallFrameSize: 0 195 cvBytesOfCalleeSavedRegisters: 0 196 hasOpaqueSPAdjustment: false 197 hasVAStart: false 198 hasMustTailInVarArgFunc: false 199 localFrameSize: 0 200 savePoint: '' 201 restorePoint: '' 202fixedStack: [] 203stack: 204 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 205 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 206 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 207 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 208 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 209 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 210 - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, 211 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true, 212 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 213 - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, 214 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true, 215 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 216 - { id: 4, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, 217 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 218 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 219 - { id: 5, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, 220 stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true, 221 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 222 - { id: 6, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4, 223 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true, 224 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 225 - { id: 7, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, 226 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true, 227 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 228callSites: [] 229constants: [] 230machineFunctionInfo: {} 231body: | 232 ; CHECK-LABEL: name: unrolled_and_vector 233 ; CHECK: bb.0.entry: 234 ; CHECK-NEXT: successors: %bb.11(0x30000000), %bb.1(0x50000000) 235 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r8, $r9, $r11 236 ; CHECK-NEXT: {{ $}} 237 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp 238 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 20 239 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4 240 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8 241 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r6, -12 242 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r5, -16 243 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -20 244 ; CHECK-NEXT: dead $r7 = frame-setup tADDrSPi $sp, 3, 14 /* CC::al */, $noreg 245 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa $r7, 8 246 ; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r8, killed $r9, killed $r11 247 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r11, -24 248 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r9, -28 249 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r8, -32 250 ; CHECK-NEXT: tCMPi8 renamable $r3, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 251 ; CHECK-NEXT: tBcc %bb.11, 0 /* CC::eq */, killed $cpsr 252 ; CHECK-NEXT: {{ $}} 253 ; CHECK-NEXT: bb.1.vector.memcheck: 254 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000) 255 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3 256 ; CHECK-NEXT: {{ $}} 257 ; CHECK-NEXT: renamable $r4, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14 /* CC::al */, $noreg 258 ; CHECK-NEXT: renamable $r5, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14 /* CC::al */, $noreg 259 ; CHECK-NEXT: tCMPr renamable $r4, renamable $r2, 14 /* CC::al */, $noreg, implicit-def $cpsr 260 ; CHECK-NEXT: renamable $lr = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg 261 ; CHECK-NEXT: renamable $r12 = t2CSINC $zr, $zr, 9, implicit killed $cpsr 262 ; CHECK-NEXT: tCMPr killed renamable $r5, renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr 263 ; CHECK-NEXT: renamable $r6 = t2CSINC $zr, $zr, 9, implicit killed $cpsr 264 ; CHECK-NEXT: tCMPr killed renamable $r4, renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr 265 ; CHECK-NEXT: renamable $r5 = t2ADDrr renamable $r1, renamable $r3, 14 /* CC::al */, $noreg, $noreg 266 ; CHECK-NEXT: renamable $r4 = t2CSINC $zr, $zr, 9, implicit killed $cpsr 267 ; CHECK-NEXT: tCMPr killed renamable $r5, renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr 268 ; CHECK-NEXT: renamable $r5 = t2CSINC $zr, $zr, 9, implicit killed $cpsr 269 ; CHECK-NEXT: renamable $r5, dead $cpsr = tAND killed renamable $r5, killed renamable $r4, 14 /* CC::al */, $noreg 270 ; CHECK-NEXT: dead renamable $r5, $cpsr = tLSLri killed renamable $r5, 31, 14 /* CC::al */, $noreg 271 ; CHECK-NEXT: t2IT 0, 4, implicit-def $itstate 272 ; CHECK-NEXT: renamable $r6 = t2ANDrr killed renamable $r6, killed renamable $r12, 0 /* CC::eq */, $cpsr, $noreg, implicit killed $r6, implicit $itstate 273 ; CHECK-NEXT: dead renamable $r6 = t2LSLri killed renamable $r6, 31, 0 /* CC::eq */, killed $cpsr, def $cpsr, implicit killed $r6, implicit killed $itstate 274 ; CHECK-NEXT: tBcc %bb.4, 0 /* CC::eq */, killed $cpsr 275 ; CHECK-NEXT: {{ $}} 276 ; CHECK-NEXT: bb.2.for.body.preheader: 277 ; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.6(0x40000000) 278 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3 279 ; CHECK-NEXT: {{ $}} 280 ; CHECK-NEXT: renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14 /* CC::al */, $noreg 281 ; CHECK-NEXT: renamable $r12 = t2ANDri renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg 282 ; CHECK-NEXT: tCMPi8 killed renamable $r4, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr 283 ; CHECK-NEXT: tBcc %bb.6, 2 /* CC::hs */, killed $cpsr 284 ; CHECK-NEXT: {{ $}} 285 ; CHECK-NEXT: bb.3: 286 ; CHECK-NEXT: successors: %bb.8(0x80000000) 287 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r12 288 ; CHECK-NEXT: {{ $}} 289 ; CHECK-NEXT: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 290 ; CHECK-NEXT: tB %bb.8, 14 /* CC::al */, $noreg 291 ; CHECK-NEXT: {{ $}} 292 ; CHECK-NEXT: bb.4.vector.ph: 293 ; CHECK-NEXT: successors: %bb.5(0x80000000) 294 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3 295 ; CHECK-NEXT: {{ $}} 296 ; CHECK-NEXT: $lr = MVE_DLSTP_8 killed renamable $r3 297 ; CHECK-NEXT: {{ $}} 298 ; CHECK-NEXT: bb.5.vector.body: 299 ; CHECK-NEXT: successors: %bb.5(0x7c000000), %bb.11(0x04000000) 300 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2 301 ; CHECK-NEXT: {{ $}} 302 ; CHECK-NEXT: renamable $r1, renamable $q0 = MVE_VLDRBU8_post killed renamable $r1, 16, 0, $noreg, $noreg :: (load (s128) from %ir.lsr.iv46, align 1) 303 ; CHECK-NEXT: renamable $r2, renamable $q1 = MVE_VLDRBU8_post killed renamable $r2, 16, 0, $noreg, $noreg :: (load (s128) from %ir.lsr.iv4749, align 1) 304 ; CHECK-NEXT: renamable $q0 = MVE_VADDi8 killed renamable $q1, killed renamable $q0, 0, $noreg, $noreg, undef renamable $q0 305 ; CHECK-NEXT: renamable $r0 = MVE_VSTRBU8_post killed renamable $q0, killed renamable $r0, 16, 0, killed $noreg, $noreg :: (store (s128) into %ir.lsr.iv5052, align 1) 306 ; CHECK-NEXT: $lr = MVE_LETP killed renamable $lr, %bb.5 307 ; CHECK-NEXT: tB %bb.11, 14 /* CC::al */, $noreg 308 ; CHECK-NEXT: {{ $}} 309 ; CHECK-NEXT: bb.6.for.body.preheader.new: 310 ; CHECK-NEXT: successors: %bb.7(0x80000000) 311 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r12 312 ; CHECK-NEXT: {{ $}} 313 ; CHECK-NEXT: renamable $r3 = t2BICri killed renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg 314 ; CHECK-NEXT: renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg 315 ; CHECK-NEXT: renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg 316 ; CHECK-NEXT: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 317 ; CHECK-NEXT: {{ $}} 318 ; CHECK-NEXT: bb.7.for.body: 319 ; CHECK-NEXT: successors: %bb.7(0x7c000000), %bb.8(0x04000000) 320 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r12 321 ; CHECK-NEXT: {{ $}} 322 ; CHECK-NEXT: renamable $r4 = tLDRBr renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep2453) 323 ; CHECK-NEXT: renamable $r9 = t2ADDrr renamable $r1, renamable $r3, 14 /* CC::al */, $noreg, $noreg 324 ; CHECK-NEXT: renamable $r5 = tLDRBr renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep2854) 325 ; CHECK-NEXT: renamable $r6, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14 /* CC::al */, $noreg 326 ; CHECK-NEXT: renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r5, 14 /* CC::al */, $noreg 327 ; CHECK-NEXT: tSTRBr killed renamable $r4, renamable $r0, $r3, 14 /* CC::al */, $noreg :: (store (s8) into %ir.scevgep3255) 328 ; CHECK-NEXT: renamable $r8 = t2LDRBi12 renamable $r9, 1, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep40) 329 ; CHECK-NEXT: renamable $r5 = tLDRBi renamable $r6, 1, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep42) 330 ; CHECK-NEXT: renamable $r8 = tADDhirr killed renamable $r8, killed renamable $r5, 14 /* CC::al */, $noreg 331 ; CHECK-NEXT: renamable $r5, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14 /* CC::al */, $noreg 332 ; CHECK-NEXT: renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg 333 ; CHECK-NEXT: t2STRBi12 killed renamable $r8, renamable $r5, 1, 14 /* CC::al */, $noreg :: (store (s8) into %ir.scevgep44) 334 ; CHECK-NEXT: renamable $r8 = t2LDRBi12 renamable $r9, 2, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep34) 335 ; CHECK-NEXT: renamable $r4 = tLDRBi renamable $r6, 2, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep36) 336 ; CHECK-NEXT: renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r8, 14 /* CC::al */, $noreg 337 ; CHECK-NEXT: tSTRBi killed renamable $r4, renamable $r5, 2, 14 /* CC::al */, $noreg :: (store (s8) into %ir.scevgep38) 338 ; CHECK-NEXT: renamable $r4 = t2LDRBi12 killed renamable $r9, 3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep22) 339 ; CHECK-NEXT: renamable $r6 = tLDRBi killed renamable $r6, 3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.scevgep26) 340 ; CHECK-NEXT: renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r6, 14 /* CC::al */, $noreg 341 ; CHECK-NEXT: tSTRBi killed renamable $r4, killed renamable $r5, 3, 14 /* CC::al */, $noreg :: (store (s8) into %ir.scevgep30) 342 ; CHECK-NEXT: $lr = t2LEUpdate killed renamable $lr, %bb.7 343 ; CHECK-NEXT: {{ $}} 344 ; CHECK-NEXT: bb.8.for.cond.cleanup.loopexit.unr-lcssa: 345 ; CHECK-NEXT: successors: %bb.11(0x30000000), %bb.9(0x50000000) 346 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r12 347 ; CHECK-NEXT: {{ $}} 348 ; CHECK-NEXT: t2CMPri renamable $r12, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 349 ; CHECK-NEXT: tBcc %bb.11, 0 /* CC::eq */, killed $cpsr 350 ; CHECK-NEXT: {{ $}} 351 ; CHECK-NEXT: bb.9.for.body.epil: 352 ; CHECK-NEXT: successors: %bb.11(0x40000000), %bb.10(0x40000000) 353 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r12 354 ; CHECK-NEXT: {{ $}} 355 ; CHECK-NEXT: renamable $r6 = tLDRBr renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx.epil) 356 ; CHECK-NEXT: t2CMPri renamable $r12, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 357 ; CHECK-NEXT: renamable $r5 = tLDRBr renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx1.epil) 358 ; CHECK-NEXT: renamable $r6 = tADDhirr killed renamable $r6, killed renamable $r5, 14 /* CC::al */, $noreg 359 ; CHECK-NEXT: tSTRBr killed renamable $r6, renamable $r0, $r3, 14 /* CC::al */, $noreg :: (store (s8) into %ir.arrayidx4.epil) 360 ; CHECK-NEXT: tBcc %bb.11, 0 /* CC::eq */, killed $cpsr 361 ; CHECK-NEXT: {{ $}} 362 ; CHECK-NEXT: bb.10.for.body.epil.1: 363 ; CHECK-NEXT: successors: %bb.11(0x40000000), %bb.12(0x40000000) 364 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3, $r12 365 ; CHECK-NEXT: {{ $}} 366 ; CHECK-NEXT: renamable $r6, dead $cpsr = nuw tADDi3 renamable $r3, 1, 14 /* CC::al */, $noreg 367 ; CHECK-NEXT: t2CMPri killed renamable $r12, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr 368 ; CHECK-NEXT: renamable $r5 = tLDRBr renamable $r1, $r6, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx.epil.1) 369 ; CHECK-NEXT: renamable $r4 = tLDRBr renamable $r2, $r6, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx1.epil.1) 370 ; CHECK-NEXT: renamable $r5 = tADDhirr killed renamable $r5, killed renamable $r4, 14 /* CC::al */, $noreg 371 ; CHECK-NEXT: tSTRBr killed renamable $r5, renamable $r0, killed $r6, 14 /* CC::al */, $noreg :: (store (s8) into %ir.arrayidx4.epil.1) 372 ; CHECK-NEXT: tBcc %bb.12, 1 /* CC::ne */, killed $cpsr 373 ; CHECK-NEXT: {{ $}} 374 ; CHECK-NEXT: bb.11.for.cond.cleanup: 375 ; CHECK-NEXT: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r11 376 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 377 ; CHECK-NEXT: {{ $}} 378 ; CHECK-NEXT: bb.12.for.body.epil.2: 379 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3 380 ; CHECK-NEXT: {{ $}} 381 ; CHECK-NEXT: renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 2, 14 /* CC::al */, $noreg 382 ; CHECK-NEXT: renamable $r1 = tLDRBr killed renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx.epil.2) 383 ; CHECK-NEXT: renamable $r2 = tLDRBr killed renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load (s8) from %ir.arrayidx1.epil.2) 384 ; CHECK-NEXT: renamable $r1 = tADDhirr killed renamable $r1, killed renamable $r2, 14 /* CC::al */, $noreg 385 ; CHECK-NEXT: tSTRBr killed renamable $r1, killed renamable $r0, killed $r3, 14 /* CC::al */, $noreg :: (store (s8) into %ir.arrayidx4.epil.2) 386 ; CHECK-NEXT: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r11 387 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 388 bb.0.entry: 389 successors: %bb.11(0x30000000), %bb.1(0x50000000) 390 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $lr, $r8, $r9, $r11 391 392 frame-setup tPUSH 14, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp 393 frame-setup CFI_INSTRUCTION def_cfa_offset 20 394 frame-setup CFI_INSTRUCTION offset $lr, -4 395 frame-setup CFI_INSTRUCTION offset $r7, -8 396 frame-setup CFI_INSTRUCTION offset $r6, -12 397 frame-setup CFI_INSTRUCTION offset $r5, -16 398 frame-setup CFI_INSTRUCTION offset $r4, -20 399 $r7 = frame-setup tADDrSPi $sp, 3, 14, $noreg 400 frame-setup CFI_INSTRUCTION def_cfa $r7, 8 401 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r8, killed $r9, killed $r11 402 frame-setup CFI_INSTRUCTION offset $r11, -24 403 frame-setup CFI_INSTRUCTION offset $r9, -28 404 frame-setup CFI_INSTRUCTION offset $r8, -32 405 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 406 tBcc %bb.11, 0, killed $cpsr 407 408 bb.1.vector.memcheck: 409 successors: %bb.2(0x40000000), %bb.4(0x40000000) 410 liveins: $r0, $r1, $r2, $r3 411 412 renamable $r4, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg 413 renamable $r5, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg 414 tCMPr renamable $r4, renamable $r2, 14, $noreg, implicit-def $cpsr 415 renamable $lr = t2MOVi 1, 14, $noreg, $noreg 416 renamable $r12 = t2CSINC $zr, $zr, 9, implicit killed $cpsr 417 tCMPr killed renamable $r5, renamable $r0, 14, $noreg, implicit-def $cpsr 418 renamable $r6 = t2CSINC $zr, $zr, 9, implicit killed $cpsr 419 tCMPr killed renamable $r4, renamable $r1, 14, $noreg, implicit-def $cpsr 420 renamable $r5 = t2ADDrr renamable $r1, renamable $r3, 14, $noreg, $noreg 421 renamable $r4 = t2CSINC $zr, $zr, 9, implicit killed $cpsr 422 tCMPr killed renamable $r5, renamable $r0, 14, $noreg, implicit-def $cpsr 423 renamable $r5 = t2CSINC $zr, $zr, 9, implicit killed $cpsr 424 renamable $r5, dead $cpsr = tAND killed renamable $r5, killed renamable $r4, 14, $noreg 425 dead renamable $r5, $cpsr = tLSLri killed renamable $r5, 31, 14, $noreg 426 t2IT 0, 4, implicit-def $itstate 427 renamable $r6 = t2ANDrr killed renamable $r6, killed renamable $r12, 0, $cpsr, $noreg, implicit $r6, implicit $itstate 428 dead renamable $r6 = t2LSLri killed renamable $r6, 31, 0, killed $cpsr, def $cpsr, implicit killed $r6, implicit killed $itstate 429 tBcc %bb.4, 0, killed $cpsr 430 431 bb.2.for.body.preheader: 432 successors: %bb.3(0x40000000), %bb.6(0x40000000) 433 liveins: $lr, $r0, $r1, $r2, $r3 434 435 renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg 436 renamable $r12 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg 437 tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr 438 tBcc %bb.6, 2, killed $cpsr 439 440 bb.3: 441 successors: %bb.8(0x80000000) 442 liveins: $r0, $r1, $r2, $r12 443 444 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 445 tB %bb.8, 14, $noreg 446 447 bb.4.vector.ph: 448 successors: %bb.5(0x80000000) 449 liveins: $lr, $r0, $r1, $r2, $r3 450 451 renamable $r6 = t2ADDri renamable $r3, 15, 14, $noreg, $noreg 452 renamable $r6 = t2BICri killed renamable $r6, 15, 14, $noreg, $noreg 453 renamable $r6, dead $cpsr = tSUBi8 killed renamable $r6, 16, 14, $noreg 454 renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r6, 35, 14, $noreg, $noreg 455 $lr = t2DoLoopStart renamable $lr 456 457 bb.5.vector.body: 458 successors: %bb.5(0x7c000000), %bb.11(0x04000000) 459 liveins: $lr, $r0, $r1, $r2, $r3 460 461 renamable $vpr = MVE_VCTP8 renamable $r3, 0, $noreg, $noreg 462 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 16, 14, $noreg 463 MVE_VPST 4, implicit $vpr 464 renamable $r1, renamable $q0 = MVE_VLDRBU8_post killed renamable $r1, 16, 1, renamable $vpr, $noreg :: (load (s128) from %ir.lsr.iv46, align 1) 465 renamable $r2, renamable $q1 = MVE_VLDRBU8_post killed renamable $r2, 16, 1, renamable $vpr, $noreg :: (load (s128) from %ir.lsr.iv4749, align 1) 466 renamable $lr = t2LoopDec killed renamable $lr, 1 467 renamable $q0 = MVE_VADDi8 killed renamable $q1, killed renamable $q0, 0, $noreg, $noreg, undef renamable $q0 468 MVE_VPST 8, implicit $vpr 469 renamable $r0 = MVE_VSTRBU8_post killed renamable $q0, killed renamable $r0, 16, 1, killed renamable $vpr, $noreg :: (store (s128) into %ir.lsr.iv5052, align 1) 470 t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr 471 tB %bb.11, 14, $noreg 472 473 bb.6.for.body.preheader.new: 474 successors: %bb.7(0x80000000) 475 liveins: $lr, $r0, $r1, $r2, $r3, $r12 476 477 renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg 478 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg 479 renamable $lr = nuw nsw t2ADDrs killed renamable $lr, killed renamable $r3, 19, 14, $noreg, $noreg 480 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 481 $lr = t2DoLoopStart renamable $lr 482 483 bb.7.for.body: 484 successors: %bb.7(0x7c000000), %bb.8(0x04000000) 485 liveins: $lr, $r0, $r1, $r2, $r3, $r12 486 487 renamable $r4 = tLDRBr renamable $r1, $r3, 14, $noreg :: (load (s8) from %ir.scevgep2453) 488 renamable $r9 = t2ADDrr renamable $r1, renamable $r3, 14, $noreg, $noreg 489 renamable $r5 = tLDRBr renamable $r2, $r3, 14, $noreg :: (load (s8) from %ir.scevgep2854) 490 renamable $r6, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg 491 renamable $lr = t2LoopDec killed renamable $lr, 1 492 renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r5, 14, $noreg 493 tSTRBr killed renamable $r4, renamable $r0, $r3, 14, $noreg :: (store (s8) into %ir.scevgep3255) 494 renamable $r8 = t2LDRBi12 renamable $r9, 1, 14, $noreg :: (load (s8) from %ir.scevgep40) 495 renamable $r5 = tLDRBi renamable $r6, 1, 14, $noreg :: (load (s8) from %ir.scevgep42) 496 renamable $r8 = tADDhirr killed renamable $r8, killed renamable $r5, 14, $noreg 497 renamable $r5, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg 498 renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 4, 14, $noreg 499 t2STRBi12 killed renamable $r8, renamable $r5, 1, 14, $noreg :: (store (s8) into %ir.scevgep44) 500 renamable $r8 = t2LDRBi12 renamable $r9, 2, 14, $noreg :: (load (s8) from %ir.scevgep34) 501 renamable $r4 = tLDRBi renamable $r6, 2, 14, $noreg :: (load (s8) from %ir.scevgep36) 502 renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r8, 14, $noreg 503 tSTRBi killed renamable $r4, renamable $r5, 2, 14, $noreg :: (store (s8) into %ir.scevgep38) 504 renamable $r4 = t2LDRBi12 killed renamable $r9, 3, 14, $noreg :: (load (s8) from %ir.scevgep22) 505 renamable $r6 = tLDRBi killed renamable $r6, 3, 14, $noreg :: (load (s8) from %ir.scevgep26) 506 renamable $r4 = tADDhirr killed renamable $r4, killed renamable $r6, 14, $noreg 507 tSTRBi killed renamable $r4, killed renamable $r5, 3, 14, $noreg :: (store (s8) into %ir.scevgep30) 508 t2LoopEnd renamable $lr, %bb.7, implicit-def dead $cpsr 509 tB %bb.8, 14, $noreg 510 511 bb.8.for.cond.cleanup.loopexit.unr-lcssa: 512 successors: %bb.11(0x30000000), %bb.9(0x50000000) 513 liveins: $r0, $r1, $r2, $r3, $r12 514 515 t2CMPri renamable $r12, 0, 14, $noreg, implicit-def $cpsr 516 tBcc %bb.11, 0, killed $cpsr 517 518 bb.9.for.body.epil: 519 successors: %bb.11(0x40000000), %bb.10(0x40000000) 520 liveins: $r0, $r1, $r2, $r3, $r12 521 522 renamable $r6 = tLDRBr renamable $r1, $r3, 14, $noreg :: (load (s8) from %ir.arrayidx.epil) 523 t2CMPri renamable $r12, 1, 14, $noreg, implicit-def $cpsr 524 renamable $r5 = tLDRBr renamable $r2, $r3, 14, $noreg :: (load (s8) from %ir.arrayidx1.epil) 525 renamable $r6 = tADDhirr killed renamable $r6, killed renamable $r5, 14, $noreg 526 tSTRBr killed renamable $r6, renamable $r0, $r3, 14, $noreg :: (store (s8) into %ir.arrayidx4.epil) 527 tBcc %bb.11, 0, killed $cpsr 528 529 bb.10.for.body.epil.1: 530 successors: %bb.11(0x40000000), %bb.12(0x40000000) 531 liveins: $r0, $r1, $r2, $r3, $r12 532 533 renamable $r6, dead $cpsr = nuw tADDi3 renamable $r3, 1, 14, $noreg 534 t2CMPri killed renamable $r12, 2, 14, $noreg, implicit-def $cpsr 535 renamable $r5 = tLDRBr renamable $r1, $r6, 14, $noreg :: (load (s8) from %ir.arrayidx.epil.1) 536 renamable $r4 = tLDRBr renamable $r2, $r6, 14, $noreg :: (load (s8) from %ir.arrayidx1.epil.1) 537 renamable $r5 = tADDhirr killed renamable $r5, killed renamable $r4, 14, $noreg 538 tSTRBr killed renamable $r5, renamable $r0, killed $r6, 14, $noreg :: (store (s8) into %ir.arrayidx4.epil.1) 539 tBcc %bb.12, 1, killed $cpsr 540 541 bb.11.for.cond.cleanup: 542 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r11 543 tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 544 545 bb.12.for.body.epil.2: 546 liveins: $r0, $r1, $r2, $r3 547 548 renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 2, 14, $noreg 549 renamable $r1 = tLDRBr killed renamable $r1, $r3, 14, $noreg :: (load (s8) from %ir.arrayidx.epil.2) 550 renamable $r2 = tLDRBr killed renamable $r2, $r3, 14, $noreg :: (load (s8) from %ir.arrayidx1.epil.2) 551 renamable $r1 = tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg 552 tSTRBr killed renamable $r1, killed renamable $r0, killed $r3, 14, $noreg :: (store (s8) into %ir.arrayidx4.epil.2) 553 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r11 554 tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 555 556... 557