1; RUN: opt -mtriple=thumbv8.1m.main -mve-tail-predication -tail-predication=enabled -mattr=+mve,+lob %s -S -o - | FileCheck %s 2 3; TODO: We should be able to generate a vctp for the loads. 4; CHECK-LABEL: trunc_v4i32_v4i16 5; CHECK-NOT: vcpt 6define void @trunc_v4i32_v4i16(ptr readonly %a, ptr readonly %b, ptr %c, i32 %N) { 7entry: 8 %cmp8 = icmp eq i32 %N, 0 9 %tmp8 = add i32 %N, 3 10 %tmp9 = lshr i32 %tmp8, 2 11 %tmp10 = shl nuw i32 %tmp9, 2 12 %tmp11 = add i32 %tmp10, -4 13 %tmp12 = lshr i32 %tmp11, 2 14 %tmp13 = add nuw nsw i32 %tmp12, 1 15 br i1 %cmp8, label %for.cond.cleanup, label %vector.ph 16 17vector.ph: ; preds = %entry 18 %trip.count.minus.1 = add i32 %N, -1 19 %broadcast.splatinsert10 = insertelement <4 x i32> undef, i32 %trip.count.minus.1, i32 0 20 %broadcast.splat11 = shufflevector <4 x i32> %broadcast.splatinsert10, <4 x i32> undef, <4 x i32> zeroinitializer 21 %start = call i32 @llvm.start.loop.iterations.i32(i32 %tmp13) 22 br label %vector.body 23 24vector.body: ; preds = %vector.body, %vector.ph 25 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ] 26 %tmp14 = phi i32 [ %start, %vector.ph ], [ %tmp15, %vector.body ] 27 %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 0 28 %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer 29 %induction = add <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3> 30 %tmp = getelementptr inbounds i32, ptr %a, i32 %index 31 %tmp1 = icmp ule <4 x i32> %induction, %broadcast.splat11 32 %wide.masked.load = tail call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp, i32 4, <4 x i1> %tmp1, <4 x i32> undef) 33 %tmp3 = getelementptr inbounds i32, ptr %b, i32 %index 34 %wide.masked.load2 = tail call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %tmp3, i32 4, <4 x i1> %tmp1, <4 x i32> undef) 35 %mul = mul nsw <4 x i32> %wide.masked.load2, %wide.masked.load 36 %trunc = trunc <4 x i32> %mul to <4 x i16> 37 %tmp6 = getelementptr inbounds i16, ptr %c, i32 %index 38 tail call void @llvm.masked.store.v4i16.p0(<4 x i16> %trunc, ptr %tmp6, i32 4, <4 x i1> %tmp1) 39 %index.next = add i32 %index, 4 40 %tmp15 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %tmp14, i32 1) 41 %tmp16 = icmp ne i32 %tmp15, 0 42 br i1 %tmp16, label %vector.body, label %for.cond.cleanup 43 44for.cond.cleanup: ; preds = %vector.body, %entry 45 ret void 46} 47 48declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i32 immarg, <4 x i1>, <4 x i32>) 49declare void @llvm.masked.store.v4i16.p0(<4 x i16>, ptr, i32 immarg, <4 x i1>) 50declare i32 @llvm.start.loop.iterations.i32(i32) 51declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) 52