1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-cp-islands %s -o - | FileCheck %s 3--- | 4 @d = hidden local_unnamed_addr global i32 0, align 4 5 @a = hidden global i32 0, align 4 6 @e = hidden local_unnamed_addr global i32 0, align 4 7 8 define hidden void @f(i64 %g) { 9 entry: 10 %conv = trunc i64 %g to i32 11 %tobool5 = icmp eq i64 %g, 0 12 br i1 %tobool5, label %j.us.us.preheader, label %entry.split 13 14 j.us.us.preheader: ; preds = %entry 15 %.pre59 = load i32, ptr @d, align 4 16 br label %j.us.us 17 18 j.us.us: ; preds = %j.us.us, %if.end.us.us.us, %if.end.us.us.us.1, %if.end.us.us.us.2, %if.end.us.us.us.3, %if.end.us.us.us.4, %if.end.us.us.us.5, %if.end.us.us.us.6, %j.us.us.preheader 19 %0 = phi i32 [ %.pre59, %j.us.us.preheader ], [ %12, %if.end.us.us.us.6 ], [ %11, %if.end.us.us.us.5 ], [ %10, %if.end.us.us.us.4 ], [ %9, %if.end.us.us.us.3 ], [ %8, %if.end.us.us.us.2 ], [ %7, %if.end.us.us.us.1 ], [ %2, %if.end.us.us.us ], [ %0, %j.us.us ] 20 %cmp.us.us = icmp slt i32 %0, ptrtoint (ptr @a to i32) 21 %conv1.us.us = zext i1 %cmp.us.us to i32 22 %1 = load i32, ptr @e, align 4 23 %and.us.us = and i32 %1, %conv1.us.us 24 store i32 %and.us.us, ptr @e, align 4 25 %tobool4.us.us.us = icmp eq i32 %0, 0 26 br i1 %tobool4.us.us.us, label %if.end.us.us.us, label %j.us.us 27 28 if.end.us.us.us: ; preds = %j.us.us 29 tail call void asm sideeffect "", ""() 30 %2 = load i32, ptr @d, align 4 31 %tobool4.us.us.us.1 = icmp eq i32 %2, 0 32 br i1 %tobool4.us.us.us.1, label %if.end.us.us.us.1, label %j.us.us 33 34 entry.split: ; preds = %entry 35 %tobool = icmp eq i32 %conv, 0 36 br i1 %tobool, label %j.us27.preheader, label %j.preheader 37 38 j.preheader: ; preds = %entry.split 39 %.pre = load i32, ptr @e, align 4 40 %.pre55 = load i32, ptr @d, align 4 41 %cmp = icmp slt i32 %conv, ptrtoint (ptr @a to i32) 42 %conv1 = zext i1 %cmp to i32 43 br label %j 44 45 j.us27.preheader: ; preds = %entry.split 46 %.pre56 = load i32, ptr @d, align 4 47 %.pre57 = load i32, ptr @e, align 4 48 %cmp.us29 = icmp slt i32 %.pre56, ptrtoint (ptr @a to i32) 49 %conv1.us30 = zext i1 %cmp.us29 to i32 50 br label %j.us27 51 52 j.us27: ; preds = %j.us27, %j.us27.preheader 53 %3 = phi i32 [ %.pre57, %j.us27.preheader ], [ %and.us31, %j.us27 ] 54 %4 = icmp eq i32 %.pre56, 0 55 %and.us31 = and i32 %3, %conv1.us30 56 br i1 %4, label %if.end.us38, label %j.us27 57 58 if.end.us38: ; preds = %j.us27 59 store i32 %and.us31, ptr @e, align 4 60 tail call void asm sideeffect "", ""() 61 ret void 62 63 j: ; preds = %j, %j.preheader 64 %5 = phi i32 [ %.pre, %j.preheader ], [ %and, %j ] 65 %6 = icmp eq i32 %.pre55, 0 66 %and = and i32 %5, %conv1 67 br i1 %6, label %if.end, label %j 68 69 if.end: ; preds = %j 70 store i32 %and, ptr @e, align 4 71 tail call void asm sideeffect "", ""() 72 ret void 73 74 if.end.us.us.us.1: ; preds = %if.end.us.us.us 75 tail call void asm sideeffect "", ""() 76 %7 = load i32, ptr @d, align 4 77 %tobool4.us.us.us.2 = icmp eq i32 %7, 0 78 br i1 %tobool4.us.us.us.2, label %if.end.us.us.us.2, label %j.us.us 79 80 if.end.us.us.us.2: ; preds = %if.end.us.us.us.1 81 tail call void asm sideeffect "", ""() 82 %8 = load i32, ptr @d, align 4 83 %tobool4.us.us.us.3 = icmp eq i32 %8, 0 84 br i1 %tobool4.us.us.us.3, label %if.end.us.us.us.3, label %j.us.us 85 86 if.end.us.us.us.3: ; preds = %if.end.us.us.us.2 87 tail call void asm sideeffect "", ""() 88 %9 = load i32, ptr @d, align 4 89 %tobool4.us.us.us.4 = icmp eq i32 %9, 0 90 br i1 %tobool4.us.us.us.4, label %if.end.us.us.us.4, label %j.us.us 91 92 if.end.us.us.us.4: ; preds = %if.end.us.us.us.3 93 tail call void asm sideeffect "", ""() 94 %10 = load i32, ptr @d, align 4 95 %tobool4.us.us.us.5 = icmp eq i32 %10, 0 96 br i1 %tobool4.us.us.us.5, label %if.end.us.us.us.5, label %j.us.us 97 98 if.end.us.us.us.5: ; preds = %if.end.us.us.us.4 99 tail call void asm sideeffect "", ""() 100 %11 = load i32, ptr @d, align 4 101 %tobool4.us.us.us.6 = icmp eq i32 %11, 0 102 br i1 %tobool4.us.us.us.6, label %if.end.us.us.us.6, label %j.us.us 103 104 if.end.us.us.us.6: ; preds = %if.end.us.us.us.5 105 tail call void asm sideeffect "", ""() 106 %12 = load i32, ptr @d, align 4 107 %tobool4.us.us.us.7 = icmp eq i32 %12, 0 108 br i1 %tobool4.us.us.us.7, label %if.end.us.us.us.7, label %j.us.us 109 110 if.end.us.us.us.7: ; preds = %if.end.us.us.us.6 111 tail call void asm sideeffect "", ""() 112 ret void 113 } 114 115... 116--- 117name: f 118alignment: 4 119exposesReturnsTwice: false 120legalized: false 121regBankSelected: false 122selected: false 123failedISel: false 124tracksRegLiveness: true 125hasWinCFI: false 126registers: [] 127liveins: 128 - { reg: '$r0', virtual-reg: '' } 129 - { reg: '$r1', virtual-reg: '' } 130frameInfo: 131 isFrameAddressTaken: false 132 isReturnAddressTaken: false 133 hasStackMap: false 134 hasPatchPoint: false 135 stackSize: 8 136 offsetAdjustment: 0 137 maxAlignment: 4 138 adjustsStack: false 139 hasCalls: false 140 stackProtector: '' 141 maxCallFrameSize: 0 142 cvBytesOfCalleeSavedRegisters: 0 143 hasOpaqueSPAdjustment: false 144 hasVAStart: false 145 hasMustTailInVarArgFunc: false 146 localFrameSize: 0 147 savePoint: '' 148 restorePoint: '' 149fixedStack: [] 150stack: 151 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 152 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 153 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 154 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 155 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 156 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 157callSites: [] 158constants: [] 159machineFunctionInfo: {} 160body: | 161 ; CHECK-LABEL: name: f 162 ; CHECK: bb.0.entry: 163 ; CHECK-NEXT: successors: %bb.5(0x30000000), %bb.1(0x50000000) 164 ; CHECK-NEXT: liveins: $r0, $r1, $r7, $lr 165 ; CHECK-NEXT: {{ $}} 166 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp 167 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8 168 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4 169 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8 170 ; CHECK-NEXT: dead renamable $r1, $cpsr = tORR killed renamable $r1, renamable $r0, 14 /* CC::al */, $noreg 171 ; CHECK-NEXT: tBcc %bb.5, 0 /* CC::eq */, killed $cpsr 172 ; CHECK-NEXT: {{ $}} 173 ; CHECK-NEXT: bb.1.entry.split: 174 ; CHECK-NEXT: successors: %bb.15(0x30000000), %bb.2(0x50000000) 175 ; CHECK-NEXT: liveins: $r0 176 ; CHECK-NEXT: {{ $}} 177 ; CHECK-NEXT: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 178 ; CHECK-NEXT: tBcc %bb.15, 0 /* CC::eq */, killed $cpsr 179 ; CHECK-NEXT: {{ $}} 180 ; CHECK-NEXT: bb.2.j.preheader: 181 ; CHECK-NEXT: successors: %bb.3(0x80000000) 182 ; CHECK-NEXT: liveins: $r0 183 ; CHECK-NEXT: {{ $}} 184 ; CHECK-NEXT: $r1 = t2MOVi16 target-flags(arm-lo16) @a, 14 /* CC::al */, $noreg 185 ; CHECK-NEXT: $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @a, 14 /* CC::al */, $noreg 186 ; CHECK-NEXT: tCMPr killed renamable $r0, killed renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr 187 ; CHECK-NEXT: $r1 = t2MOVi16 target-flags(arm-lo16) @d, 14 /* CC::al */, $noreg 188 ; CHECK-NEXT: renamable $r0 = t2CSINC $zr, $zr, 10, implicit killed $cpsr 189 ; CHECK-NEXT: $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @d, 14 /* CC::al */, $noreg 190 ; CHECK-NEXT: renamable $r2 = tLDRi killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 191 ; CHECK-NEXT: $r1 = t2MOVi16 target-flags(arm-lo16) @e, 14 /* CC::al */, $noreg 192 ; CHECK-NEXT: $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @e, 14 /* CC::al */, $noreg 193 ; CHECK-NEXT: renamable $r3 = tLDRi renamable $r1, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @e) 194 ; CHECK-NEXT: {{ $}} 195 ; CHECK-NEXT: bb.3.j (align 4): 196 ; CHECK-NEXT: successors: %bb.4(0x04000000), %bb.3(0x7c000000) 197 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3 198 ; CHECK-NEXT: {{ $}} 199 ; CHECK-NEXT: renamable $r3, dead $cpsr = tAND killed renamable $r3, renamable $r0, 14 /* CC::al */, $noreg 200 ; CHECK-NEXT: tCBZ renamable $r2, %bb.4 201 ; CHECK-NEXT: t2LE %bb.3 202 ; CHECK-NEXT: {{ $}} 203 ; CHECK-NEXT: bb.4.if.end: 204 ; CHECK-NEXT: liveins: $r1, $r3 205 ; CHECK-NEXT: {{ $}} 206 ; CHECK-NEXT: tSTRi killed renamable $r3, killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (store (s32) into @e) 207 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 208 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc 209 ; CHECK-NEXT: {{ $}} 210 ; CHECK-NEXT: bb.5.j.us.us.preheader: 211 ; CHECK-NEXT: successors: %bb.6(0x80000000) 212 ; CHECK-NEXT: {{ $}} 213 ; CHECK-NEXT: $r12 = t2MOVi16 target-flags(arm-lo16) @d, 14 /* CC::al */, $noreg 214 ; CHECK-NEXT: $lr = t2MOVi16 target-flags(arm-lo16) @a, 14 /* CC::al */, $noreg 215 ; CHECK-NEXT: $r12 = t2MOVTi16 killed $r12, target-flags(arm-hi16) @d, 14 /* CC::al */, $noreg 216 ; CHECK-NEXT: $r2 = t2MOVi16 target-flags(arm-lo16) @e, 14 /* CC::al */, $noreg 217 ; CHECK-NEXT: renamable $r3 = t2LDRi12 renamable $r12, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 218 ; CHECK-NEXT: $lr = t2MOVTi16 killed $lr, target-flags(arm-hi16) @a, 14 /* CC::al */, $noreg 219 ; CHECK-NEXT: $r2 = t2MOVTi16 killed $r2, target-flags(arm-hi16) @e, 14 /* CC::al */, $noreg 220 ; CHECK-NEXT: {{ $}} 221 ; CHECK-NEXT: bb.6.j.us.us (align 4): 222 ; CHECK-NEXT: successors: %bb.7(0x40000000), %bb.6(0x40000000) 223 ; CHECK-NEXT: liveins: $lr, $r2, $r3, $r12 224 ; CHECK-NEXT: {{ $}} 225 ; CHECK-NEXT: tCMPhir renamable $r3, renamable $lr, 14 /* CC::al */, $noreg, implicit-def $cpsr 226 ; CHECK-NEXT: renamable $r1 = tLDRi renamable $r2, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @e) 227 ; CHECK-NEXT: renamable $r0 = t2CSINC $zr, $zr, 10, implicit killed $cpsr 228 ; CHECK-NEXT: renamable $r0 = t2ANDrr killed renamable $r0, killed renamable $r1, 14 /* CC::al */, $noreg, $noreg 229 ; CHECK-NEXT: tSTRi killed renamable $r0, renamable $r2, 0, 14 /* CC::al */, $noreg :: (store (s32) into @e) 230 ; CHECK-NEXT: tCBZ renamable $r3, %bb.7 231 ; CHECK-NEXT: t2LE %bb.6 232 ; CHECK-NEXT: {{ $}} 233 ; CHECK-NEXT: bb.7.if.end.us.us.us: 234 ; CHECK-NEXT: successors: %bb.8(0x40000000), %bb.6(0x40000000) 235 ; CHECK-NEXT: liveins: $lr, $r2, $r12 236 ; CHECK-NEXT: {{ $}} 237 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 238 ; CHECK-NEXT: renamable $r3 = t2LDRi12 renamable $r12, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 239 ; CHECK-NEXT: tCBZ renamable $r3, %bb.8 240 ; CHECK-NEXT: t2LE %bb.6 241 ; CHECK-NEXT: {{ $}} 242 ; CHECK-NEXT: bb.8.if.end.us.us.us.1: 243 ; CHECK-NEXT: successors: %bb.9(0x40000000), %bb.6(0x40000000) 244 ; CHECK-NEXT: liveins: $lr, $r2, $r12 245 ; CHECK-NEXT: {{ $}} 246 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 247 ; CHECK-NEXT: renamable $r3 = t2LDRi12 renamable $r12, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 248 ; CHECK-NEXT: tCBZ renamable $r3, %bb.9 249 ; CHECK-NEXT: t2LE %bb.6 250 ; CHECK-NEXT: {{ $}} 251 ; CHECK-NEXT: bb.9.if.end.us.us.us.2: 252 ; CHECK-NEXT: successors: %bb.10(0x40000000), %bb.6(0x40000000) 253 ; CHECK-NEXT: liveins: $lr, $r2, $r12 254 ; CHECK-NEXT: {{ $}} 255 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 256 ; CHECK-NEXT: renamable $r3 = t2LDRi12 renamable $r12, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 257 ; CHECK-NEXT: tCBZ renamable $r3, %bb.10 258 ; CHECK-NEXT: t2LE %bb.6 259 ; CHECK-NEXT: {{ $}} 260 ; CHECK-NEXT: bb.10.if.end.us.us.us.3: 261 ; CHECK-NEXT: successors: %bb.11(0x40000000), %bb.6(0x40000000) 262 ; CHECK-NEXT: liveins: $lr, $r2, $r12 263 ; CHECK-NEXT: {{ $}} 264 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 265 ; CHECK-NEXT: renamable $r3 = t2LDRi12 renamable $r12, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 266 ; CHECK-NEXT: tCBZ renamable $r3, %bb.11 267 ; CHECK-NEXT: t2LE %bb.6 268 ; CHECK-NEXT: {{ $}} 269 ; CHECK-NEXT: bb.11.if.end.us.us.us.4: 270 ; CHECK-NEXT: successors: %bb.12(0x40000000), %bb.6(0x40000000) 271 ; CHECK-NEXT: liveins: $lr, $r2, $r12 272 ; CHECK-NEXT: {{ $}} 273 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 274 ; CHECK-NEXT: renamable $r3 = t2LDRi12 renamable $r12, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 275 ; CHECK-NEXT: tCBZ renamable $r3, %bb.12 276 ; CHECK-NEXT: t2LE %bb.6 277 ; CHECK-NEXT: {{ $}} 278 ; CHECK-NEXT: bb.12.if.end.us.us.us.5: 279 ; CHECK-NEXT: successors: %bb.13(0x40000000), %bb.6(0x40000000) 280 ; CHECK-NEXT: liveins: $lr, $r2, $r12 281 ; CHECK-NEXT: {{ $}} 282 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 283 ; CHECK-NEXT: renamable $r3 = t2LDRi12 renamable $r12, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 284 ; CHECK-NEXT: tCBZ renamable $r3, %bb.13 285 ; CHECK-NEXT: t2LE %bb.6 286 ; CHECK-NEXT: {{ $}} 287 ; CHECK-NEXT: bb.13.if.end.us.us.us.6: 288 ; CHECK-NEXT: successors: %bb.14(0x04000000), %bb.6(0x7c000000) 289 ; CHECK-NEXT: liveins: $lr, $r2, $r12 290 ; CHECK-NEXT: {{ $}} 291 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 292 ; CHECK-NEXT: renamable $r3 = t2LDRi12 renamable $r12, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 293 ; CHECK-NEXT: tCBZ renamable $r3, %bb.14 294 ; CHECK-NEXT: t2LE %bb.6 295 ; CHECK-NEXT: {{ $}} 296 ; CHECK-NEXT: bb.14.if.end.us.us.us.7: 297 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 298 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc 299 ; CHECK-NEXT: {{ $}} 300 ; CHECK-NEXT: bb.15.j.us27.preheader: 301 ; CHECK-NEXT: successors: %bb.16(0x80000000) 302 ; CHECK-NEXT: {{ $}} 303 ; CHECK-NEXT: $r0 = t2MOVi16 target-flags(arm-lo16) @d, 14 /* CC::al */, $noreg 304 ; CHECK-NEXT: $r1 = t2MOVi16 target-flags(arm-lo16) @a, 14 /* CC::al */, $noreg 305 ; CHECK-NEXT: $r0 = t2MOVTi16 killed $r0, target-flags(arm-hi16) @d, 14 /* CC::al */, $noreg 306 ; CHECK-NEXT: $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @a, 14 /* CC::al */, $noreg 307 ; CHECK-NEXT: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @d) 308 ; CHECK-NEXT: tCMPr renamable $r0, killed renamable $r1, 14 /* CC::al */, $noreg, implicit-def $cpsr 309 ; CHECK-NEXT: $r1 = t2MOVi16 target-flags(arm-lo16) @e, 14 /* CC::al */, $noreg 310 ; CHECK-NEXT: $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @e, 14 /* CC::al */, $noreg 311 ; CHECK-NEXT: renamable $r2 = t2CSINC $zr, $zr, 10, implicit killed $cpsr 312 ; CHECK-NEXT: renamable $r3 = tLDRi renamable $r1, 0, 14 /* CC::al */, $noreg :: (dereferenceable load (s32) from @e) 313 ; CHECK-NEXT: {{ $}} 314 ; CHECK-NEXT: bb.16.j.us27 (align 4): 315 ; CHECK-NEXT: successors: %bb.17(0x04000000), %bb.16(0x7c000000) 316 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3 317 ; CHECK-NEXT: {{ $}} 318 ; CHECK-NEXT: renamable $r3, dead $cpsr = tAND killed renamable $r3, renamable $r2, 14 /* CC::al */, $noreg 319 ; CHECK-NEXT: tCBZ renamable $r0, %bb.17 320 ; CHECK-NEXT: t2LE %bb.16 321 ; CHECK-NEXT: {{ $}} 322 ; CHECK-NEXT: bb.17.if.end.us38: 323 ; CHECK-NEXT: liveins: $r1, $r3 324 ; CHECK-NEXT: {{ $}} 325 ; CHECK-NEXT: tSTRi killed renamable $r3, killed renamable $r1, 0, 14 /* CC::al */, $noreg :: (store (s32) into @e) 326 ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */ 327 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc 328 bb.0.entry: 329 successors: %bb.1(0x30000000), %bb.11(0x50000000) 330 liveins: $r0, $r1, $r7, $lr 331 332 frame-setup tPUSH 14, $noreg, killed $r7, killed $lr, implicit-def $sp, implicit $sp 333 frame-setup CFI_INSTRUCTION def_cfa_offset 8 334 frame-setup CFI_INSTRUCTION offset $lr, -4 335 frame-setup CFI_INSTRUCTION offset $r7, -8 336 dead renamable $r1, $cpsr = tORR killed renamable $r1, renamable $r0, 14, $noreg 337 t2Bcc %bb.1, 0, killed $cpsr 338 339 bb.11.entry.split: 340 successors: %bb.15(0x30000000), %bb.12(0x50000000) 341 liveins: $r0 342 343 tCMPi8 renamable $r0, 0, 14, $noreg, implicit-def $cpsr 344 t2Bcc %bb.15, 0, killed $cpsr 345 346 bb.12.j.preheader: 347 successors: %bb.13(0x80000000) 348 liveins: $r0 349 350 $r1 = t2MOVi16 target-flags(arm-lo16) @a, 14, $noreg 351 $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @a, 14, $noreg 352 tCMPr killed renamable $r0, killed renamable $r1, 14, $noreg, implicit-def $cpsr 353 $r1 = t2MOVi16 target-flags(arm-lo16) @d, 14, $noreg 354 renamable $r0 = t2CSINC $zr, $zr, 10, implicit killed $cpsr 355 $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @d, 14, $noreg 356 renamable $r2 = tLDRi killed renamable $r1, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 357 $r1 = t2MOVi16 target-flags(arm-lo16) @e, 14, $noreg 358 $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @e, 14, $noreg 359 renamable $r3 = tLDRi renamable $r1, 0, 14, $noreg :: (dereferenceable load (s32) from @e) 360 361 bb.13.j (align 4): 362 successors: %bb.14(0x04000000), %bb.13(0x7c000000) 363 liveins: $r0, $r1, $r2, $r3 364 365 renamable $r3, dead $cpsr = tAND killed renamable $r3, renamable $r0, 14, $noreg 366 tCMPi8 renamable $r2, 0, 14, $noreg, implicit-def $cpsr 367 t2Bcc %bb.13, 1, killed $cpsr 368 369 bb.14.if.end: 370 liveins: $r1, $r3 371 372 tSTRi killed renamable $r3, killed renamable $r1, 0, 14, $noreg :: (store (s32) into @e) 373 INLINEASM &"", 1 374 tPOP_RET 14, $noreg, def $r7, def $pc 375 376 bb.1.j.us.us.preheader: 377 successors: %bb.2(0x80000000) 378 379 $r12 = t2MOVi16 target-flags(arm-lo16) @d, 14, $noreg 380 $lr = t2MOVi16 target-flags(arm-lo16) @a, 14, $noreg 381 $r12 = t2MOVTi16 killed $r12, target-flags(arm-hi16) @d, 14, $noreg 382 $r2 = t2MOVi16 target-flags(arm-lo16) @e, 14, $noreg 383 renamable $r3 = t2LDRi12 renamable $r12, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 384 $lr = t2MOVTi16 killed $lr, target-flags(arm-hi16) @a, 14, $noreg 385 $r2 = t2MOVTi16 killed $r2, target-flags(arm-hi16) @e, 14, $noreg 386 387 bb.2.j.us.us (align 4): 388 successors: %bb.3(0x40000000), %bb.2(0x40000000) 389 liveins: $lr, $r2, $r3, $r12 390 391 tCMPhir renamable $r3, renamable $lr, 14, $noreg, implicit-def $cpsr 392 renamable $r1 = tLDRi renamable $r2, 0, 14, $noreg :: (dereferenceable load (s32) from @e) 393 renamable $r0 = t2CSINC $zr, $zr, 10, implicit killed $cpsr 394 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 395 renamable $r0 = t2ANDrr killed renamable $r0, killed renamable $r1, 14, $noreg, $noreg 396 tSTRi killed renamable $r0, renamable $r2, 0, 14, $noreg :: (store (s32) into @e) 397 t2Bcc %bb.2, 1, killed $cpsr 398 399 bb.3.if.end.us.us.us: 400 successors: %bb.4(0x40000000), %bb.2(0x40000000) 401 liveins: $lr, $r2, $r12 402 403 INLINEASM &"", 1 404 renamable $r3 = t2LDRi12 renamable $r12, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 405 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 406 t2Bcc %bb.2, 1, killed $cpsr 407 408 bb.4.if.end.us.us.us.1: 409 successors: %bb.5(0x40000000), %bb.2(0x40000000) 410 liveins: $lr, $r2, $r12 411 412 INLINEASM &"", 1 413 renamable $r3 = t2LDRi12 renamable $r12, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 414 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 415 t2Bcc %bb.2, 1, killed $cpsr 416 417 bb.5.if.end.us.us.us.2: 418 successors: %bb.6(0x40000000), %bb.2(0x40000000) 419 liveins: $lr, $r2, $r12 420 421 INLINEASM &"", 1 422 renamable $r3 = t2LDRi12 renamable $r12, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 423 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 424 t2Bcc %bb.2, 1, killed $cpsr 425 426 bb.6.if.end.us.us.us.3: 427 successors: %bb.7(0x40000000), %bb.2(0x40000000) 428 liveins: $lr, $r2, $r12 429 430 INLINEASM &"", 1 431 renamable $r3 = t2LDRi12 renamable $r12, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 432 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 433 t2Bcc %bb.2, 1, killed $cpsr 434 435 bb.7.if.end.us.us.us.4: 436 successors: %bb.8(0x40000000), %bb.2(0x40000000) 437 liveins: $lr, $r2, $r12 438 439 INLINEASM &"", 1 440 renamable $r3 = t2LDRi12 renamable $r12, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 441 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 442 t2Bcc %bb.2, 1, killed $cpsr 443 444 bb.8.if.end.us.us.us.5: 445 successors: %bb.9(0x40000000), %bb.2(0x40000000) 446 liveins: $lr, $r2, $r12 447 448 INLINEASM &"", 1 449 renamable $r3 = t2LDRi12 renamable $r12, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 450 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 451 t2Bcc %bb.2, 1, killed $cpsr 452 453 bb.9.if.end.us.us.us.6: 454 successors: %bb.10(0x04000000), %bb.2(0x7c000000) 455 liveins: $lr, $r2, $r12 456 457 INLINEASM &"", 1 458 renamable $r3 = t2LDRi12 renamable $r12, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 459 tCMPi8 renamable $r3, 0, 14, $noreg, implicit-def $cpsr 460 t2Bcc %bb.2, 1, killed $cpsr 461 462 bb.10.if.end.us.us.us.7: 463 INLINEASM &"", 1 464 tPOP_RET 14, $noreg, def $r7, def $pc 465 466 bb.15.j.us27.preheader: 467 successors: %bb.16(0x80000000) 468 469 $r0 = t2MOVi16 target-flags(arm-lo16) @d, 14, $noreg 470 $r1 = t2MOVi16 target-flags(arm-lo16) @a, 14, $noreg 471 $r0 = t2MOVTi16 killed $r0, target-flags(arm-hi16) @d, 14, $noreg 472 $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @a, 14, $noreg 473 renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (dereferenceable load (s32) from @d) 474 tCMPr renamable $r0, killed renamable $r1, 14, $noreg, implicit-def $cpsr 475 $r1 = t2MOVi16 target-flags(arm-lo16) @e, 14, $noreg 476 $r1 = t2MOVTi16 killed $r1, target-flags(arm-hi16) @e, 14, $noreg 477 renamable $r2 = t2CSINC $zr, $zr, 10, implicit killed $cpsr 478 renamable $r3 = tLDRi renamable $r1, 0, 14, $noreg :: (dereferenceable load (s32) from @e) 479 480 bb.16.j.us27 (align 4): 481 successors: %bb.17(0x04000000), %bb.16(0x7c000000) 482 liveins: $r0, $r1, $r2, $r3 483 484 renamable $r3, dead $cpsr = tAND killed renamable $r3, renamable $r2, 14, $noreg 485 tCMPi8 renamable $r0, 0, 14, $noreg, implicit-def $cpsr 486 t2Bcc %bb.16, 1, killed $cpsr 487 488 bb.17.if.end.us38: 489 liveins: $r1, $r3 490 491 tSTRi killed renamable $r3, killed renamable $r1, 0, 14, $noreg :: (store (s32) into @e) 492 INLINEASM &"", 1 493 tPOP_RET 14, $noreg, def $r7, def $pc 494 495... 496