xref: /llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll (revision b31fffbc7f1e0491bf599e82b7195e320d26e140) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -tail-predication=enabled %s -o - | FileCheck %s
3
4define arm_aapcs_vfpcc i32 @test_acc_scalar_char(i8 zeroext %a, ptr nocapture readonly %b, i32 %N) {
5; CHECK-LABEL: test_acc_scalar_char:
6; CHECK:       @ %bb.0: @ %entry
7; CHECK-NEXT:    cmp r2, #0
8; CHECK-NEXT:    itt eq
9; CHECK-NEXT:    moveq r0, #0
10; CHECK-NEXT:    bxeq lr
11; CHECK-NEXT:  .LBB0_1: @ %vector.ph
12; CHECK-NEXT:    push {r7, lr}
13; CHECK-NEXT:    adds r3, r2, #3
14; CHECK-NEXT:    vmov.i32 q0, #0x0
15; CHECK-NEXT:    bic r3, r3, #3
16; CHECK-NEXT:    sub.w r12, r3, #4
17; CHECK-NEXT:    movs r3, #1
18; CHECK-NEXT:    add.w r3, r3, r12, lsr #2
19; CHECK-NEXT:    dls lr, r3
20; CHECK-NEXT:  .LBB0_2: @ %vector.body
21; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
22; CHECK-NEXT:    vctp.32 r2
23; CHECK-NEXT:    subs r2, #4
24; CHECK-NEXT:    vpst
25; CHECK-NEXT:    vldrbt.u32 q2, [r1], #4
26; CHECK-NEXT:    vmov q1, q0
27; CHECK-NEXT:    vmla.i32 q0, q2, r0
28; CHECK-NEXT:    le lr, .LBB0_2
29; CHECK-NEXT:  @ %bb.3: @ %middle.block
30; CHECK-NEXT:    vpsel q0, q0, q1
31; CHECK-NEXT:    vaddv.u32 r0, q0
32; CHECK-NEXT:    pop {r7, pc}
33entry:
34  %cmp7 = icmp eq i32 %N, 0
35  br i1 %cmp7, label %for.cond.cleanup, label %vector.ph
36
37vector.ph:                                        ; preds = %entry
38  %conv = zext i8 %a to i32
39  %n.rnd.up = add i32 %N, 3
40  %n.vec = and i32 %n.rnd.up, -4
41  %broadcast.splatinsert12 = insertelement <4 x i32> undef, i32 %conv, i32 0
42  %broadcast.splat13 = shufflevector <4 x i32> %broadcast.splatinsert12, <4 x i32> undef, <4 x i32> zeroinitializer
43  br label %vector.body
44
45vector.body:                                      ; preds = %vector.body, %vector.ph
46  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
47  %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %5, %vector.body ]
48  %0 = getelementptr inbounds i8, ptr %b, i32 %index
49  %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
50  %2 = bitcast ptr %0 to ptr
51  %wide.masked.load = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %2, i32 1, <4 x i1> %1, <4 x i8> undef)
52  %3 = zext <4 x i8> %wide.masked.load to <4 x i32>
53  %4 = mul nuw nsw <4 x i32> %broadcast.splat13, %3
54  %5 = add nuw nsw <4 x i32> %4, %vec.phi
55  %index.next = add i32 %index, 4
56  %6 = icmp eq i32 %index.next, %n.vec
57  br i1 %6, label %middle.block, label %vector.body
58
59middle.block:                                     ; preds = %vector.body
60  %7 = select <4 x i1> %1, <4 x i32> %5, <4 x i32> %vec.phi
61  %8 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %7)
62  br label %for.cond.cleanup
63
64for.cond.cleanup:                                 ; preds = %middle.block, %entry
65  %res.0.lcssa = phi i32 [ 0, %entry ], [ %8, %middle.block ]
66  ret i32 %res.0.lcssa
67}
68
69define arm_aapcs_vfpcc i32 @test_acc_scalar_short(i16 signext %a, ptr nocapture readonly %b, i32 %N) {
70; CHECK-LABEL: test_acc_scalar_short:
71; CHECK:       @ %bb.0: @ %entry
72; CHECK-NEXT:    cmp r2, #0
73; CHECK-NEXT:    itt eq
74; CHECK-NEXT:    moveq r0, #0
75; CHECK-NEXT:    bxeq lr
76; CHECK-NEXT:  .LBB1_1: @ %vector.ph
77; CHECK-NEXT:    push {r7, lr}
78; CHECK-NEXT:    adds r3, r2, #3
79; CHECK-NEXT:    vmov.i32 q0, #0x0
80; CHECK-NEXT:    bic r3, r3, #3
81; CHECK-NEXT:    sub.w r12, r3, #4
82; CHECK-NEXT:    movs r3, #1
83; CHECK-NEXT:    add.w r3, r3, r12, lsr #2
84; CHECK-NEXT:    dls lr, r3
85; CHECK-NEXT:  .LBB1_2: @ %vector.body
86; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
87; CHECK-NEXT:    vctp.32 r2
88; CHECK-NEXT:    subs r2, #4
89; CHECK-NEXT:    vpst
90; CHECK-NEXT:    vldrht.s32 q2, [r1], #8
91; CHECK-NEXT:    vmov q1, q0
92; CHECK-NEXT:    vmla.i32 q0, q2, r0
93; CHECK-NEXT:    le lr, .LBB1_2
94; CHECK-NEXT:  @ %bb.3: @ %middle.block
95; CHECK-NEXT:    vpsel q0, q0, q1
96; CHECK-NEXT:    vaddv.u32 r0, q0
97; CHECK-NEXT:    pop {r7, pc}
98entry:
99  %cmp7 = icmp eq i32 %N, 0
100  br i1 %cmp7, label %for.cond.cleanup, label %vector.ph
101
102vector.ph:                                        ; preds = %entry
103  %conv = sext i16 %a to i32
104  %n.rnd.up = add i32 %N, 3
105  %n.vec = and i32 %n.rnd.up, -4
106  %broadcast.splatinsert12 = insertelement <4 x i32> undef, i32 %conv, i32 0
107  %broadcast.splat13 = shufflevector <4 x i32> %broadcast.splatinsert12, <4 x i32> undef, <4 x i32> zeroinitializer
108  br label %vector.body
109
110vector.body:                                      ; preds = %vector.body, %vector.ph
111  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
112  %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %5, %vector.body ]
113  %0 = getelementptr inbounds i16, ptr %b, i32 %index
114  %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
115  %2 = bitcast ptr %0 to ptr
116  %wide.masked.load = call <4 x i16> @llvm.masked.load.v4i16.p0(ptr %2, i32 2, <4 x i1> %1, <4 x i16> undef)
117  %3 = sext <4 x i16> %wide.masked.load to <4 x i32>
118  %4 = mul nsw <4 x i32> %broadcast.splat13, %3
119  %5 = add nsw <4 x i32> %4, %vec.phi
120  %index.next = add i32 %index, 4
121  %6 = icmp eq i32 %index.next, %n.vec
122  br i1 %6, label %middle.block, label %vector.body
123
124middle.block:                                     ; preds = %vector.body
125  %7 = select <4 x i1> %1, <4 x i32> %5, <4 x i32> %vec.phi
126  %8 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %7)
127  br label %for.cond.cleanup
128
129for.cond.cleanup:                                 ; preds = %middle.block, %entry
130  %res.0.lcssa = phi i32 [ 0, %entry ], [ %8, %middle.block ]
131  ret i32 %res.0.lcssa
132}
133
134define arm_aapcs_vfpcc i32 @test_acc_scalar_uchar(i8 zeroext %a, ptr nocapture readonly %b, i32 %N) {
135; CHECK-LABEL: test_acc_scalar_uchar:
136; CHECK:       @ %bb.0: @ %entry
137; CHECK-NEXT:    cmp r2, #0
138; CHECK-NEXT:    itt eq
139; CHECK-NEXT:    moveq r0, #0
140; CHECK-NEXT:    bxeq lr
141; CHECK-NEXT:  .LBB2_1: @ %vector.ph
142; CHECK-NEXT:    push {r7, lr}
143; CHECK-NEXT:    adds r3, r2, #3
144; CHECK-NEXT:    vmov.i32 q0, #0x0
145; CHECK-NEXT:    bic r3, r3, #3
146; CHECK-NEXT:    sub.w r12, r3, #4
147; CHECK-NEXT:    movs r3, #1
148; CHECK-NEXT:    add.w r3, r3, r12, lsr #2
149; CHECK-NEXT:    dls lr, r3
150; CHECK-NEXT:  .LBB2_2: @ %vector.body
151; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
152; CHECK-NEXT:    vctp.32 r2
153; CHECK-NEXT:    subs r2, #4
154; CHECK-NEXT:    vpst
155; CHECK-NEXT:    vldrbt.u32 q2, [r1], #4
156; CHECK-NEXT:    vmov q1, q0
157; CHECK-NEXT:    vmla.i32 q0, q2, r0
158; CHECK-NEXT:    le lr, .LBB2_2
159; CHECK-NEXT:  @ %bb.3: @ %middle.block
160; CHECK-NEXT:    vpsel q0, q0, q1
161; CHECK-NEXT:    vaddv.u32 r0, q0
162; CHECK-NEXT:    pop {r7, pc}
163entry:
164  %cmp7 = icmp eq i32 %N, 0
165  br i1 %cmp7, label %for.cond.cleanup, label %vector.ph
166
167vector.ph:                                        ; preds = %entry
168  %conv = zext i8 %a to i32
169  %n.rnd.up = add i32 %N, 3
170  %n.vec = and i32 %n.rnd.up, -4
171  %broadcast.splatinsert12 = insertelement <4 x i32> undef, i32 %conv, i32 0
172  %broadcast.splat13 = shufflevector <4 x i32> %broadcast.splatinsert12, <4 x i32> undef, <4 x i32> zeroinitializer
173  br label %vector.body
174
175vector.body:                                      ; preds = %vector.body, %vector.ph
176  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
177  %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %5, %vector.body ]
178  %0 = getelementptr inbounds i8, ptr %b, i32 %index
179  %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
180  %2 = bitcast ptr %0 to ptr
181  %wide.masked.load = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %2, i32 1, <4 x i1> %1, <4 x i8> undef)
182  %3 = zext <4 x i8> %wide.masked.load to <4 x i32>
183  %4 = mul nuw nsw <4 x i32> %broadcast.splat13, %3
184  %5 = add nuw nsw <4 x i32> %4, %vec.phi
185  %index.next = add i32 %index, 4
186  %6 = icmp eq i32 %index.next, %n.vec
187  br i1 %6, label %middle.block, label %vector.body
188
189middle.block:                                     ; preds = %vector.body
190  %7 = select <4 x i1> %1, <4 x i32> %5, <4 x i32> %vec.phi
191  %8 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %7)
192  br label %for.cond.cleanup
193
194for.cond.cleanup:                                 ; preds = %middle.block, %entry
195  %res.0.lcssa = phi i32 [ 0, %entry ], [ %8, %middle.block ]
196  ret i32 %res.0.lcssa
197}
198
199define arm_aapcs_vfpcc i32 @test_acc_scalar_ushort(i16 signext %a, ptr nocapture readonly %b, i32 %N) {
200; CHECK-LABEL: test_acc_scalar_ushort:
201; CHECK:       @ %bb.0: @ %entry
202; CHECK-NEXT:    cmp r2, #0
203; CHECK-NEXT:    itt eq
204; CHECK-NEXT:    moveq r0, #0
205; CHECK-NEXT:    bxeq lr
206; CHECK-NEXT:  .LBB3_1: @ %vector.ph
207; CHECK-NEXT:    push {r7, lr}
208; CHECK-NEXT:    adds r3, r2, #3
209; CHECK-NEXT:    vmov.i32 q0, #0x0
210; CHECK-NEXT:    bic r3, r3, #3
211; CHECK-NEXT:    sub.w r12, r3, #4
212; CHECK-NEXT:    movs r3, #1
213; CHECK-NEXT:    add.w r3, r3, r12, lsr #2
214; CHECK-NEXT:    dls lr, r3
215; CHECK-NEXT:  .LBB3_2: @ %vector.body
216; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
217; CHECK-NEXT:    vctp.32 r2
218; CHECK-NEXT:    subs r2, #4
219; CHECK-NEXT:    vpst
220; CHECK-NEXT:    vldrht.u32 q2, [r1], #8
221; CHECK-NEXT:    vmov q1, q0
222; CHECK-NEXT:    vmla.i32 q0, q2, r0
223; CHECK-NEXT:    le lr, .LBB3_2
224; CHECK-NEXT:  @ %bb.3: @ %middle.block
225; CHECK-NEXT:    vpsel q0, q0, q1
226; CHECK-NEXT:    vaddv.u32 r0, q0
227; CHECK-NEXT:    pop {r7, pc}
228entry:
229  %cmp7 = icmp eq i32 %N, 0
230  br i1 %cmp7, label %for.cond.cleanup, label %vector.ph
231
232vector.ph:                                        ; preds = %entry
233  %conv = sext i16 %a to i32
234  %n.rnd.up = add i32 %N, 3
235  %n.vec = and i32 %n.rnd.up, -4
236  %broadcast.splatinsert12 = insertelement <4 x i32> undef, i32 %conv, i32 0
237  %broadcast.splat13 = shufflevector <4 x i32> %broadcast.splatinsert12, <4 x i32> undef, <4 x i32> zeroinitializer
238  br label %vector.body
239
240vector.body:                                      ; preds = %vector.body, %vector.ph
241  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
242  %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %5, %vector.body ]
243  %0 = getelementptr inbounds i16, ptr %b, i32 %index
244  %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
245  %2 = bitcast ptr %0 to ptr
246  %wide.masked.load = call <4 x i16> @llvm.masked.load.v4i16.p0(ptr %2, i32 2, <4 x i1> %1, <4 x i16> undef)
247  %3 = zext <4 x i16> %wide.masked.load to <4 x i32>
248  %4 = mul nsw <4 x i32> %broadcast.splat13, %3
249  %5 = add nsw <4 x i32> %4, %vec.phi
250  %index.next = add i32 %index, 4
251  %6 = icmp eq i32 %index.next, %n.vec
252  br i1 %6, label %middle.block, label %vector.body
253
254middle.block:                                     ; preds = %vector.body
255  %7 = select <4 x i1> %1, <4 x i32> %5, <4 x i32> %vec.phi
256  %8 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %7)
257  br label %for.cond.cleanup
258
259for.cond.cleanup:                                 ; preds = %middle.block, %entry
260  %res.0.lcssa = phi i32 [ 0, %entry ], [ %8, %middle.block ]
261  ret i32 %res.0.lcssa
262}
263
264define arm_aapcs_vfpcc i32 @test_acc_scalar_int(i32 %a, ptr nocapture readonly %b, i32 %N) {
265; CHECK-LABEL: test_acc_scalar_int:
266; CHECK:       @ %bb.0: @ %entry
267; CHECK-NEXT:    cmp r2, #0
268; CHECK-NEXT:    itt eq
269; CHECK-NEXT:    moveq r0, #0
270; CHECK-NEXT:    bxeq lr
271; CHECK-NEXT:  .LBB4_1: @ %vector.ph
272; CHECK-NEXT:    push {r7, lr}
273; CHECK-NEXT:    adds r3, r2, #3
274; CHECK-NEXT:    vmov.i32 q0, #0x0
275; CHECK-NEXT:    bic r3, r3, #3
276; CHECK-NEXT:    sub.w r12, r3, #4
277; CHECK-NEXT:    movs r3, #1
278; CHECK-NEXT:    add.w r3, r3, r12, lsr #2
279; CHECK-NEXT:    dls lr, r3
280; CHECK-NEXT:  .LBB4_2: @ %vector.body
281; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
282; CHECK-NEXT:    vctp.32 r2
283; CHECK-NEXT:    subs r2, #4
284; CHECK-NEXT:    vpst
285; CHECK-NEXT:    vldrwt.u32 q2, [r1], #16
286; CHECK-NEXT:    vmov q1, q0
287; CHECK-NEXT:    vmla.i32 q0, q2, r0
288; CHECK-NEXT:    le lr, .LBB4_2
289; CHECK-NEXT:  @ %bb.3: @ %middle.block
290; CHECK-NEXT:    vpsel q0, q0, q1
291; CHECK-NEXT:    vaddv.u32 r0, q0
292; CHECK-NEXT:    pop {r7, pc}
293entry:
294  %cmp6 = icmp eq i32 %N, 0
295  br i1 %cmp6, label %for.cond.cleanup, label %vector.ph
296
297vector.ph:                                        ; preds = %entry
298  %n.rnd.up = add i32 %N, 3
299  %n.vec = and i32 %n.rnd.up, -4
300  %broadcast.splatinsert11 = insertelement <4 x i32> undef, i32 %a, i32 0
301  %broadcast.splat12 = shufflevector <4 x i32> %broadcast.splatinsert11, <4 x i32> undef, <4 x i32> zeroinitializer
302  br label %vector.body
303
304vector.body:                                      ; preds = %vector.body, %vector.ph
305  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
306  %vec.phi = phi <4 x i32> [ zeroinitializer, %vector.ph ], [ %4, %vector.body ]
307  %0 = getelementptr inbounds i32, ptr %b, i32 %index
308  %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
309  %2 = bitcast ptr %0 to ptr
310  %wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %2, i32 4, <4 x i1> %1, <4 x i32> undef)
311  %3 = mul nsw <4 x i32> %wide.masked.load, %broadcast.splat12
312  %4 = add nsw <4 x i32> %3, %vec.phi
313  %index.next = add i32 %index, 4
314  %5 = icmp eq i32 %index.next, %n.vec
315  br i1 %5, label %middle.block, label %vector.body
316
317middle.block:                                     ; preds = %vector.body
318  %6 = select <4 x i1> %1, <4 x i32> %4, <4 x i32> %vec.phi
319  %7 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %6)
320  br label %for.cond.cleanup
321
322for.cond.cleanup:                                 ; preds = %middle.block, %entry
323  %res.0.lcssa = phi i32 [ 0, %entry ], [ %7, %middle.block ]
324  ret i32 %res.0.lcssa
325}
326
327define arm_aapcs_vfpcc void @test_vec_mul_scalar_add_char(ptr nocapture readonly %a, ptr nocapture readonly %b, i8 zeroext %c, ptr nocapture %res, i32 %N) {
328; CHECK-LABEL: test_vec_mul_scalar_add_char:
329; CHECK:       @ %bb.0: @ %entry
330; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, lr}
331; CHECK-NEXT:    ldr r4, [sp, #28]
332; CHECK-NEXT:    cmp r4, #0
333; CHECK-NEXT:    beq.w .LBB5_11
334; CHECK-NEXT:  @ %bb.1: @ %for.body.lr.ph
335; CHECK-NEXT:    adds r7, r1, r4
336; CHECK-NEXT:    add.w r6, r3, r4, lsl #2
337; CHECK-NEXT:    cmp r7, r3
338; CHECK-NEXT:    add.w r5, r0, r4
339; CHECK-NEXT:    cset r7, hi
340; CHECK-NEXT:    cmp r6, r1
341; CHECK-NEXT:    csel r7, zr, r7, ls
342; CHECK-NEXT:    cmp r6, r0
343; CHECK-NEXT:    cset r6, hi
344; CHECK-NEXT:    cmp r5, r3
345; CHECK-NEXT:    cset r5, hi
346; CHECK-NEXT:    tst r5, r6
347; CHECK-NEXT:    it eq
348; CHECK-NEXT:    cmpeq r7, #0
349; CHECK-NEXT:    beq .LBB5_4
350; CHECK-NEXT:  @ %bb.2: @ %for.body.preheader
351; CHECK-NEXT:    subs r7, r4, #1
352; CHECK-NEXT:    and r12, r4, #3
353; CHECK-NEXT:    cmp r7, #3
354; CHECK-NEXT:    bhs .LBB5_6
355; CHECK-NEXT:  @ %bb.3:
356; CHECK-NEXT:    mov.w r8, #0
357; CHECK-NEXT:    b .LBB5_8
358; CHECK-NEXT:  .LBB5_4: @ %vector.ph
359; CHECK-NEXT:    dlstp.32 lr, r4
360; CHECK-NEXT:  .LBB5_5: @ %vector.body
361; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
362; CHECK-NEXT:    vldrb.u32 q0, [r0], #4
363; CHECK-NEXT:    vldrb.u32 q1, [r1], #4
364; CHECK-NEXT:    vmlas.i32 q1, q0, r2
365; CHECK-NEXT:    vstrw.32 q1, [r3], #16
366; CHECK-NEXT:    letp lr, .LBB5_5
367; CHECK-NEXT:    b .LBB5_11
368; CHECK-NEXT:  .LBB5_6: @ %for.body.preheader.new
369; CHECK-NEXT:    bic r7, r4, #3
370; CHECK-NEXT:    movs r6, #1
371; CHECK-NEXT:    subs r7, #4
372; CHECK-NEXT:    add.w r5, r3, #8
373; CHECK-NEXT:    mov.w r8, #0
374; CHECK-NEXT:    add.w lr, r6, r7, lsr #2
375; CHECK-NEXT:    adds r6, r0, #3
376; CHECK-NEXT:    adds r7, r1, #1
377; CHECK-NEXT:  .LBB5_7: @ %for.body
378; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
379; CHECK-NEXT:    ldrb r9, [r6, #-3]
380; CHECK-NEXT:    add.w r8, r8, #4
381; CHECK-NEXT:    ldrb r4, [r7, #-1]
382; CHECK-NEXT:    smlabb r4, r4, r9, r2
383; CHECK-NEXT:    str r4, [r5, #-8]
384; CHECK-NEXT:    ldrb r9, [r6, #-2]
385; CHECK-NEXT:    ldrb r4, [r7], #4
386; CHECK-NEXT:    smlabb r4, r4, r9, r2
387; CHECK-NEXT:    str r4, [r5, #-4]
388; CHECK-NEXT:    ldrb r9, [r6, #-1]
389; CHECK-NEXT:    ldrb r4, [r7, #-3]
390; CHECK-NEXT:    smlabb r4, r4, r9, r2
391; CHECK-NEXT:    str r4, [r5]
392; CHECK-NEXT:    ldrb r9, [r6], #4
393; CHECK-NEXT:    ldrb r4, [r7, #-2]
394; CHECK-NEXT:    smlabb r4, r4, r9, r2
395; CHECK-NEXT:    str r4, [r5, #4]
396; CHECK-NEXT:    adds r5, #16
397; CHECK-NEXT:    le lr, .LBB5_7
398; CHECK-NEXT:  .LBB5_8: @ %for.cond.cleanup.loopexit.unr-lcssa
399; CHECK-NEXT:    wls lr, r12, .LBB5_11
400; CHECK-NEXT:  @ %bb.9: @ %for.body.epil.preheader
401; CHECK-NEXT:    add r0, r8
402; CHECK-NEXT:    add r1, r8
403; CHECK-NEXT:    add.w r3, r3, r8, lsl #2
404; CHECK-NEXT:  .LBB5_10: @ %for.body.epil
405; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
406; CHECK-NEXT:    ldrb r7, [r0], #1
407; CHECK-NEXT:    ldrb r6, [r1], #1
408; CHECK-NEXT:    smlabb r7, r6, r7, r2
409; CHECK-NEXT:    str r7, [r3], #4
410; CHECK-NEXT:    le lr, .LBB5_10
411; CHECK-NEXT:  .LBB5_11: @ %for.cond.cleanup
412; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, pc}
413entry:
414  %res12 = bitcast ptr %res to ptr
415  %cmp10 = icmp eq i32 %N, 0
416  br i1 %cmp10, label %for.cond.cleanup, label %for.body.lr.ph
417
418for.body.lr.ph:                                   ; preds = %entry
419  %conv3 = zext i8 %c to i32
420  %scevgep = getelementptr i32, ptr %res, i32 %N
421  %scevgep13 = bitcast ptr %scevgep to ptr
422  %scevgep14 = getelementptr i8, ptr %a, i32 %N
423  %scevgep15 = getelementptr i8, ptr %b, i32 %N
424  %bound0 = icmp ugt ptr %scevgep14, %res12
425  %bound1 = icmp ugt ptr %scevgep13, %a
426  %found.conflict = and i1 %bound0, %bound1
427  %bound016 = icmp ugt ptr %scevgep15, %res12
428  %bound117 = icmp ugt ptr %scevgep13, %b
429  %found.conflict18 = and i1 %bound016, %bound117
430  %conflict.rdx = or i1 %found.conflict, %found.conflict18
431  br i1 %conflict.rdx, label %for.body.preheader, label %vector.ph
432
433for.body.preheader:                               ; preds = %for.body.lr.ph
434  %0 = add i32 %N, -1
435  %xtraiter = and i32 %N, 3
436  %1 = icmp ult i32 %0, 3
437  br i1 %1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new
438
439for.body.preheader.new:                           ; preds = %for.body.preheader
440  %unroll_iter = sub i32 %N, %xtraiter
441  br label %for.body
442
443vector.ph:                                        ; preds = %for.body.lr.ph
444  %n.rnd.up = add i32 %N, 3
445  %n.vec = and i32 %n.rnd.up, -4
446  %broadcast.splatinsert22 = insertelement <4 x i32> undef, i32 %conv3, i32 0
447  %broadcast.splat23 = shufflevector <4 x i32> %broadcast.splatinsert22, <4 x i32> undef, <4 x i32> zeroinitializer
448  br label %vector.body
449
450vector.body:                                      ; preds = %vector.body, %vector.ph
451  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
452  %2 = getelementptr inbounds i8, ptr %a, i32 %index
453  %3 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
454  %4 = bitcast ptr %2 to ptr
455  %wide.masked.load = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %4, i32 1, <4 x i1> %3, <4 x i8> undef)
456  %5 = zext <4 x i8> %wide.masked.load to <4 x i32>
457  %6 = getelementptr inbounds i8, ptr %b, i32 %index
458  %7 = bitcast ptr %6 to ptr
459  %wide.masked.load21 = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %7, i32 1, <4 x i1> %3, <4 x i8> undef)
460  %8 = zext <4 x i8> %wide.masked.load21 to <4 x i32>
461  %9 = mul nuw nsw <4 x i32> %8, %5
462  %10 = add nuw nsw <4 x i32> %9, %broadcast.splat23
463  %11 = getelementptr inbounds i32, ptr %res, i32 %index
464  %12 = bitcast ptr %11 to ptr
465  call void @llvm.masked.store.v4i32.p0(<4 x i32> %10, ptr %12, i32 4, <4 x i1> %3)
466  %index.next = add i32 %index, 4
467  %13 = icmp eq i32 %index.next, %n.vec
468  br i1 %13, label %for.cond.cleanup, label %vector.body
469
470for.cond.cleanup.loopexit.unr-lcssa:              ; preds = %for.body, %for.body.preheader
471  %i.011.unr = phi i32 [ 0, %for.body.preheader ], [ %inc.3, %for.body ]
472  %lcmp.mod = icmp eq i32 %xtraiter, 0
473  br i1 %lcmp.mod, label %for.cond.cleanup, label %for.body.epil
474
475for.body.epil:                                    ; preds = %for.cond.cleanup.loopexit.unr-lcssa, %for.body.epil
476  %i.011.epil = phi i32 [ %inc.epil, %for.body.epil ], [ %i.011.unr, %for.cond.cleanup.loopexit.unr-lcssa ]
477  %epil.iter = phi i32 [ %epil.iter.sub, %for.body.epil ], [ %xtraiter, %for.cond.cleanup.loopexit.unr-lcssa ]
478  %arrayidx.epil = getelementptr inbounds i8, ptr %a, i32 %i.011.epil
479  %14 = load i8, ptr %arrayidx.epil, align 1
480  %conv.epil = zext i8 %14 to i32
481  %arrayidx1.epil = getelementptr inbounds i8, ptr %b, i32 %i.011.epil
482  %15 = load i8, ptr %arrayidx1.epil, align 1
483  %conv2.epil = zext i8 %15 to i32
484  %mul.epil = mul nuw nsw i32 %conv2.epil, %conv.epil
485  %add.epil = add nuw nsw i32 %mul.epil, %conv3
486  %arrayidx4.epil = getelementptr inbounds i32, ptr %res, i32 %i.011.epil
487  store i32 %add.epil, ptr %arrayidx4.epil, align 4
488  %inc.epil = add nuw i32 %i.011.epil, 1
489  %epil.iter.sub = add i32 %epil.iter, -1
490  %epil.iter.cmp = icmp eq i32 %epil.iter.sub, 0
491  br i1 %epil.iter.cmp, label %for.cond.cleanup, label %for.body.epil
492
493for.cond.cleanup:                                 ; preds = %vector.body, %for.cond.cleanup.loopexit.unr-lcssa, %for.body.epil, %entry
494  ret void
495
496for.body:                                         ; preds = %for.body, %for.body.preheader.new
497  %i.011 = phi i32 [ 0, %for.body.preheader.new ], [ %inc.3, %for.body ]
498  %niter = phi i32 [ %unroll_iter, %for.body.preheader.new ], [ %niter.nsub.3, %for.body ]
499  %arrayidx = getelementptr inbounds i8, ptr %a, i32 %i.011
500  %16 = load i8, ptr %arrayidx, align 1
501  %conv = zext i8 %16 to i32
502  %arrayidx1 = getelementptr inbounds i8, ptr %b, i32 %i.011
503  %17 = load i8, ptr %arrayidx1, align 1
504  %conv2 = zext i8 %17 to i32
505  %mul = mul nuw nsw i32 %conv2, %conv
506  %add = add nuw nsw i32 %mul, %conv3
507  %arrayidx4 = getelementptr inbounds i32, ptr %res, i32 %i.011
508  store i32 %add, ptr %arrayidx4, align 4
509  %inc = or disjoint i32 %i.011, 1
510  %arrayidx.1 = getelementptr inbounds i8, ptr %a, i32 %inc
511  %18 = load i8, ptr %arrayidx.1, align 1
512  %conv.1 = zext i8 %18 to i32
513  %arrayidx1.1 = getelementptr inbounds i8, ptr %b, i32 %inc
514  %19 = load i8, ptr %arrayidx1.1, align 1
515  %conv2.1 = zext i8 %19 to i32
516  %mul.1 = mul nuw nsw i32 %conv2.1, %conv.1
517  %add.1 = add nuw nsw i32 %mul.1, %conv3
518  %arrayidx4.1 = getelementptr inbounds i32, ptr %res, i32 %inc
519  store i32 %add.1, ptr %arrayidx4.1, align 4
520  %inc.1 = or disjoint i32 %i.011, 2
521  %arrayidx.2 = getelementptr inbounds i8, ptr %a, i32 %inc.1
522  %20 = load i8, ptr %arrayidx.2, align 1
523  %conv.2 = zext i8 %20 to i32
524  %arrayidx1.2 = getelementptr inbounds i8, ptr %b, i32 %inc.1
525  %21 = load i8, ptr %arrayidx1.2, align 1
526  %conv2.2 = zext i8 %21 to i32
527  %mul.2 = mul nuw nsw i32 %conv2.2, %conv.2
528  %add.2 = add nuw nsw i32 %mul.2, %conv3
529  %arrayidx4.2 = getelementptr inbounds i32, ptr %res, i32 %inc.1
530  store i32 %add.2, ptr %arrayidx4.2, align 4
531  %inc.2 = or disjoint i32 %i.011, 3
532  %arrayidx.3 = getelementptr inbounds i8, ptr %a, i32 %inc.2
533  %22 = load i8, ptr %arrayidx.3, align 1
534  %conv.3 = zext i8 %22 to i32
535  %arrayidx1.3 = getelementptr inbounds i8, ptr %b, i32 %inc.2
536  %23 = load i8, ptr %arrayidx1.3, align 1
537  %conv2.3 = zext i8 %23 to i32
538  %mul.3 = mul nuw nsw i32 %conv2.3, %conv.3
539  %add.3 = add nuw nsw i32 %mul.3, %conv3
540  %arrayidx4.3 = getelementptr inbounds i32, ptr %res, i32 %inc.2
541  store i32 %add.3, ptr %arrayidx4.3, align 4
542  %inc.3 = add nuw i32 %i.011, 4
543  %niter.nsub.3 = add i32 %niter, -4
544  %niter.ncmp.3 = icmp eq i32 %niter.nsub.3, 0
545  br i1 %niter.ncmp.3, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body
546}
547
548define arm_aapcs_vfpcc void @test_vec_mul_scalar_add_short(ptr nocapture readonly %a, ptr nocapture readonly %b, i16 signext %c, ptr nocapture %res, i32 %N) {
549; CHECK-LABEL: test_vec_mul_scalar_add_short:
550; CHECK:       @ %bb.0: @ %entry
551; CHECK-NEXT:    push {r4, lr}
552; CHECK-NEXT:    ldr.w r12, [sp, #8]
553; CHECK-NEXT:    cmp.w r12, #0
554; CHECK-NEXT:    it eq
555; CHECK-NEXT:    popeq {r4, pc}
556; CHECK-NEXT:  .LBB6_1: @ %vector.ph
557; CHECK-NEXT:    dlstp.32 lr, r12
558; CHECK-NEXT:  .LBB6_2: @ %vector.body
559; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
560; CHECK-NEXT:    vldrh.s32 q0, [r0], #8
561; CHECK-NEXT:    vldrh.s32 q1, [r1], #8
562; CHECK-NEXT:    vmlas.i32 q1, q0, r2
563; CHECK-NEXT:    vstrw.32 q1, [r3], #16
564; CHECK-NEXT:    letp lr, .LBB6_2
565; CHECK-NEXT:  @ %bb.3: @ %for.cond.cleanup
566; CHECK-NEXT:    pop {r4, pc}
567entry:
568  %cmp10 = icmp eq i32 %N, 0
569  br i1 %cmp10, label %for.cond.cleanup, label %vector.ph
570
571vector.ph:                                        ; preds = %entry
572  %conv3 = sext i16 %c to i32
573  %n.rnd.up = add i32 %N, 3
574  %n.vec = and i32 %n.rnd.up, -4
575  %broadcast.splatinsert15 = insertelement <4 x i32> undef, i32 %conv3, i32 0
576  %broadcast.splat16 = shufflevector <4 x i32> %broadcast.splatinsert15, <4 x i32> undef, <4 x i32> zeroinitializer
577  br label %vector.body
578
579vector.body:                                      ; preds = %vector.body, %vector.ph
580  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
581  %0 = getelementptr inbounds i16, ptr %a, i32 %index
582  %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
583  %2 = bitcast ptr %0 to ptr
584  %wide.masked.load = call <4 x i16> @llvm.masked.load.v4i16.p0(ptr %2, i32 2, <4 x i1> %1, <4 x i16> undef)
585  %3 = sext <4 x i16> %wide.masked.load to <4 x i32>
586  %4 = getelementptr inbounds i16, ptr %b, i32 %index
587  %5 = bitcast ptr %4 to ptr
588  %wide.masked.load14 = call <4 x i16> @llvm.masked.load.v4i16.p0(ptr %5, i32 2, <4 x i1> %1, <4 x i16> undef)
589  %6 = sext <4 x i16> %wide.masked.load14 to <4 x i32>
590  %7 = mul nsw <4 x i32> %6, %3
591  %8 = add nsw <4 x i32> %7, %broadcast.splat16
592  %9 = getelementptr inbounds i32, ptr %res, i32 %index
593  %10 = bitcast ptr %9 to ptr
594  call void @llvm.masked.store.v4i32.p0(<4 x i32> %8, ptr %10, i32 4, <4 x i1> %1)
595  %index.next = add i32 %index, 4
596  %11 = icmp eq i32 %index.next, %n.vec
597  br i1 %11, label %for.cond.cleanup, label %vector.body
598
599for.cond.cleanup:                                 ; preds = %vector.body, %entry
600  ret void
601}
602
603define arm_aapcs_vfpcc void @test_vec_mul_scalar_add_uchar(ptr nocapture readonly %a, ptr nocapture readonly %b, i8 zeroext %c, ptr nocapture %res, i32 %N) {
604; CHECK-LABEL: test_vec_mul_scalar_add_uchar:
605; CHECK:       @ %bb.0: @ %entry
606; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, lr}
607; CHECK-NEXT:    ldr r4, [sp, #28]
608; CHECK-NEXT:    cmp r4, #0
609; CHECK-NEXT:    beq.w .LBB7_11
610; CHECK-NEXT:  @ %bb.1: @ %for.body.lr.ph
611; CHECK-NEXT:    adds r7, r1, r4
612; CHECK-NEXT:    add.w r6, r3, r4, lsl #2
613; CHECK-NEXT:    cmp r7, r3
614; CHECK-NEXT:    add.w r5, r0, r4
615; CHECK-NEXT:    cset r7, hi
616; CHECK-NEXT:    cmp r6, r1
617; CHECK-NEXT:    csel r7, zr, r7, ls
618; CHECK-NEXT:    cmp r6, r0
619; CHECK-NEXT:    cset r6, hi
620; CHECK-NEXT:    cmp r5, r3
621; CHECK-NEXT:    cset r5, hi
622; CHECK-NEXT:    tst r5, r6
623; CHECK-NEXT:    it eq
624; CHECK-NEXT:    cmpeq r7, #0
625; CHECK-NEXT:    beq .LBB7_4
626; CHECK-NEXT:  @ %bb.2: @ %for.body.preheader
627; CHECK-NEXT:    subs r7, r4, #1
628; CHECK-NEXT:    and r12, r4, #3
629; CHECK-NEXT:    cmp r7, #3
630; CHECK-NEXT:    bhs .LBB7_6
631; CHECK-NEXT:  @ %bb.3:
632; CHECK-NEXT:    mov.w r8, #0
633; CHECK-NEXT:    b .LBB7_8
634; CHECK-NEXT:  .LBB7_4: @ %vector.ph
635; CHECK-NEXT:    dlstp.32 lr, r4
636; CHECK-NEXT:  .LBB7_5: @ %vector.body
637; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
638; CHECK-NEXT:    vldrb.u32 q0, [r0], #4
639; CHECK-NEXT:    vldrb.u32 q1, [r1], #4
640; CHECK-NEXT:    vmlas.i32 q1, q0, r2
641; CHECK-NEXT:    vstrw.32 q1, [r3], #16
642; CHECK-NEXT:    letp lr, .LBB7_5
643; CHECK-NEXT:    b .LBB7_11
644; CHECK-NEXT:  .LBB7_6: @ %for.body.preheader.new
645; CHECK-NEXT:    bic r7, r4, #3
646; CHECK-NEXT:    movs r6, #1
647; CHECK-NEXT:    subs r7, #4
648; CHECK-NEXT:    add.w r5, r3, #8
649; CHECK-NEXT:    mov.w r8, #0
650; CHECK-NEXT:    add.w lr, r6, r7, lsr #2
651; CHECK-NEXT:    adds r6, r0, #3
652; CHECK-NEXT:    adds r7, r1, #1
653; CHECK-NEXT:  .LBB7_7: @ %for.body
654; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
655; CHECK-NEXT:    ldrb r9, [r6, #-3]
656; CHECK-NEXT:    add.w r8, r8, #4
657; CHECK-NEXT:    ldrb r4, [r7, #-1]
658; CHECK-NEXT:    smlabb r4, r4, r9, r2
659; CHECK-NEXT:    str r4, [r5, #-8]
660; CHECK-NEXT:    ldrb r9, [r6, #-2]
661; CHECK-NEXT:    ldrb r4, [r7], #4
662; CHECK-NEXT:    smlabb r4, r4, r9, r2
663; CHECK-NEXT:    str r4, [r5, #-4]
664; CHECK-NEXT:    ldrb r9, [r6, #-1]
665; CHECK-NEXT:    ldrb r4, [r7, #-3]
666; CHECK-NEXT:    smlabb r4, r4, r9, r2
667; CHECK-NEXT:    str r4, [r5]
668; CHECK-NEXT:    ldrb r9, [r6], #4
669; CHECK-NEXT:    ldrb r4, [r7, #-2]
670; CHECK-NEXT:    smlabb r4, r4, r9, r2
671; CHECK-NEXT:    str r4, [r5, #4]
672; CHECK-NEXT:    adds r5, #16
673; CHECK-NEXT:    le lr, .LBB7_7
674; CHECK-NEXT:  .LBB7_8: @ %for.cond.cleanup.loopexit.unr-lcssa
675; CHECK-NEXT:    wls lr, r12, .LBB7_11
676; CHECK-NEXT:  @ %bb.9: @ %for.body.epil.preheader
677; CHECK-NEXT:    add r0, r8
678; CHECK-NEXT:    add r1, r8
679; CHECK-NEXT:    add.w r3, r3, r8, lsl #2
680; CHECK-NEXT:  .LBB7_10: @ %for.body.epil
681; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
682; CHECK-NEXT:    ldrb r7, [r0], #1
683; CHECK-NEXT:    ldrb r6, [r1], #1
684; CHECK-NEXT:    smlabb r7, r6, r7, r2
685; CHECK-NEXT:    str r7, [r3], #4
686; CHECK-NEXT:    le lr, .LBB7_10
687; CHECK-NEXT:  .LBB7_11: @ %for.cond.cleanup
688; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, pc}
689entry:
690  %res12 = bitcast ptr %res to ptr
691  %cmp10 = icmp eq i32 %N, 0
692  br i1 %cmp10, label %for.cond.cleanup, label %for.body.lr.ph
693
694for.body.lr.ph:                                   ; preds = %entry
695  %conv3 = zext i8 %c to i32
696  %scevgep = getelementptr i32, ptr %res, i32 %N
697  %scevgep13 = bitcast ptr %scevgep to ptr
698  %scevgep14 = getelementptr i8, ptr %a, i32 %N
699  %scevgep15 = getelementptr i8, ptr %b, i32 %N
700  %bound0 = icmp ugt ptr %scevgep14, %res12
701  %bound1 = icmp ugt ptr %scevgep13, %a
702  %found.conflict = and i1 %bound0, %bound1
703  %bound016 = icmp ugt ptr %scevgep15, %res12
704  %bound117 = icmp ugt ptr %scevgep13, %b
705  %found.conflict18 = and i1 %bound016, %bound117
706  %conflict.rdx = or i1 %found.conflict, %found.conflict18
707  br i1 %conflict.rdx, label %for.body.preheader, label %vector.ph
708
709for.body.preheader:                               ; preds = %for.body.lr.ph
710  %0 = add i32 %N, -1
711  %xtraiter = and i32 %N, 3
712  %1 = icmp ult i32 %0, 3
713  br i1 %1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new
714
715for.body.preheader.new:                           ; preds = %for.body.preheader
716  %unroll_iter = sub i32 %N, %xtraiter
717  br label %for.body
718
719vector.ph:                                        ; preds = %for.body.lr.ph
720  %n.rnd.up = add i32 %N, 3
721  %n.vec = and i32 %n.rnd.up, -4
722  %broadcast.splatinsert22 = insertelement <4 x i32> undef, i32 %conv3, i32 0
723  %broadcast.splat23 = shufflevector <4 x i32> %broadcast.splatinsert22, <4 x i32> undef, <4 x i32> zeroinitializer
724  br label %vector.body
725
726vector.body:                                      ; preds = %vector.body, %vector.ph
727  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
728  %2 = getelementptr inbounds i8, ptr %a, i32 %index
729  %3 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
730  %4 = bitcast ptr %2 to ptr
731  %wide.masked.load = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %4, i32 1, <4 x i1> %3, <4 x i8> undef)
732  %5 = zext <4 x i8> %wide.masked.load to <4 x i32>
733  %6 = getelementptr inbounds i8, ptr %b, i32 %index
734  %7 = bitcast ptr %6 to ptr
735  %wide.masked.load21 = call <4 x i8> @llvm.masked.load.v4i8.p0(ptr %7, i32 1, <4 x i1> %3, <4 x i8> undef)
736  %8 = zext <4 x i8> %wide.masked.load21 to <4 x i32>
737  %9 = mul nuw nsw <4 x i32> %8, %5
738  %10 = add nuw nsw <4 x i32> %9, %broadcast.splat23
739  %11 = getelementptr inbounds i32, ptr %res, i32 %index
740  %12 = bitcast ptr %11 to ptr
741  call void @llvm.masked.store.v4i32.p0(<4 x i32> %10, ptr %12, i32 4, <4 x i1> %3)
742  %index.next = add i32 %index, 4
743  %13 = icmp eq i32 %index.next, %n.vec
744  br i1 %13, label %for.cond.cleanup, label %vector.body
745
746for.cond.cleanup.loopexit.unr-lcssa:              ; preds = %for.body, %for.body.preheader
747  %i.011.unr = phi i32 [ 0, %for.body.preheader ], [ %inc.3, %for.body ]
748  %lcmp.mod = icmp eq i32 %xtraiter, 0
749  br i1 %lcmp.mod, label %for.cond.cleanup, label %for.body.epil
750
751for.body.epil:                                    ; preds = %for.cond.cleanup.loopexit.unr-lcssa, %for.body.epil
752  %i.011.epil = phi i32 [ %inc.epil, %for.body.epil ], [ %i.011.unr, %for.cond.cleanup.loopexit.unr-lcssa ]
753  %epil.iter = phi i32 [ %epil.iter.sub, %for.body.epil ], [ %xtraiter, %for.cond.cleanup.loopexit.unr-lcssa ]
754  %arrayidx.epil = getelementptr inbounds i8, ptr %a, i32 %i.011.epil
755  %14 = load i8, ptr %arrayidx.epil, align 1
756  %conv.epil = zext i8 %14 to i32
757  %arrayidx1.epil = getelementptr inbounds i8, ptr %b, i32 %i.011.epil
758  %15 = load i8, ptr %arrayidx1.epil, align 1
759  %conv2.epil = zext i8 %15 to i32
760  %mul.epil = mul nuw nsw i32 %conv2.epil, %conv.epil
761  %add.epil = add nuw nsw i32 %mul.epil, %conv3
762  %arrayidx4.epil = getelementptr inbounds i32, ptr %res, i32 %i.011.epil
763  store i32 %add.epil, ptr %arrayidx4.epil, align 4
764  %inc.epil = add nuw i32 %i.011.epil, 1
765  %epil.iter.sub = add i32 %epil.iter, -1
766  %epil.iter.cmp = icmp eq i32 %epil.iter.sub, 0
767  br i1 %epil.iter.cmp, label %for.cond.cleanup, label %for.body.epil
768
769for.cond.cleanup:                                 ; preds = %vector.body, %for.cond.cleanup.loopexit.unr-lcssa, %for.body.epil, %entry
770  ret void
771
772for.body:                                         ; preds = %for.body, %for.body.preheader.new
773  %i.011 = phi i32 [ 0, %for.body.preheader.new ], [ %inc.3, %for.body ]
774  %niter = phi i32 [ %unroll_iter, %for.body.preheader.new ], [ %niter.nsub.3, %for.body ]
775  %arrayidx = getelementptr inbounds i8, ptr %a, i32 %i.011
776  %16 = load i8, ptr %arrayidx, align 1
777  %conv = zext i8 %16 to i32
778  %arrayidx1 = getelementptr inbounds i8, ptr %b, i32 %i.011
779  %17 = load i8, ptr %arrayidx1, align 1
780  %conv2 = zext i8 %17 to i32
781  %mul = mul nuw nsw i32 %conv2, %conv
782  %add = add nuw nsw i32 %mul, %conv3
783  %arrayidx4 = getelementptr inbounds i32, ptr %res, i32 %i.011
784  store i32 %add, ptr %arrayidx4, align 4
785  %inc = or disjoint i32 %i.011, 1
786  %arrayidx.1 = getelementptr inbounds i8, ptr %a, i32 %inc
787  %18 = load i8, ptr %arrayidx.1, align 1
788  %conv.1 = zext i8 %18 to i32
789  %arrayidx1.1 = getelementptr inbounds i8, ptr %b, i32 %inc
790  %19 = load i8, ptr %arrayidx1.1, align 1
791  %conv2.1 = zext i8 %19 to i32
792  %mul.1 = mul nuw nsw i32 %conv2.1, %conv.1
793  %add.1 = add nuw nsw i32 %mul.1, %conv3
794  %arrayidx4.1 = getelementptr inbounds i32, ptr %res, i32 %inc
795  store i32 %add.1, ptr %arrayidx4.1, align 4
796  %inc.1 = or disjoint i32 %i.011, 2
797  %arrayidx.2 = getelementptr inbounds i8, ptr %a, i32 %inc.1
798  %20 = load i8, ptr %arrayidx.2, align 1
799  %conv.2 = zext i8 %20 to i32
800  %arrayidx1.2 = getelementptr inbounds i8, ptr %b, i32 %inc.1
801  %21 = load i8, ptr %arrayidx1.2, align 1
802  %conv2.2 = zext i8 %21 to i32
803  %mul.2 = mul nuw nsw i32 %conv2.2, %conv.2
804  %add.2 = add nuw nsw i32 %mul.2, %conv3
805  %arrayidx4.2 = getelementptr inbounds i32, ptr %res, i32 %inc.1
806  store i32 %add.2, ptr %arrayidx4.2, align 4
807  %inc.2 = or disjoint i32 %i.011, 3
808  %arrayidx.3 = getelementptr inbounds i8, ptr %a, i32 %inc.2
809  %22 = load i8, ptr %arrayidx.3, align 1
810  %conv.3 = zext i8 %22 to i32
811  %arrayidx1.3 = getelementptr inbounds i8, ptr %b, i32 %inc.2
812  %23 = load i8, ptr %arrayidx1.3, align 1
813  %conv2.3 = zext i8 %23 to i32
814  %mul.3 = mul nuw nsw i32 %conv2.3, %conv.3
815  %add.3 = add nuw nsw i32 %mul.3, %conv3
816  %arrayidx4.3 = getelementptr inbounds i32, ptr %res, i32 %inc.2
817  store i32 %add.3, ptr %arrayidx4.3, align 4
818  %inc.3 = add nuw i32 %i.011, 4
819  %niter.nsub.3 = add i32 %niter, -4
820  %niter.ncmp.3 = icmp eq i32 %niter.nsub.3, 0
821  br i1 %niter.ncmp.3, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body
822}
823
824define arm_aapcs_vfpcc void @test_vec_mul_scalar_add_ushort(ptr nocapture readonly %a, ptr nocapture readonly %b, i16 signext %c, ptr nocapture %res, i32 %N) {
825; CHECK-LABEL: test_vec_mul_scalar_add_ushort:
826; CHECK:       @ %bb.0: @ %entry
827; CHECK-NEXT:    push {r4, lr}
828; CHECK-NEXT:    ldr.w r12, [sp, #8]
829; CHECK-NEXT:    cmp.w r12, #0
830; CHECK-NEXT:    it eq
831; CHECK-NEXT:    popeq {r4, pc}
832; CHECK-NEXT:  .LBB8_1: @ %vector.ph
833; CHECK-NEXT:    dlstp.32 lr, r12
834; CHECK-NEXT:  .LBB8_2: @ %vector.body
835; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
836; CHECK-NEXT:    vldrh.u32 q0, [r0], #8
837; CHECK-NEXT:    vldrh.u32 q1, [r1], #8
838; CHECK-NEXT:    vmlas.i32 q1, q0, r2
839; CHECK-NEXT:    vstrw.32 q1, [r3], #16
840; CHECK-NEXT:    letp lr, .LBB8_2
841; CHECK-NEXT:  @ %bb.3: @ %for.cond.cleanup
842; CHECK-NEXT:    pop {r4, pc}
843entry:
844  %cmp10 = icmp eq i32 %N, 0
845  br i1 %cmp10, label %for.cond.cleanup, label %vector.ph
846
847vector.ph:                                        ; preds = %entry
848  %conv3 = sext i16 %c to i32
849  %n.rnd.up = add i32 %N, 3
850  %n.vec = and i32 %n.rnd.up, -4
851  %broadcast.splatinsert15 = insertelement <4 x i32> undef, i32 %conv3, i32 0
852  %broadcast.splat16 = shufflevector <4 x i32> %broadcast.splatinsert15, <4 x i32> undef, <4 x i32> zeroinitializer
853  br label %vector.body
854
855vector.body:                                      ; preds = %vector.body, %vector.ph
856  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
857  %0 = getelementptr inbounds i16, ptr %a, i32 %index
858  %1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
859  %2 = bitcast ptr %0 to ptr
860  %wide.masked.load = call <4 x i16> @llvm.masked.load.v4i16.p0(ptr %2, i32 2, <4 x i1> %1, <4 x i16> undef)
861  %3 = zext <4 x i16> %wide.masked.load to <4 x i32>
862  %4 = getelementptr inbounds i16, ptr %b, i32 %index
863  %5 = bitcast ptr %4 to ptr
864  %wide.masked.load14 = call <4 x i16> @llvm.masked.load.v4i16.p0(ptr %5, i32 2, <4 x i1> %1, <4 x i16> undef)
865  %6 = zext <4 x i16> %wide.masked.load14 to <4 x i32>
866  %7 = mul nuw nsw <4 x i32> %6, %3
867  %8 = add nsw <4 x i32> %7, %broadcast.splat16
868  %9 = getelementptr inbounds i32, ptr %res, i32 %index
869  %10 = bitcast ptr %9 to ptr
870  call void @llvm.masked.store.v4i32.p0(<4 x i32> %8, ptr %10, i32 4, <4 x i1> %1)
871  %index.next = add i32 %index, 4
872  %11 = icmp eq i32 %index.next, %n.vec
873  br i1 %11, label %for.cond.cleanup, label %vector.body
874
875for.cond.cleanup:                                 ; preds = %vector.body, %entry
876  ret void
877}
878
879define arm_aapcs_vfpcc void @test_vec_mul_scalar_add_int(ptr nocapture readonly %a, ptr nocapture readonly %b, i32 %c, ptr nocapture %res, i32 %N) {
880; CHECK-LABEL: test_vec_mul_scalar_add_int:
881; CHECK:       @ %bb.0: @ %entry
882; CHECK-NEXT:    push.w {r4, r5, r6, r7, r8, r9, lr}
883; CHECK-NEXT:    ldr r4, [sp, #28]
884; CHECK-NEXT:    cmp r4, #0
885; CHECK-NEXT:    beq.w .LBB9_11
886; CHECK-NEXT:  @ %bb.1: @ %vector.memcheck
887; CHECK-NEXT:    add.w r7, r1, r4, lsl #2
888; CHECK-NEXT:    add.w r6, r3, r4, lsl #2
889; CHECK-NEXT:    cmp r7, r3
890; CHECK-NEXT:    add.w r5, r0, r4, lsl #2
891; CHECK-NEXT:    cset r7, hi
892; CHECK-NEXT:    cmp r6, r1
893; CHECK-NEXT:    csel r7, zr, r7, ls
894; CHECK-NEXT:    cmp r6, r0
895; CHECK-NEXT:    cset r6, hi
896; CHECK-NEXT:    cmp r5, r3
897; CHECK-NEXT:    cset r5, hi
898; CHECK-NEXT:    tst r5, r6
899; CHECK-NEXT:    it eq
900; CHECK-NEXT:    cmpeq r7, #0
901; CHECK-NEXT:    beq .LBB9_4
902; CHECK-NEXT:  @ %bb.2: @ %for.body.preheader
903; CHECK-NEXT:    subs r7, r4, #1
904; CHECK-NEXT:    and r12, r4, #3
905; CHECK-NEXT:    cmp r7, #3
906; CHECK-NEXT:    bhs .LBB9_6
907; CHECK-NEXT:  @ %bb.3:
908; CHECK-NEXT:    mov.w r8, #0
909; CHECK-NEXT:    b .LBB9_8
910; CHECK-NEXT:  .LBB9_4: @ %vector.ph
911; CHECK-NEXT:    dlstp.32 lr, r4
912; CHECK-NEXT:  .LBB9_5: @ %vector.body
913; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
914; CHECK-NEXT:    vldrw.u32 q0, [r0], #16
915; CHECK-NEXT:    vldrw.u32 q1, [r1], #16
916; CHECK-NEXT:    vmlas.i32 q1, q0, r2
917; CHECK-NEXT:    vstrw.32 q1, [r3], #16
918; CHECK-NEXT:    letp lr, .LBB9_5
919; CHECK-NEXT:    b .LBB9_11
920; CHECK-NEXT:  .LBB9_6: @ %for.body.preheader.new
921; CHECK-NEXT:    bic r7, r4, #3
922; CHECK-NEXT:    movs r6, #1
923; CHECK-NEXT:    subs r7, #4
924; CHECK-NEXT:    add.w r5, r3, #8
925; CHECK-NEXT:    mov.w r8, #0
926; CHECK-NEXT:    add.w lr, r6, r7, lsr #2
927; CHECK-NEXT:    add.w r6, r0, #8
928; CHECK-NEXT:    add.w r7, r1, #8
929; CHECK-NEXT:  .LBB9_7: @ %for.body
930; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
931; CHECK-NEXT:    ldr r9, [r6, #-8]
932; CHECK-NEXT:    add.w r8, r8, #4
933; CHECK-NEXT:    ldr r4, [r7, #-8]
934; CHECK-NEXT:    mla r4, r4, r9, r2
935; CHECK-NEXT:    str r4, [r5, #-8]
936; CHECK-NEXT:    ldr r9, [r6, #-4]
937; CHECK-NEXT:    ldr r4, [r7, #-4]
938; CHECK-NEXT:    mla r4, r4, r9, r2
939; CHECK-NEXT:    str r4, [r5, #-4]
940; CHECK-NEXT:    ldr.w r9, [r6]
941; CHECK-NEXT:    ldr r4, [r7]
942; CHECK-NEXT:    mla r4, r4, r9, r2
943; CHECK-NEXT:    str r4, [r5]
944; CHECK-NEXT:    ldr.w r9, [r6, #4]
945; CHECK-NEXT:    adds r6, #16
946; CHECK-NEXT:    ldr r4, [r7, #4]
947; CHECK-NEXT:    adds r7, #16
948; CHECK-NEXT:    mla r4, r4, r9, r2
949; CHECK-NEXT:    str r4, [r5, #4]
950; CHECK-NEXT:    adds r5, #16
951; CHECK-NEXT:    le lr, .LBB9_7
952; CHECK-NEXT:  .LBB9_8: @ %for.cond.cleanup.loopexit.unr-lcssa
953; CHECK-NEXT:    wls lr, r12, .LBB9_11
954; CHECK-NEXT:  @ %bb.9: @ %for.body.epil.preheader
955; CHECK-NEXT:    add.w r0, r0, r8, lsl #2
956; CHECK-NEXT:    add.w r1, r1, r8, lsl #2
957; CHECK-NEXT:    add.w r3, r3, r8, lsl #2
958; CHECK-NEXT:  .LBB9_10: @ %for.body.epil
959; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
960; CHECK-NEXT:    ldr r7, [r0], #4
961; CHECK-NEXT:    ldr r6, [r1], #4
962; CHECK-NEXT:    mla r7, r6, r7, r2
963; CHECK-NEXT:    str r7, [r3], #4
964; CHECK-NEXT:    le lr, .LBB9_10
965; CHECK-NEXT:  .LBB9_11: @ %for.cond.cleanup
966; CHECK-NEXT:    pop.w {r4, r5, r6, r7, r8, r9, pc}
967entry:
968  %cmp8 = icmp eq i32 %N, 0
969  br i1 %cmp8, label %for.cond.cleanup, label %vector.memcheck
970
971vector.memcheck:                                  ; preds = %entry
972  %scevgep = getelementptr i32, ptr %res, i32 %N
973  %scevgep13 = getelementptr i32, ptr %a, i32 %N
974  %scevgep16 = getelementptr i32, ptr %b, i32 %N
975  %bound0 = icmp ugt ptr %scevgep13, %res
976  %bound1 = icmp ugt ptr %scevgep, %a
977  %found.conflict = and i1 %bound0, %bound1
978  %bound018 = icmp ugt ptr %scevgep16, %res
979  %bound119 = icmp ugt ptr %scevgep, %b
980  %found.conflict20 = and i1 %bound018, %bound119
981  %conflict.rdx = or i1 %found.conflict, %found.conflict20
982  br i1 %conflict.rdx, label %for.body.preheader, label %vector.ph
983
984for.body.preheader:                               ; preds = %vector.memcheck
985  %0 = add i32 %N, -1
986  %xtraiter = and i32 %N, 3
987  %1 = icmp ult i32 %0, 3
988  br i1 %1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new
989
990for.body.preheader.new:                           ; preds = %for.body.preheader
991  %unroll_iter = sub i32 %N, %xtraiter
992  br label %for.body
993
994vector.ph:                                        ; preds = %vector.memcheck
995  %n.rnd.up = add i32 %N, 3
996  %n.vec = and i32 %n.rnd.up, -4
997  %broadcast.splatinsert24 = insertelement <4 x i32> undef, i32 %c, i32 0
998  %broadcast.splat25 = shufflevector <4 x i32> %broadcast.splatinsert24, <4 x i32> undef, <4 x i32> zeroinitializer
999  br label %vector.body
1000
1001vector.body:                                      ; preds = %vector.body, %vector.ph
1002  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
1003  %2 = getelementptr inbounds i32, ptr %a, i32 %index
1004  %3 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
1005  %4 = bitcast ptr %2 to ptr
1006  %wide.masked.load = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %4, i32 4, <4 x i1> %3, <4 x i32> undef)
1007  %5 = getelementptr inbounds i32, ptr %b, i32 %index
1008  %6 = bitcast ptr %5 to ptr
1009  %wide.masked.load23 = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %6, i32 4, <4 x i1> %3, <4 x i32> undef)
1010  %7 = mul nsw <4 x i32> %wide.masked.load23, %wide.masked.load
1011  %8 = add nsw <4 x i32> %7, %broadcast.splat25
1012  %9 = getelementptr inbounds i32, ptr %res, i32 %index
1013  %10 = bitcast ptr %9 to ptr
1014  call void @llvm.masked.store.v4i32.p0(<4 x i32> %8, ptr %10, i32 4, <4 x i1> %3)
1015  %index.next = add i32 %index, 4
1016  %11 = icmp eq i32 %index.next, %n.vec
1017  br i1 %11, label %for.cond.cleanup, label %vector.body
1018
1019for.cond.cleanup.loopexit.unr-lcssa:              ; preds = %for.body, %for.body.preheader
1020  %i.09.unr = phi i32 [ 0, %for.body.preheader ], [ %inc.3, %for.body ]
1021  %lcmp.mod = icmp eq i32 %xtraiter, 0
1022  br i1 %lcmp.mod, label %for.cond.cleanup, label %for.body.epil
1023
1024for.body.epil:                                    ; preds = %for.cond.cleanup.loopexit.unr-lcssa, %for.body.epil
1025  %i.09.epil = phi i32 [ %inc.epil, %for.body.epil ], [ %i.09.unr, %for.cond.cleanup.loopexit.unr-lcssa ]
1026  %epil.iter = phi i32 [ %epil.iter.sub, %for.body.epil ], [ %xtraiter, %for.cond.cleanup.loopexit.unr-lcssa ]
1027  %arrayidx.epil = getelementptr inbounds i32, ptr %a, i32 %i.09.epil
1028  %12 = load i32, ptr %arrayidx.epil, align 4
1029  %arrayidx1.epil = getelementptr inbounds i32, ptr %b, i32 %i.09.epil
1030  %13 = load i32, ptr %arrayidx1.epil, align 4
1031  %mul.epil = mul nsw i32 %13, %12
1032  %add.epil = add nsw i32 %mul.epil, %c
1033  %arrayidx2.epil = getelementptr inbounds i32, ptr %res, i32 %i.09.epil
1034  store i32 %add.epil, ptr %arrayidx2.epil, align 4
1035  %inc.epil = add nuw i32 %i.09.epil, 1
1036  %epil.iter.sub = add i32 %epil.iter, -1
1037  %epil.iter.cmp = icmp eq i32 %epil.iter.sub, 0
1038  br i1 %epil.iter.cmp, label %for.cond.cleanup, label %for.body.epil
1039
1040for.cond.cleanup:                                 ; preds = %vector.body, %for.cond.cleanup.loopexit.unr-lcssa, %for.body.epil, %entry
1041  ret void
1042
1043for.body:                                         ; preds = %for.body, %for.body.preheader.new
1044  %i.09 = phi i32 [ 0, %for.body.preheader.new ], [ %inc.3, %for.body ]
1045  %niter = phi i32 [ %unroll_iter, %for.body.preheader.new ], [ %niter.nsub.3, %for.body ]
1046  %arrayidx = getelementptr inbounds i32, ptr %a, i32 %i.09
1047  %14 = load i32, ptr %arrayidx, align 4
1048  %arrayidx1 = getelementptr inbounds i32, ptr %b, i32 %i.09
1049  %15 = load i32, ptr %arrayidx1, align 4
1050  %mul = mul nsw i32 %15, %14
1051  %add = add nsw i32 %mul, %c
1052  %arrayidx2 = getelementptr inbounds i32, ptr %res, i32 %i.09
1053  store i32 %add, ptr %arrayidx2, align 4
1054  %inc = or disjoint i32 %i.09, 1
1055  %arrayidx.1 = getelementptr inbounds i32, ptr %a, i32 %inc
1056  %16 = load i32, ptr %arrayidx.1, align 4
1057  %arrayidx1.1 = getelementptr inbounds i32, ptr %b, i32 %inc
1058  %17 = load i32, ptr %arrayidx1.1, align 4
1059  %mul.1 = mul nsw i32 %17, %16
1060  %add.1 = add nsw i32 %mul.1, %c
1061  %arrayidx2.1 = getelementptr inbounds i32, ptr %res, i32 %inc
1062  store i32 %add.1, ptr %arrayidx2.1, align 4
1063  %inc.1 = or disjoint i32 %i.09, 2
1064  %arrayidx.2 = getelementptr inbounds i32, ptr %a, i32 %inc.1
1065  %18 = load i32, ptr %arrayidx.2, align 4
1066  %arrayidx1.2 = getelementptr inbounds i32, ptr %b, i32 %inc.1
1067  %19 = load i32, ptr %arrayidx1.2, align 4
1068  %mul.2 = mul nsw i32 %19, %18
1069  %add.2 = add nsw i32 %mul.2, %c
1070  %arrayidx2.2 = getelementptr inbounds i32, ptr %res, i32 %inc.1
1071  store i32 %add.2, ptr %arrayidx2.2, align 4
1072  %inc.2 = or disjoint i32 %i.09, 3
1073  %arrayidx.3 = getelementptr inbounds i32, ptr %a, i32 %inc.2
1074  %20 = load i32, ptr %arrayidx.3, align 4
1075  %arrayidx1.3 = getelementptr inbounds i32, ptr %b, i32 %inc.2
1076  %21 = load i32, ptr %arrayidx1.3, align 4
1077  %mul.3 = mul nsw i32 %21, %20
1078  %add.3 = add nsw i32 %mul.3, %c
1079  %arrayidx2.3 = getelementptr inbounds i32, ptr %res, i32 %inc.2
1080  store i32 %add.3, ptr %arrayidx2.3, align 4
1081  %inc.3 = add nuw i32 %i.09, 4
1082  %niter.nsub.3 = add i32 %niter, -4
1083  %niter.ncmp.3 = icmp eq i32 %niter.nsub.3, 0
1084  br i1 %niter.ncmp.3, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body
1085}
1086
1087define dso_local arm_aapcs_vfpcc void @test_v8i8_to_v8i16(ptr noalias nocapture %a, ptr nocapture readonly %b, ptr nocapture readonly %c, i32 %N) {
1088; CHECK-LABEL: test_v8i8_to_v8i16:
1089; CHECK:       @ %bb.0: @ %entry
1090; CHECK-NEXT:    push {r7, lr}
1091; CHECK-NEXT:    cmp r3, #0
1092; CHECK-NEXT:    it eq
1093; CHECK-NEXT:    popeq {r7, pc}
1094; CHECK-NEXT:  .LBB10_1: @ %vector.ph
1095; CHECK-NEXT:    dlstp.16 lr, r3
1096; CHECK-NEXT:  .LBB10_2: @ %vector.body
1097; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
1098; CHECK-NEXT:    vldrb.u16 q0, [r1], #8
1099; CHECK-NEXT:    vldrb.u16 q1, [r2], #8
1100; CHECK-NEXT:    vmul.i16 q0, q1, q0
1101; CHECK-NEXT:    vstrh.16 q0, [r0], #16
1102; CHECK-NEXT:    letp lr, .LBB10_2
1103; CHECK-NEXT:  @ %bb.3: @ %for.cond.cleanup
1104; CHECK-NEXT:    pop {r7, pc}
1105entry:
1106  %cmp10 = icmp eq i32 %N, 0
1107  br i1 %cmp10, label %for.cond.cleanup, label %vector.ph
1108
1109vector.ph:                                        ; preds = %entry
1110  %n.rnd.up = add i32 %N, 7
1111  %n.vec = and i32 %n.rnd.up, -8
1112  br label %vector.body
1113
1114vector.body:                                      ; preds = %vector.body, %vector.ph
1115  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
1116  %0 = getelementptr inbounds i8, ptr %b, i32 %index
1117  %1 = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %N)
1118  %2 = bitcast ptr %0 to ptr
1119  %wide.masked.load = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %2, i32 1, <8 x i1> %1, <8 x i8> undef)
1120  %3 = zext <8 x i8> %wide.masked.load to <8 x i16>
1121  %4 = getelementptr inbounds i8, ptr %c, i32 %index
1122  %5 = bitcast ptr %4 to ptr
1123  %wide.masked.load14 = call <8 x i8> @llvm.masked.load.v8i8.p0(ptr %5, i32 1, <8 x i1> %1, <8 x i8> undef)
1124  %6 = zext <8 x i8> %wide.masked.load14 to <8 x i16>
1125  %7 = mul nuw <8 x i16> %6, %3
1126  %8 = getelementptr inbounds i16, ptr %a, i32 %index
1127  %9 = bitcast ptr %8 to ptr
1128  call void @llvm.masked.store.v8i16.p0(<8 x i16> %7, ptr %9, i32 2, <8 x i1> %1)
1129  %index.next = add i32 %index, 8
1130  %10 = icmp eq i32 %index.next, %n.vec
1131  br i1 %10, label %for.cond.cleanup, label %vector.body
1132
1133for.cond.cleanup:                                 ; preds = %vector.body, %entry
1134  ret void
1135}
1136
1137declare <4 x i8> @llvm.masked.load.v4i8.p0(ptr, i32 immarg, <4 x i1>, <4 x i8>)
1138declare <8 x i8> @llvm.masked.load.v8i8.p0(ptr, i32 immarg, <8 x i1>, <8 x i8>)
1139declare <4 x i16> @llvm.masked.load.v4i16.p0(ptr, i32 immarg, <4 x i1>, <4 x i16>)
1140declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i32 immarg, <4 x i1>, <4 x i32>)
1141declare void @llvm.masked.store.v8i16.p0(<8 x i16>, ptr, i32 immarg, <8 x i1>)
1142declare void @llvm.masked.store.v4i32.p0(<4 x i32>, ptr, i32 immarg, <4 x i1>)
1143declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)
1144declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)
1145declare <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32, i32)
1146