1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s 3 4--- | 5 define dso_local arm_aapcs_vfpcc void @multi_cond_iter_count(ptr nocapture %0, ptr nocapture readonly %1, i32 %2, i32 %3) local_unnamed_addr #0 { 6 %5 = icmp eq i32 %3, 2 7 %6 = select i1 %5, i32 2, i32 4 8 %7 = icmp eq i32 %3, 4 9 %8 = select i1 %7, i32 1, i32 %6 10 %9 = shl i32 %2, %8 11 %10 = icmp eq i32 %9, 0 12 br i1 %10, label %64, label %11 13 14 11: ; preds = %4 15 %12 = getelementptr i32, ptr %0, i32 %9 16 %13 = getelementptr i32, ptr %1, i32 %9 17 %14 = icmp ugt ptr %13, %0 18 %15 = icmp ugt ptr %12, %1 19 %16 = and i1 %14, %15 20 %17 = add i32 %9, 3 21 %18 = lshr i32 %17, 2 22 %19 = shl nuw i32 %18, 2 23 %20 = add i32 %19, -4 24 %21 = lshr i32 %20, 2 25 %22 = add nuw nsw i32 %21, 1 26 br i1 %16, label %23, label %32 27 28 23: ; preds = %11 29 %24 = add i32 %9, -1 30 %25 = and i32 %9, 2 31 %26 = icmp ult i32 %24, 3 32 %27 = add i32 %9, -4 33 %28 = sub i32 %27, %25 34 %29 = lshr i32 %28, 2 35 %30 = add nuw nsw i32 %29, 1 36 br i1 %26, label %49, label %31 37 38 31: ; preds = %23 39 %start1 = call i32 @llvm.start.loop.iterations.i32(i32 %30) 40 br label %65 41 42 32: ; preds = %11 43 %start2 = call i32 @llvm.start.loop.iterations.i32(i32 %22) 44 br label %33 45 46 33: ; preds = %33, %32 47 %34 = phi ptr [ %46, %33 ], [ %0, %32 ] 48 %35 = phi ptr [ %45, %33 ], [ %1, %32 ] 49 %36 = phi i32 [ %start2, %32 ], [ %47, %33 ] 50 %37 = phi i32 [ %9, %32 ], [ %41, %33 ] 51 %38 = bitcast ptr %34 to ptr 52 %39 = bitcast ptr %35 to ptr 53 %40 = call <4 x i1> @llvm.arm.mve.vctp32(i32 %37) 54 %41 = sub i32 %37, 4 55 %42 = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %39, i32 4, <4 x i1> %40, <4 x i32> undef) 56 %43 = call <4 x i32> @llvm.masked.load.v4i32.p0(ptr %38, i32 4, <4 x i1> %40, <4 x i32> undef) 57 %44 = mul nsw <4 x i32> %43, %42 58 call void @llvm.masked.store.v4i32.p0(<4 x i32> %44, ptr %38, i32 4, <4 x i1> %40) 59 %45 = getelementptr i32, ptr %35, i32 4 60 %46 = getelementptr i32, ptr %34, i32 4 61 %47 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %36, i32 1) 62 %48 = icmp ne i32 %47, 0 63 br i1 %48, label %33, label %64 64 65 49: ; preds = %65, %23 66 %50 = phi i32 [ 0, %23 ], [ %107, %65 ] 67 %51 = icmp eq i32 %25, 0 68 br i1 %51, label %64, label %52 69 70 52: ; preds = %49 71 %53 = getelementptr inbounds i32, ptr %1, i32 %50 72 %54 = load i32, ptr %53, align 4 73 %55 = getelementptr inbounds i32, ptr %0, i32 %50 74 %56 = load i32, ptr %55, align 4 75 %57 = mul nsw i32 %56, %54 76 store i32 %57, ptr %55, align 4 77 %58 = add nuw i32 %50, 1 78 %59 = getelementptr inbounds i32, ptr %1, i32 %58 79 %60 = load i32, ptr %59, align 4 80 %61 = getelementptr inbounds i32, ptr %0, i32 %58 81 %62 = load i32, ptr %61, align 4 82 %63 = mul nsw i32 %62, %60 83 store i32 %63, ptr %61, align 4 84 br label %64 85 86 64: ; preds = %33, %52, %49, %4 87 ret void 88 89 65: ; preds = %65, %31 90 %66 = phi i32 [ %108, %65 ], [ 0, %31 ] 91 %67 = phi i32 [ 0, %31 ], [ %107, %65 ] 92 %68 = phi i32 [ %start1, %31 ], [ %109, %65 ] 93 %69 = bitcast ptr %0 to ptr 94 %70 = bitcast ptr %1 to ptr 95 %71 = getelementptr i8, ptr %70, i32 %66 96 %72 = bitcast ptr %71 to ptr 97 %73 = bitcast ptr %72 to ptr 98 %74 = load i32, ptr %73, align 4 99 %75 = getelementptr i8, ptr %69, i32 %66 100 %76 = bitcast ptr %75 to ptr 101 %77 = bitcast ptr %76 to ptr 102 %78 = load i32, ptr %77, align 4 103 %79 = mul nsw i32 %78, %74 104 store i32 %79, ptr %77, align 4 105 %80 = getelementptr i8, ptr %70, i32 %66 106 %81 = bitcast ptr %80 to ptr 107 %82 = getelementptr i32, ptr %81, i32 1 108 %83 = load i32, ptr %82, align 4 109 %84 = getelementptr i8, ptr %69, i32 %66 110 %85 = bitcast ptr %84 to ptr 111 %86 = getelementptr i32, ptr %85, i32 1 112 %87 = load i32, ptr %86, align 4 113 %88 = mul nsw i32 %87, %83 114 store i32 %88, ptr %86, align 4 115 %89 = getelementptr i8, ptr %70, i32 %66 116 %90 = bitcast ptr %89 to ptr 117 %91 = getelementptr i32, ptr %90, i32 2 118 %92 = load i32, ptr %91, align 4 119 %93 = getelementptr i8, ptr %69, i32 %66 120 %94 = bitcast ptr %93 to ptr 121 %95 = getelementptr i32, ptr %94, i32 2 122 %96 = load i32, ptr %95, align 4 123 %97 = mul nsw i32 %96, %92 124 store i32 %97, ptr %95, align 4 125 %98 = getelementptr i8, ptr %70, i32 %66 126 %99 = bitcast ptr %98 to ptr 127 %100 = getelementptr i32, ptr %99, i32 3 128 %101 = load i32, ptr %100, align 4 129 %102 = getelementptr i8, ptr %69, i32 %66 130 %103 = bitcast ptr %102 to ptr 131 %104 = getelementptr i32, ptr %103, i32 3 132 %105 = load i32, ptr %104, align 4 133 %106 = mul nsw i32 %105, %101 134 store i32 %106, ptr %104, align 4 135 %107 = add nuw i32 %67, 4 136 %108 = add i32 %66, 16 137 %109 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %68, i32 1) 138 %110 = icmp ne i32 %109, 0 139 br i1 %110, label %65, label %49 140 } 141 142 declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i32 immarg, <4 x i1>, <4 x i32>) #1 143 declare void @llvm.masked.store.v4i32.p0(<4 x i32>, ptr, i32 immarg, <4 x i1>) #2 144 declare i32 @llvm.start.loop.iterations.i32(i32) #3 145 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) #3 146 declare <4 x i1> @llvm.arm.mve.vctp32(i32) #4 147 148... 149--- 150name: multi_cond_iter_count 151alignment: 2 152tracksRegLiveness: true 153registers: [] 154liveins: 155 - { reg: '$r0', virtual-reg: '' } 156 - { reg: '$r1', virtual-reg: '' } 157 - { reg: '$r2', virtual-reg: '' } 158 - { reg: '$r3', virtual-reg: '' } 159frameInfo: 160 stackSize: 32 161 offsetAdjustment: -24 162 maxAlignment: 4 163fixedStack: [] 164stack: 165 - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 166 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 167 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 168 - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 169 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 170 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 171 - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, 172 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true, 173 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 174 - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, 175 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true, 176 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 177 - { id: 4, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, 178 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 179 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 180 - { id: 5, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, 181 stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true, 182 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 183 - { id: 6, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4, 184 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true, 185 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 186 - { id: 7, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, 187 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true, 188 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 189callSites: [] 190constants: [] 191machineFunctionInfo: {} 192body: | 193 ; CHECK-LABEL: name: multi_cond_iter_count 194 ; CHECK: bb.0 (%ir-block.4): 195 ; CHECK-NEXT: successors: %bb.4(0x30000000), %bb.1(0x50000000) 196 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r8, $r9, $r10 197 ; CHECK-NEXT: {{ $}} 198 ; CHECK-NEXT: frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp 199 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 20 200 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4 201 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -8 202 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r6, -12 203 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r5, -16 204 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -20 205 ; CHECK-NEXT: dead $r7 = frame-setup tADDrSPi $sp, 3, 14 /* CC::al */, $noreg 206 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa $r7, 8 207 ; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r8, killed $r9, killed $r10 208 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r10, -24 209 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r9, -28 210 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r8, -32 211 ; CHECK-NEXT: tCMPi8 renamable $r3, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr 212 ; CHECK-NEXT: $r12 = tMOVr $r3, 14 /* CC::al */, $noreg 213 ; CHECK-NEXT: t2IT 1, 8, implicit-def $itstate 214 ; CHECK-NEXT: $r12 = t2MOVi 4, 1 /* CC::ne */, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 215 ; CHECK-NEXT: tCMPi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr 216 ; CHECK-NEXT: t2IT 0, 8, implicit-def $itstate 217 ; CHECK-NEXT: $r12 = t2MOVi 1, 0 /* CC::eq */, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 218 ; CHECK-NEXT: renamable $r3 = t2LSLrr killed renamable $r2, killed renamable $r12, 14 /* CC::al */, $noreg, def $cpsr 219 ; CHECK-NEXT: tBcc %bb.4, 0 /* CC::eq */, killed $cpsr 220 ; CHECK-NEXT: {{ $}} 221 ; CHECK-NEXT: bb.1 (%ir-block.11): 222 ; CHECK-NEXT: successors: %bb.2(0x55555555), %bb.5(0x2aaaaaab) 223 ; CHECK-NEXT: liveins: $r0, $r1, $r3 224 ; CHECK-NEXT: {{ $}} 225 ; CHECK-NEXT: renamable $r2 = t2ADDrs renamable $r1, renamable $r3, 18, 14 /* CC::al */, $noreg, $noreg 226 ; CHECK-NEXT: tCMPr killed renamable $r2, renamable $r0, 14 /* CC::al */, $noreg, implicit-def $cpsr 227 ; CHECK-NEXT: t2IT 8, 4, implicit-def $itstate 228 ; CHECK-NEXT: renamable $r2 = t2ADDrs renamable $r0, renamable $r3, 18, 8 /* CC::hi */, $cpsr, $noreg, implicit $itstate 229 ; CHECK-NEXT: tCMPr killed renamable $r2, renamable $r1, 8 /* CC::hi */, killed $cpsr, implicit-def $cpsr, implicit killed $itstate 230 ; CHECK-NEXT: tBcc %bb.5, 8 /* CC::hi */, killed $cpsr 231 ; CHECK-NEXT: {{ $}} 232 ; CHECK-NEXT: bb.2 (%ir-block.32): 233 ; CHECK-NEXT: successors: %bb.3(0x80000000) 234 ; CHECK-NEXT: liveins: $r0, $r1, $r3 235 ; CHECK-NEXT: {{ $}} 236 ; CHECK-NEXT: $r2 = tMOVr $r0, 14 /* CC::al */, $noreg 237 ; CHECK-NEXT: $lr = MVE_DLSTP_32 killed renamable $r3 238 ; CHECK-NEXT: {{ $}} 239 ; CHECK-NEXT: bb.3 (%ir-block.33): 240 ; CHECK-NEXT: successors: %bb.3(0x7c000000), %bb.4(0x04000000) 241 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2 242 ; CHECK-NEXT: {{ $}} 243 ; CHECK-NEXT: renamable $r1, renamable $q0 = MVE_VLDRWU32_post killed renamable $r1, 16, 0, $noreg, $noreg 244 ; CHECK-NEXT: renamable $r2, renamable $q1 = MVE_VLDRWU32_post killed renamable $r2, 16, 0, $noreg, $noreg 245 ; CHECK-NEXT: renamable $q0 = nsw MVE_VMULi32 killed renamable $q1, killed renamable $q0, 0, $noreg, $noreg, undef renamable $q0 246 ; CHECK-NEXT: MVE_VSTRWU32 killed renamable $q0, killed renamable $r0, 0, 0, killed $noreg, $noreg 247 ; CHECK-NEXT: $r0 = tMOVr $r2, 14 /* CC::al */, $noreg 248 ; CHECK-NEXT: $lr = MVE_LETP killed renamable $lr, %bb.3 249 ; CHECK-NEXT: {{ $}} 250 ; CHECK-NEXT: bb.4 (%ir-block.64): 251 ; CHECK-NEXT: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r10 252 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 253 ; CHECK-NEXT: {{ $}} 254 ; CHECK-NEXT: bb.5 (%ir-block.23): 255 ; CHECK-NEXT: successors: %bb.6(0x40000000), %bb.7(0x40000000) 256 ; CHECK-NEXT: liveins: $r0, $r1, $r3 257 ; CHECK-NEXT: {{ $}} 258 ; CHECK-NEXT: renamable $r2, dead $cpsr = tSUBi3 renamable $r3, 1, 14 /* CC::al */, $noreg 259 ; CHECK-NEXT: renamable $r12 = t2ANDri renamable $r3, 2, 14 /* CC::al */, $noreg, $noreg 260 ; CHECK-NEXT: tCMPi8 killed renamable $r2, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr 261 ; CHECK-NEXT: tBcc %bb.7, 2 /* CC::hs */, killed $cpsr 262 ; CHECK-NEXT: {{ $}} 263 ; CHECK-NEXT: bb.6: 264 ; CHECK-NEXT: successors: %bb.9(0x80000000) 265 ; CHECK-NEXT: liveins: $r0, $r1, $r12 266 ; CHECK-NEXT: {{ $}} 267 ; CHECK-NEXT: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 268 ; CHECK-NEXT: tB %bb.9, 14 /* CC::al */, $noreg 269 ; CHECK-NEXT: {{ $}} 270 ; CHECK-NEXT: bb.7 (%ir-block.31): 271 ; CHECK-NEXT: successors: %bb.8(0x80000000) 272 ; CHECK-NEXT: liveins: $r0, $r1, $r3, $r12 273 ; CHECK-NEXT: {{ $}} 274 ; CHECK-NEXT: renamable $r2 = t2BICri killed renamable $r3, 2, 14 /* CC::al */, $noreg, $noreg 275 ; CHECK-NEXT: renamable $r3, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg 276 ; CHECK-NEXT: renamable $r2, dead $cpsr = tSUBi8 killed renamable $r2, 4, 14 /* CC::al */, $noreg 277 ; CHECK-NEXT: renamable $lr = nuw nsw t2ADDrs killed renamable $r3, killed renamable $r2, 19, 14 /* CC::al */, $noreg, $noreg 278 ; CHECK-NEXT: renamable $r2, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 279 ; CHECK-NEXT: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 280 ; CHECK-NEXT: {{ $}} 281 ; CHECK-NEXT: bb.8 (%ir-block.65): 282 ; CHECK-NEXT: successors: %bb.8(0x7c000000), %bb.9(0x04000000) 283 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r12 284 ; CHECK-NEXT: {{ $}} 285 ; CHECK-NEXT: renamable $r4 = tLDRr renamable $r1, $r2, 14 /* CC::al */, $noreg 286 ; CHECK-NEXT: renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg 287 ; CHECK-NEXT: renamable $r5 = tLDRr renamable $r0, $r2, 14 /* CC::al */, $noreg 288 ; CHECK-NEXT: renamable $r4, dead $cpsr = nsw tMUL killed renamable $r5, killed renamable $r4, 14 /* CC::al */, $noreg 289 ; CHECK-NEXT: renamable $r5, dead $cpsr = tADDrr renamable $r0, renamable $r2, 14 /* CC::al */, $noreg 290 ; CHECK-NEXT: $r10, $r8 = t2LDRDi8 $r5, 4, 14 /* CC::al */, $noreg 291 ; CHECK-NEXT: renamable $r9 = t2LDRi12 renamable $r5, 12, 14 /* CC::al */, $noreg 292 ; CHECK-NEXT: tSTRr killed renamable $r4, renamable $r0, $r2, 14 /* CC::al */, $noreg 293 ; CHECK-NEXT: renamable $r4, dead $cpsr = tADDrr renamable $r1, renamable $r2, 14 /* CC::al */, $noreg 294 ; CHECK-NEXT: renamable $r2, dead $cpsr = tADDi8 killed renamable $r2, 16, 14 /* CC::al */, $noreg 295 ; CHECK-NEXT: renamable $r6 = tLDRi renamable $r4, 1, 14 /* CC::al */, $noreg 296 ; CHECK-NEXT: renamable $r6 = nsw t2MUL killed renamable $r10, killed renamable $r6, 14 /* CC::al */, $noreg 297 ; CHECK-NEXT: tSTRi killed renamable $r6, renamable $r5, 1, 14 /* CC::al */, $noreg 298 ; CHECK-NEXT: renamable $r6 = tLDRi renamable $r4, 2, 14 /* CC::al */, $noreg 299 ; CHECK-NEXT: renamable $r6 = nsw t2MUL killed renamable $r8, killed renamable $r6, 14 /* CC::al */, $noreg 300 ; CHECK-NEXT: tSTRi killed renamable $r6, renamable $r5, 2, 14 /* CC::al */, $noreg 301 ; CHECK-NEXT: renamable $r4 = tLDRi killed renamable $r4, 3, 14 /* CC::al */, $noreg 302 ; CHECK-NEXT: renamable $r4 = nsw t2MUL killed renamable $r9, killed renamable $r4, 14 /* CC::al */, $noreg 303 ; CHECK-NEXT: tSTRi killed renamable $r4, killed renamable $r5, 3, 14 /* CC::al */, $noreg 304 ; CHECK-NEXT: $lr = t2LEUpdate killed renamable $lr, %bb.8 305 ; CHECK-NEXT: {{ $}} 306 ; CHECK-NEXT: bb.9 (%ir-block.49): 307 ; CHECK-NEXT: successors: %bb.4(0x40000000), %bb.10(0x40000000) 308 ; CHECK-NEXT: liveins: $r0, $r1, $r3, $r12 309 ; CHECK-NEXT: {{ $}} 310 ; CHECK-NEXT: t2CMPri killed renamable $r12, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr 311 ; CHECK-NEXT: tBcc %bb.4, 0 /* CC::eq */, killed $cpsr 312 ; CHECK-NEXT: {{ $}} 313 ; CHECK-NEXT: bb.10 (%ir-block.52): 314 ; CHECK-NEXT: liveins: $r0, $r1, $r3 315 ; CHECK-NEXT: {{ $}} 316 ; CHECK-NEXT: renamable $r12 = t2LDRs renamable $r1, renamable $r3, 2, 14 /* CC::al */, $noreg 317 ; CHECK-NEXT: renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14 /* CC::al */, $noreg 318 ; CHECK-NEXT: renamable $r12 = nsw t2MUL killed renamable $r2, killed renamable $r12, 14 /* CC::al */, $noreg 319 ; CHECK-NEXT: renamable $r2, dead $cpsr = tADDi3 renamable $r3, 1, 14 /* CC::al */, $noreg 320 ; CHECK-NEXT: renamable $lr = t2LDRs renamable $r0, renamable $r2, 2, 14 /* CC::al */, $noreg 321 ; CHECK-NEXT: t2STRs killed renamable $r12, renamable $r0, killed renamable $r3, 2, 14 /* CC::al */, $noreg 322 ; CHECK-NEXT: renamable $r1 = t2LDRs killed renamable $r1, renamable $r2, 2, 14 /* CC::al */, $noreg 323 ; CHECK-NEXT: renamable $r1 = nsw t2MUL killed renamable $lr, killed renamable $r1, 14 /* CC::al */, $noreg 324 ; CHECK-NEXT: t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r2, 2, 14 /* CC::al */, $noreg 325 ; CHECK-NEXT: $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r10 326 ; CHECK-NEXT: tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 327 bb.0 (%ir-block.4): 328 successors: %bb.4(0x30000000), %bb.1(0x50000000) 329 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $lr, $r8, $r9, $r10 330 331 frame-setup tPUSH 14, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp 332 frame-setup CFI_INSTRUCTION def_cfa_offset 20 333 frame-setup CFI_INSTRUCTION offset $lr, -4 334 frame-setup CFI_INSTRUCTION offset $r7, -8 335 frame-setup CFI_INSTRUCTION offset $r6, -12 336 frame-setup CFI_INSTRUCTION offset $r5, -16 337 frame-setup CFI_INSTRUCTION offset $r4, -20 338 $r7 = frame-setup tADDrSPi $sp, 3, 14, $noreg 339 frame-setup CFI_INSTRUCTION def_cfa $r7, 8 340 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r8, killed $r9, killed $r10 341 frame-setup CFI_INSTRUCTION offset $r10, -24 342 frame-setup CFI_INSTRUCTION offset $r9, -28 343 frame-setup CFI_INSTRUCTION offset $r8, -32 344 tCMPi8 renamable $r3, 2, 14, $noreg, implicit-def $cpsr 345 $r12 = tMOVr $r3, 14, $noreg 346 t2IT 1, 8, implicit-def $itstate 347 $r12 = t2MOVi 4, 1, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 348 tCMPi8 killed renamable $r3, 4, 14, $noreg, implicit-def $cpsr 349 t2IT 0, 8, implicit-def $itstate 350 $r12 = t2MOVi 1, 0, killed $cpsr, $noreg, implicit killed renamable $r12, implicit killed $itstate 351 renamable $r3 = t2LSLrr killed renamable $r2, killed renamable $r12, 14, $noreg, def $cpsr 352 tBcc %bb.4, 0, killed $cpsr 353 354 bb.1 (%ir-block.11): 355 successors: %bb.2(0x80000000), %bb.5(0x40000000) 356 liveins: $r0, $r1, $r3 357 358 renamable $r2 = t2ADDrs renamable $r1, renamable $r3, 18, 14, $noreg, $noreg 359 tCMPr killed renamable $r2, renamable $r0, 14, $noreg, implicit-def $cpsr 360 t2IT 8, 4, implicit-def $itstate 361 renamable $r2 = t2ADDrs renamable $r0, renamable $r3, 18, 8, $cpsr, $noreg, implicit $itstate 362 tCMPr killed renamable $r2, renamable $r1, 8, killed $cpsr, implicit-def $cpsr, implicit killed $itstate 363 tBcc %bb.5, 8, killed $cpsr 364 365 bb.2 (%ir-block.32): 366 successors: %bb.3(0x80000000) 367 liveins: $r0, $r1, $r3 368 369 renamable $r2, dead $cpsr = tADDi3 renamable $r3, 3, 14, $noreg 370 renamable $r2 = t2BICri killed renamable $r2, 3, 14, $noreg, $noreg 371 renamable $r12 = t2SUBri killed renamable $r2, 4, 14, $noreg, $noreg 372 renamable $r2, dead $cpsr = tMOVi8 1, 14, $noreg 373 renamable $lr = nuw nsw t2ADDrs killed renamable $r2, killed renamable $r12, 19, 14, $noreg, $noreg 374 $r2 = tMOVr $r0, 14, $noreg 375 $lr = t2DoLoopStart renamable $lr 376 377 bb.3 (%ir-block.33): 378 successors: %bb.3(0x7c000000), %bb.4(0x04000000) 379 liveins: $lr, $r0, $r1, $r2, $r3 380 381 renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg, $noreg 382 MVE_VPST 4, implicit $vpr 383 renamable $r1, renamable $q0 = MVE_VLDRWU32_post killed renamable $r1, 16, 1, renamable $vpr, $noreg 384 renamable $r2, renamable $q1 = MVE_VLDRWU32_post killed renamable $r2, 16, 1, renamable $vpr, $noreg 385 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg 386 renamable $q0 = nsw MVE_VMULi32 killed renamable $q1, killed renamable $q0, 0, $noreg, $noreg, undef renamable $q0 387 MVE_VPST 8, implicit $vpr 388 MVE_VSTRWU32 killed renamable $q0, killed renamable $r0, 0, 1, killed renamable $vpr, $noreg 389 renamable $lr = t2LoopDec killed renamable $lr, 1 390 $r0 = tMOVr $r2, 14, $noreg 391 t2LoopEnd renamable $lr, %bb.3, implicit-def dead $cpsr 392 tB %bb.4, 14, $noreg 393 394 bb.4 (%ir-block.64): 395 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r10 396 tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 397 398 bb.5 (%ir-block.23): 399 successors: %bb.6(0x40000000), %bb.7(0x40000000) 400 liveins: $r0, $r1, $r3 401 402 renamable $r2, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg 403 renamable $r12 = t2ANDri renamable $r3, 2, 14, $noreg, $noreg 404 tCMPi8 killed renamable $r2, 3, 14, $noreg, implicit-def $cpsr 405 tBcc %bb.7, 2, killed $cpsr 406 407 bb.6: 408 successors: %bb.9(0x80000000) 409 liveins: $r0, $r1, $r12 410 411 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 412 tB %bb.9, 14, $noreg 413 414 bb.7 (%ir-block.31): 415 successors: %bb.8(0x80000000) 416 liveins: $r0, $r1, $r3, $r12 417 418 renamable $r2 = t2BICri killed renamable $r3, 2, 14, $noreg, $noreg 419 renamable $r3, dead $cpsr = tMOVi8 1, 14, $noreg 420 renamable $r2, dead $cpsr = tSUBi8 killed renamable $r2, 4, 14, $noreg 421 renamable $lr = nuw nsw t2ADDrs killed renamable $r3, killed renamable $r2, 19, 14, $noreg, $noreg 422 renamable $r2, dead $cpsr = tMOVi8 0, 14, $noreg 423 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 424 $lr = t2DoLoopStart renamable $lr 425 426 bb.8 (%ir-block.65): 427 successors: %bb.8(0x7c000000), %bb.9(0x04000000) 428 liveins: $lr, $r0, $r1, $r2, $r3, $r12 429 430 renamable $r4 = tLDRr renamable $r1, $r2, 14, $noreg 431 renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 4, 14, $noreg 432 renamable $r5 = tLDRr renamable $r0, $r2, 14, $noreg 433 renamable $lr = t2LoopDec killed renamable $lr, 1 434 renamable $r4, dead $cpsr = nsw tMUL killed renamable $r5, killed renamable $r4, 14, $noreg 435 renamable $r5, dead $cpsr = tADDrr renamable $r0, renamable $r2, 14, $noreg 436 $r10, $r8 = t2LDRDi8 $r5, 4, 14, $noreg 437 renamable $r9 = t2LDRi12 renamable $r5, 12, 14, $noreg 438 tSTRr killed renamable $r4, renamable $r0, $r2, 14, $noreg 439 renamable $r4, dead $cpsr = tADDrr renamable $r1, renamable $r2, 14, $noreg 440 renamable $r2, dead $cpsr = tADDi8 killed renamable $r2, 16, 14, $noreg 441 renamable $r6 = tLDRi renamable $r4, 1, 14, $noreg 442 renamable $r6 = nsw t2MUL killed renamable $r10, killed renamable $r6, 14, $noreg 443 tSTRi killed renamable $r6, renamable $r5, 1, 14, $noreg 444 renamable $r6 = tLDRi renamable $r4, 2, 14, $noreg 445 renamable $r6 = nsw t2MUL killed renamable $r8, killed renamable $r6, 14, $noreg 446 tSTRi killed renamable $r6, renamable $r5, 2, 14, $noreg 447 renamable $r4 = tLDRi killed renamable $r4, 3, 14, $noreg 448 renamable $r4 = nsw t2MUL killed renamable $r9, killed renamable $r4, 14, $noreg 449 tSTRi killed renamable $r4, killed renamable $r5, 3, 14, $noreg 450 t2LoopEnd renamable $lr, %bb.8, implicit-def dead $cpsr 451 tB %bb.9, 14, $noreg 452 453 bb.9 (%ir-block.49): 454 successors: %bb.4(0x40000000), %bb.10(0x40000000) 455 liveins: $r0, $r1, $r3, $r12 456 457 t2CMPri killed renamable $r12, 0, 14, $noreg, implicit-def $cpsr 458 tBcc %bb.4, 0, killed $cpsr 459 460 bb.10 (%ir-block.52): 461 liveins: $r0, $r1, $r3 462 463 renamable $r12 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg 464 renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg 465 renamable $r12 = nsw t2MUL killed renamable $r2, killed renamable $r12, 14, $noreg 466 renamable $r2, dead $cpsr = tADDi3 renamable $r3, 1, 14, $noreg 467 renamable $lr = t2LDRs renamable $r0, renamable $r2, 2, 14, $noreg 468 t2STRs killed renamable $r12, renamable $r0, killed renamable $r3, 2, 14, $noreg 469 renamable $r1 = t2LDRs killed renamable $r1, renamable $r2, 2, 14, $noreg 470 renamable $r1 = nsw t2MUL killed renamable $lr, killed renamable $r1, 14, $noreg 471 t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r2, 2, 14, $noreg 472 $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r10 473 tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc 474 475... 476