xref: /llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/matrix-debug.mir (revision 59c6bd156cc8b42758ce90909615748e21c6eee2) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve -run-pass=arm-low-overhead-loops %s -o - | FileCheck %s
3
4--- |
5  define dso_local arm_aapcscc void @test_debug(i32 %d, ptr %e, ptr nocapture readonly %k, ptr nocapture readonly %l) !dbg !15 {
6  entry:
7    call void @llvm.dbg.value(metadata i32 %d, metadata !23, metadata !DIExpression()), !dbg !32
8    call void @llvm.dbg.value(metadata ptr %e, metadata !24, metadata !DIExpression()), !dbg !32
9    call void @llvm.dbg.value(metadata ptr %k, metadata !25, metadata !DIExpression()), !dbg !32
10    call void @llvm.dbg.value(metadata ptr %l, metadata !26, metadata !DIExpression()), !dbg !32
11    call void @llvm.dbg.value(metadata i16 0, metadata !29, metadata !DIExpression()), !dbg !32
12    %call = tail call arm_aapcscc signext i16 @get_input(i32 %d, ptr %e, i16 signext 0) #4, !dbg !33
13    call void @llvm.dbg.value(metadata i16 %call, metadata !28, metadata !DIExpression()), !dbg !32
14    call void @llvm.dbg.value(metadata i32 0, metadata !30, metadata !DIExpression()), !dbg !32
15    %cmp30 = icmp sgt i32 %d, 0, !dbg !34
16    br i1 %cmp30, label %for.cond1.preheader.us.preheader, label %for.end11, !dbg !37
17
18  for.cond1.preheader.us.preheader:                 ; preds = %entry
19    %0 = shl i32 %d, 1, !dbg !37
20    br label %for.cond1.preheader.us, !dbg !37
21
22  for.cond1.preheader.us:                           ; preds = %for.cond1.preheader.us.preheader, %for.cond1.for.inc9_crit_edge.us
23    %lsr.iv2 = phi ptr [ %k, %for.cond1.preheader.us.preheader ], [ %9, %for.cond1.for.inc9_crit_edge.us ]
24    %i.031.us = phi i32 [ %inc10.us, %for.cond1.for.inc9_crit_edge.us ], [ 0, %for.cond1.preheader.us.preheader ]
25    call void @llvm.dbg.value(metadata i32 %i.031.us, metadata !30, metadata !DIExpression()), !dbg !32
26    call void @llvm.dbg.value(metadata i32 0, metadata !31, metadata !DIExpression()), !dbg !32
27    %arrayidx7.us = getelementptr inbounds i32, ptr %e, i32 %i.031.us, !dbg !38
28    %arrayidx7.promoted.us = load i32, ptr %arrayidx7.us, align 4, !dbg !41
29    %start = call i32 @llvm.start.loop.iterations.i32(i32 %d), !dbg !46
30    br label %for.body3.us, !dbg !46
31
32  for.body3.us:                                     ; preds = %for.body3.us, %for.cond1.preheader.us
33    %lsr.iv5 = phi ptr [ %scevgep6, %for.body3.us ], [ %lsr.iv2, %for.cond1.preheader.us ], !dbg !32
34    %lsr.iv1 = phi ptr [ %scevgep, %for.body3.us ], [ %l, %for.cond1.preheader.us ], !dbg !32
35    %add829.us = phi i32 [ %arrayidx7.promoted.us, %for.cond1.preheader.us ], [ %add8.us, %for.body3.us ], !dbg !32
36    %1 = phi i32 [ %start, %for.cond1.preheader.us ], [ %4, %for.body3.us ], !dbg !32
37    call void @llvm.dbg.value(metadata i32 undef, metadata !31, metadata !DIExpression()), !dbg !32
38    %2 = load i16, ptr %lsr.iv5, align 2, !dbg !47
39    %conv.us = sext i16 %2 to i32, !dbg !47
40    %3 = load i16, ptr %lsr.iv1, align 2, !dbg !50
41    %conv5.us = sext i16 %3 to i32, !dbg !50
42    %mul6.us = mul nsw i32 %conv5.us, %conv.us, !dbg !51
43    %add8.us = add nsw i32 %mul6.us, %add829.us, !dbg !41
44    call void @llvm.dbg.value(metadata i32 undef, metadata !31, metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)), !dbg !32
45    %scevgep = getelementptr i16, ptr %lsr.iv1, i32 1, !dbg !52
46    %scevgep6 = getelementptr i16, ptr %lsr.iv5, i32 1, !dbg !52
47    %4 = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %1, i32 1), !dbg !46
48    %5 = icmp ne i32 %4, 0, !dbg !46
49    br i1 %5, label %for.body3.us, label %for.cond1.for.inc9_crit_edge.us, !dbg !46, !llvm.loop !53
50
51  for.cond1.for.inc9_crit_edge.us:                  ; preds = %for.body3.us
52    %6 = bitcast ptr %lsr.iv2 to ptr
53    %sunkaddr = mul i32 %i.031.us, 4, !dbg !41
54    %7 = bitcast ptr %e to ptr, !dbg !41
55    %sunkaddr7 = getelementptr inbounds i8, ptr %7, i32 %sunkaddr, !dbg !41
56    %8 = bitcast ptr %sunkaddr7 to ptr, !dbg !41
57    store i32 %add8.us, ptr %8, align 4, !dbg !41
58    %inc10.us = add nuw nsw i32 %i.031.us, 1, !dbg !55
59    call void @llvm.dbg.value(metadata i32 %inc10.us, metadata !30, metadata !DIExpression()), !dbg !32
60    %scevgep4 = getelementptr i1, ptr %6, i32 %0, !dbg !37
61    %9 = bitcast ptr %scevgep4 to ptr, !dbg !37
62    %exitcond33 = icmp eq i32 %inc10.us, %d, !dbg !34
63    br i1 %exitcond33, label %for.end11, label %for.cond1.preheader.us, !dbg !37, !llvm.loop !56
64
65  for.end11:                                        ; preds = %for.cond1.for.inc9_crit_edge.us, %entry
66    ret void, !dbg !58
67  }
68  declare !dbg !4 dso_local arm_aapcscc signext i16 @get_input(i32, ptr, i16 signext)
69  declare void @llvm.dbg.value(metadata, metadata, metadata)
70  declare i32 @llvm.start.loop.iterations.i32(i32)
71  declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32)
72
73  !llvm.dbg.cu = !{!0}
74  !llvm.module.flags = !{!10, !11, !12, !13}
75  !llvm.ident = !{!14}
76
77  !0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, producer: "clang version 10.0.0 (https://github.com/llvm/llvm-project.git 9c91d79dadc660cb6a0ec736389341debd8cd118)", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2, retainedTypes: !3, splitDebugInlining: false, nameTableKind: None)
78  !1 = !DIFile(filename: "matrix-hang.c", directory: "/home/sampar01/src/tests/tail-predication")
79  !2 = !{}
80  !3 = !{!4}
81  !4 = !DISubprogram(name: "get_input", scope: !1, file: !1, line: 4, type: !5, flags: DIFlagPrototyped, spFlags: DISPFlagOptimized, retainedNodes: !2)
82  !5 = !DISubroutineType(types: !6)
83  !6 = !{!7, !8, !9, !7}
84  !7 = !DIBasicType(name: "short", size: 16, encoding: DW_ATE_signed)
85  !8 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
86  !9 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !8, size: 32)
87  !10 = !{i32 7, !"Dwarf Version", i32 4}
88  !11 = !{i32 2, !"Debug Info Version", i32 3}
89  !12 = !{i32 1, !"wchar_size", i32 4}
90  !13 = !{i32 1, !"min_enum_size", i32 4}
91  !14 = !{!"clang version 10.0.0 (https://github.com/llvm/llvm-project.git 9c91d79dadc660cb6a0ec736389341debd8cd118)"}
92  !15 = distinct !DISubprogram(name: "test_debug", scope: !1, file: !1, line: 6, type: !16, scopeLine: 6, flags: DIFlagPrototyped | DIFlagAllCallsDescribed, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0, retainedNodes: !22)
93  !16 = !DISubroutineType(types: !17)
94  !17 = !{null, !18, !19, !21, !21}
95  !18 = !DIDerivedType(tag: DW_TAG_typedef, name: "a", file: !1, line: 1, baseType: !8)
96  !19 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !20, size: 32)
97  !20 = !DIDerivedType(tag: DW_TAG_typedef, name: "b", file: !1, line: 2, baseType: !8)
98  !21 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !7, size: 32)
99  !22 = !{!23, !24, !25, !26, !27, !28, !29, !30, !31}
100  !23 = !DILocalVariable(name: "d", arg: 1, scope: !15, file: !1, line: 6, type: !18)
101  !24 = !DILocalVariable(name: "e", arg: 2, scope: !15, file: !1, line: 6, type: !19)
102  !25 = !DILocalVariable(name: "k", arg: 3, scope: !15, file: !1, line: 6, type: !21)
103  !26 = !DILocalVariable(name: "l", arg: 4, scope: !15, file: !1, line: 6, type: !21)
104  !27 = !DILocalVariable(name: "m", scope: !15, file: !1, line: 7, type: !7)
105  !28 = !DILocalVariable(name: "n", scope: !15, file: !1, line: 7, type: !7)
106  !29 = !DILocalVariable(name: "clipval", scope: !15, file: !1, line: 7, type: !7)
107  !30 = !DILocalVariable(name: "i", scope: !15, file: !1, line: 9, type: !18)
108  !31 = !DILocalVariable(name: "j", scope: !15, file: !1, line: 9, type: !18)
109  !32 = !DILocation(line: 0, scope: !15)
110  !33 = !DILocation(line: 8, column: 7, scope: !15)
111  !34 = !DILocation(line: 10, column: 17, scope: !35)
112  !35 = distinct !DILexicalBlock(scope: !36, file: !1, line: 10, column: 3)
113  !36 = distinct !DILexicalBlock(scope: !15, file: !1, line: 10, column: 3)
114  !37 = !DILocation(line: 10, column: 3, scope: !36)
115  !38 = !DILocation(line: 0, scope: !39)
116  !39 = distinct !DILexicalBlock(scope: !40, file: !1, line: 11, column: 5)
117  !40 = distinct !DILexicalBlock(scope: !35, file: !1, line: 11, column: 5)
118  !41 = !DILocation(line: 12, column: 12, scope: !39)
119  !42 = !{!43, !43, i64 0}
120  !43 = !{!"int", !44, i64 0}
121  !44 = !{!"omnipotent char", !45, i64 0}
122  !45 = !{!"Simple C/C++ TBAA"}
123  !46 = !DILocation(line: 11, column: 5, scope: !40)
124  !47 = !DILocation(line: 12, column: 15, scope: !39)
125  !48 = !{!49, !49, i64 0}
126  !49 = !{!"short", !44, i64 0}
127  !50 = !DILocation(line: 12, column: 30, scope: !39)
128  !51 = !DILocation(line: 12, column: 28, scope: !39)
129  !52 = !DILocation(line: 11, column: 19, scope: !39)
130  !53 = distinct !{!53, !46, !54}
131  !54 = !DILocation(line: 12, column: 33, scope: !40)
132  !55 = !DILocation(line: 10, column: 23, scope: !35)
133  !56 = distinct !{!56, !37, !57}
134  !57 = !DILocation(line: 12, column: 33, scope: !36)
135  !58 = !DILocation(line: 13, column: 1, scope: !15)
136
137...
138---
139name:            test_debug
140alignment:       2
141exposesReturnsTwice: false
142legalized:       false
143regBankSelected: false
144selected:        false
145failedISel:      false
146tracksRegLiveness: true
147hasWinCFI:       false
148registers:       []
149liveins:
150  - { reg: '$r0', virtual-reg: '' }
151  - { reg: '$r1', virtual-reg: '' }
152  - { reg: '$r2', virtual-reg: '' }
153  - { reg: '$r3', virtual-reg: '' }
154frameInfo:
155  isFrameAddressTaken: false
156  isReturnAddressTaken: false
157  hasStackMap:     false
158  hasPatchPoint:   false
159  stackSize:       32
160  offsetAdjustment: -24
161  maxAlignment:    4
162  adjustsStack:    true
163  hasCalls:        true
164  stackProtector:  ''
165  maxCallFrameSize: 0
166  cvBytesOfCalleeSavedRegisters: 0
167  hasOpaqueSPAdjustment: false
168  hasVAStart:      false
169  hasMustTailInVarArgFunc: false
170  localFrameSize:  0
171  savePoint:       ''
172  restorePoint:    ''
173fixedStack:      []
174stack:
175  - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
176      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
177      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
178  - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
179      stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true,
180      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
181  - { id: 2, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4,
182      stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true,
183      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
184  - { id: 3, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4,
185      stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true,
186      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
187  - { id: 4, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4,
188      stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
189      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
190  - { id: 5, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4,
191      stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true,
192      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
193  - { id: 6, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4,
194      stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true,
195      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
196  - { id: 7, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4,
197      stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true,
198      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
199callSites:       []
200constants:       []
201machineFunctionInfo: {}
202body:             |
203  ; CHECK-LABEL: name: test_debug
204  ; CHECK: bb.0.entry:
205  ; CHECK-NEXT:   successors: %bb.1(0x50000000), %bb.5(0x30000000)
206  ; CHECK-NEXT:   liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $lr, $r8, $r9, $r10
207  ; CHECK-NEXT: {{  $}}
208  ; CHECK-NEXT:   DBG_VALUE $r0, $noreg, !23, !DIExpression(), debug-location !32
209  ; CHECK-NEXT:   DBG_VALUE $r1, $noreg, !24, !DIExpression(), debug-location !32
210  ; CHECK-NEXT:   DBG_VALUE $r2, $noreg, !25, !DIExpression(), debug-location !32
211  ; CHECK-NEXT:   DBG_VALUE $r3, $noreg, !26, !DIExpression(), debug-location !32
212  ; CHECK-NEXT:   frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp
213  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa_offset 20
214  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $lr, -4
215  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r7, -8
216  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r6, -12
217  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r5, -16
218  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r4, -20
219  ; CHECK-NEXT:   $r7 = frame-setup tADDrSPi $sp, 3, 14 /* CC::al */, $noreg
220  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa $r7, 8
221  ; CHECK-NEXT:   $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r8, killed $r9, killed $r10
222  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r10, -24
223  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r9, -28
224  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r8, -32
225  ; CHECK-NEXT:   $r5 = tMOVr killed $r2, 14 /* CC::al */, $noreg
226  ; CHECK-NEXT:   DBG_VALUE $r5, $noreg, !25, !DIExpression(), debug-location !32
227  ; CHECK-NEXT:   $r2, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg, debug-location !33
228  ; CHECK-NEXT:   $r8 = tMOVr killed $r3, 14 /* CC::al */, $noreg
229  ; CHECK-NEXT:   DBG_VALUE $r8, $noreg, !26, !DIExpression(), debug-location !32
230  ; CHECK-NEXT:   $r9 = tMOVr $r1, 14 /* CC::al */, $noreg
231  ; CHECK-NEXT:   DBG_VALUE $r9, $noreg, !24, !DIExpression(), debug-location !32
232  ; CHECK-NEXT:   $r10 = tMOVr $r0, 14 /* CC::al */, $noreg
233  ; CHECK-NEXT:   DBG_VALUE 0, $noreg, !29, !DIExpression(), debug-location !32
234  ; CHECK-NEXT:   DBG_VALUE $r10, $noreg, !23, !DIExpression(), debug-location !32
235  ; CHECK-NEXT:   tBL 14 /* CC::al */, $noreg, @get_input, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit-def $sp, implicit-def dead $r0, debug-location !33
236  ; CHECK-NEXT:   DBG_VALUE 0, $noreg, !30, !DIExpression(), debug-location !32
237  ; CHECK-NEXT:   DBG_VALUE $noreg, $noreg, !28, !DIExpression(), debug-location !32
238  ; CHECK-NEXT:   t2CMPri renamable $r10, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr, debug-location !37
239  ; CHECK-NEXT:   tBcc %bb.5, 11 /* CC::lt */, killed $cpsr, debug-location !37
240  ; CHECK-NEXT: {{  $}}
241  ; CHECK-NEXT: bb.1.for.cond1.preheader.us.preheader:
242  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
243  ; CHECK-NEXT:   liveins: $r5, $r8, $r9, $r10
244  ; CHECK-NEXT: {{  $}}
245  ; CHECK-NEXT:   renamable $r12 = t2LSLri renamable $r10, 1, 14 /* CC::al */, $noreg, $noreg, debug-location !37
246  ; CHECK-NEXT:   renamable $r1, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
247  ; CHECK-NEXT: {{  $}}
248  ; CHECK-NEXT: bb.2.for.cond1.preheader.us:
249  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
250  ; CHECK-NEXT:   liveins: $r1, $r5, $r8, $r9, $r10, $r12
251  ; CHECK-NEXT: {{  $}}
252  ; CHECK-NEXT:   DBG_VALUE $r1, $noreg, !30, !DIExpression(), debug-location !32
253  ; CHECK-NEXT:   DBG_VALUE 0, $noreg, !31, !DIExpression(), debug-location !32
254  ; CHECK-NEXT:   renamable $r2 = t2LDRs renamable $r9, renamable $r1, 2, 14 /* CC::al */, $noreg, debug-location !41 :: (load (s32) from %ir.arrayidx7.us)
255  ; CHECK-NEXT:   $r3 = tMOVr $r5, 14 /* CC::al */, $noreg, debug-location !32
256  ; CHECK-NEXT:   $r0 = tMOVr $r8, 14 /* CC::al */, $noreg, debug-location !32
257  ; CHECK-NEXT:   dead $lr = tMOVr $r10, 14 /* CC::al */, $noreg, debug-location !32
258  ; CHECK-NEXT:   $lr = t2DLS renamable $r10, debug-location !42
259  ; CHECK-NEXT: {{  $}}
260  ; CHECK-NEXT: bb.3.for.body3.us:
261  ; CHECK-NEXT:   successors: %bb.3(0x7c000000), %bb.4(0x04000000)
262  ; CHECK-NEXT:   liveins: $lr, $r0, $r1, $r2, $r3, $r5, $r8, $r9, $r10, $r12
263  ; CHECK-NEXT: {{  $}}
264  ; CHECK-NEXT:   DBG_VALUE $noreg, $noreg, !31, !DIExpression(), debug-location !32
265  ; CHECK-NEXT:   renamable $r6, renamable $r3 = t2LDRSH_POST killed renamable $r3, 2, 14 /* CC::al */, $noreg, debug-location !43 :: (load (s16) from %ir.lsr.iv5)
266  ; CHECK-NEXT:   renamable $r4, renamable $r0 = t2LDRSH_POST killed renamable $r0, 2, 14 /* CC::al */, $noreg, debug-location !44 :: (load (s16) from %ir.lsr.iv1)
267  ; CHECK-NEXT:   renamable $r2 = nsw t2SMLABB killed renamable $r4, killed renamable $r6, killed renamable $r2, 14 /* CC::al */, $noreg, debug-location !41
268  ; CHECK-NEXT:   DBG_VALUE $noreg, $noreg, !31, !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value), debug-location !32
269  ; CHECK-NEXT:   $lr = t2LEUpdate killed renamable $lr, %bb.3, debug-location !42
270  ; CHECK-NEXT: {{  $}}
271  ; CHECK-NEXT: bb.4.for.cond1.for.inc9_crit_edge.us:
272  ; CHECK-NEXT:   successors: %bb.5(0x04000000), %bb.2(0x7c000000)
273  ; CHECK-NEXT:   liveins: $r1, $r2, $r5, $r8, $r9, $r10, $r12
274  ; CHECK-NEXT: {{  $}}
275  ; CHECK-NEXT:   t2STRs killed renamable $r2, renamable $r9, renamable $r1, 2, 14 /* CC::al */, $noreg, debug-location !41 :: (store (s32) into %ir.8)
276  ; CHECK-NEXT:   renamable $r1, dead $cpsr = nuw nsw tADDi8 killed renamable $r1, 1, 14 /* CC::al */, $noreg, debug-location !49
277  ; CHECK-NEXT:   DBG_VALUE $r1, $noreg, !30, !DIExpression(), debug-location !32
278  ; CHECK-NEXT:   renamable $r5 = tADDhirr killed renamable $r5, renamable $r12, 14 /* CC::al */, $noreg, debug-location !37
279  ; CHECK-NEXT:   tCMPhir renamable $r1, renamable $r10, 14 /* CC::al */, $noreg, implicit-def $cpsr, debug-location !37
280  ; CHECK-NEXT:   tBcc %bb.2, 1 /* CC::ne */, killed $cpsr, debug-location !37
281  ; CHECK-NEXT: {{  $}}
282  ; CHECK-NEXT: bb.5.for.end11:
283  ; CHECK-NEXT:   $sp = t2LDMIA_UPD $sp, 14 /* CC::al */, $noreg, def $r8, def $r9, def $r10, debug-location !52
284  ; CHECK-NEXT:   tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc, debug-location !52
285  bb.0.entry:
286    successors: %bb.1(0x50000000), %bb.5(0x30000000)
287    liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $lr, $r8, $r9, $r10
288
289    DBG_VALUE $r0, $noreg, !23, !DIExpression(), debug-location !32
290    DBG_VALUE $r1, $noreg, !24, !DIExpression(), debug-location !32
291    DBG_VALUE $r2, $noreg, !25, !DIExpression(), debug-location !32
292    DBG_VALUE $r3, $noreg, !26, !DIExpression(), debug-location !32
293    frame-setup tPUSH 14, $noreg, killed $r4, killed $r5, killed $r6, killed $lr, implicit-def $sp, implicit $sp
294    frame-setup CFI_INSTRUCTION def_cfa_offset 20
295    frame-setup CFI_INSTRUCTION offset $lr, -4
296    frame-setup CFI_INSTRUCTION offset $r7, -8
297    frame-setup CFI_INSTRUCTION offset $r6, -12
298    frame-setup CFI_INSTRUCTION offset $r5, -16
299    frame-setup CFI_INSTRUCTION offset $r4, -20
300    $r7 = frame-setup tADDrSPi $sp, 3, 14, $noreg
301    frame-setup CFI_INSTRUCTION def_cfa $r7, 8
302    $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r8, killed $r9, killed $r10
303    frame-setup CFI_INSTRUCTION offset $r10, -24
304    frame-setup CFI_INSTRUCTION offset $r9, -28
305    frame-setup CFI_INSTRUCTION offset $r8, -32
306    $r5 = tMOVr killed $r2, 14, $noreg
307    DBG_VALUE $r5, $noreg, !25, !DIExpression(), debug-location !32
308    $r2, dead $cpsr = tMOVi8 0, 14, $noreg, debug-location !33
309    $r8 = tMOVr killed $r3, 14, $noreg
310    DBG_VALUE $r8, $noreg, !26, !DIExpression(), debug-location !32
311    $r9 = tMOVr $r1, 14, $noreg
312    DBG_VALUE $r9, $noreg, !24, !DIExpression(), debug-location !32
313    $r10 = tMOVr $r0, 14, $noreg
314    DBG_VALUE 0, $noreg, !29, !DIExpression(), debug-location !32
315    DBG_VALUE $r10, $noreg, !23, !DIExpression(), debug-location !32
316    tBL 14, $noreg, @get_input, csr_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $r0, implicit killed $r1, implicit killed $r2, implicit-def $sp, implicit-def dead $r0, debug-location !33
317    DBG_VALUE 0, $noreg, !30, !DIExpression(), debug-location !32
318    DBG_VALUE $noreg, $noreg, !28, !DIExpression(), debug-location !32
319    t2CMPri renamable $r10, 1, 14, $noreg, implicit-def $cpsr, debug-location !37
320    tBcc %bb.5, 11, killed $cpsr, debug-location !37
321
322  bb.1.for.cond1.preheader.us.preheader:
323    successors: %bb.2(0x80000000)
324    liveins: $r5, $r8, $r9, $r10
325
326    renamable $r12 = t2LSLri renamable $r10, 1, 14, $noreg, $noreg, debug-location !37
327    renamable $r1, dead $cpsr = tMOVi8 0, 14, $noreg
328
329  bb.2.for.cond1.preheader.us:
330    successors: %bb.3(0x80000000)
331    liveins: $r1, $r5, $r8, $r9, $r10, $r12
332
333    DBG_VALUE $r1, $noreg, !30, !DIExpression(), debug-location !32
334    DBG_VALUE 0, $noreg, !31, !DIExpression(), debug-location !32
335    renamable $r2 = t2LDRs renamable $r9, renamable $r1, 2, 14, $noreg, debug-location !41 :: (load (s32) from %ir.arrayidx7.us)
336    $r3 = tMOVr $r5, 14, $noreg, debug-location !32
337    $r0 = tMOVr $r8, 14, $noreg, debug-location !32
338    $lr = tMOVr $r10, 14, $noreg, debug-location !32
339    $lr = t2DoLoopStart renamable $r10, debug-location !46
340
341  bb.3.for.body3.us:
342    successors: %bb.3(0x7c000000), %bb.4(0x04000000)
343    liveins: $lr, $r0, $r1, $r2, $r3, $r5, $r8, $r9, $r10, $r12
344
345    DBG_VALUE $noreg, $noreg, !31, !DIExpression(), debug-location !32
346    renamable $r6, renamable $r3 = t2LDRSH_POST killed renamable $r3, 2, 14, $noreg, debug-location !47 :: (load (s16) from %ir.lsr.iv5)
347    renamable $lr = t2LoopDec killed renamable $lr, 1, debug-location !46
348    renamable $r4, renamable $r0 = t2LDRSH_POST killed renamable $r0, 2, 14, $noreg, debug-location !50 :: (load (s16) from %ir.lsr.iv1)
349    renamable $r2 = nsw t2SMLABB killed renamable $r4, killed renamable $r6, killed renamable $r2, 14, $noreg, debug-location !41
350    DBG_VALUE $noreg, $noreg, !31, !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value), debug-location !32
351    t2LoopEnd renamable $lr, %bb.3, implicit-def dead $cpsr, debug-location !46
352    tB %bb.4, 14, $noreg, debug-location !46
353
354  bb.4.for.cond1.for.inc9_crit_edge.us:
355    successors: %bb.5(0x04000000), %bb.2(0x7c000000)
356    liveins: $r1, $r2, $r5, $r8, $r9, $r10, $r12
357
358    t2STRs killed renamable $r2, renamable $r9, renamable $r1, 2, 14, $noreg, debug-location !41 :: (store (s32) into %ir.8)
359    renamable $r1, dead $cpsr = nuw nsw tADDi8 killed renamable $r1, 1, 14, $noreg, debug-location !55
360    DBG_VALUE $r1, $noreg, !30, !DIExpression(), debug-location !32
361    renamable $r5 = tADDhirr killed renamable $r5, renamable $r12, 14, $noreg, debug-location !37
362    tCMPhir renamable $r1, renamable $r10, 14, $noreg, implicit-def $cpsr, debug-location !37
363    tBcc %bb.2, 1, killed $cpsr, debug-location !37
364
365  bb.5.for.end11:
366    $sp = t2LDMIA_UPD $sp, 14, $noreg, def $r8, def $r9, def $r10, debug-location !58
367    tPOP_RET 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $pc, debug-location !58
368
369...
370