1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py 2# RUN: llc -mtriple=thumbv8.1m.main -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s 3 4--- | 5 define dso_local arm_aapcscc i32 @test1(ptr nocapture %arg, ptr nocapture readonly %arg1, ptr nocapture readonly %arg2, i32 %arg3) { 6 bb: 7 %tmp = icmp eq i32 %arg3, 0 8 br i1 %tmp, label %bb27, label %bb4 9 10 bb4: ; preds = %bb 11 %tmp5 = add i32 %arg3, -1 12 %tmp6 = and i32 %arg3, 3 13 %tmp7 = icmp ult i32 %tmp5, 3 14 %tmp8 = add i32 %arg3, -4 15 %tmp9 = sub i32 %tmp8, %tmp6 16 %tmp10 = lshr i32 %tmp9, 2 17 %tmp11 = add nuw nsw i32 %tmp10, 1 18 br i1 %tmp7, label %bb13, label %bb12 19 20 bb12: ; preds = %bb4 21 %start = call i32 @llvm.start.loop.iterations.i32(i32 %tmp11) 22 br label %bb28 23 24 bb13: ; preds = %bb28, %bb4 25 %tmp14 = phi i32 [ 0, %bb4 ], [ %tmp54, %bb28 ] 26 %exit.count = phi i32 [ 0, %bb4 ], [ %loop.dec, %bb28 ] 27 %tmp15 = icmp eq i32 %tmp6, 0 28 br i1 %tmp15, label %bb27, label %bb16 29 30 bb16: ; preds = %bb13 31 %tmp17 = getelementptr inbounds i32, ptr %arg1, i32 %tmp14 32 %tmp18 = load i32, ptr %tmp17, align 4 33 %tmp19 = getelementptr inbounds i32, ptr %arg2, i32 %tmp14 34 %tmp20 = load i32, ptr %tmp19, align 4 35 %tmp21 = xor i32 %tmp20, %tmp18 36 %tmp22 = getelementptr inbounds i32, ptr %arg, i32 %tmp14 37 %tmp23 = load i32, ptr %tmp22, align 4 38 %tmp24 = add nsw i32 %tmp23, %tmp21 39 store i32 %tmp24, ptr %tmp22, align 4 40 %tmp25 = add nuw i32 %tmp14, 1 41 %tmp26 = icmp eq i32 %tmp6, 1 42 br i1 %tmp26, label %bb27, label %bb57 43 44 bb27: ; preds = %bb68, %bb57, %bb16, %bb13, %bb 45 %res = phi i32 [ %exit.count, %bb13 ], [ 3, %bb68 ], [ 2, %bb57 ], [ 1, %bb16 ], [ 0, %bb ] 46 ret i32 %res 47 48 bb28: ; preds = %bb28, %bb12 49 %lsr.iv15 = phi i32 [ %lsr.iv.next16, %bb28 ], [ %start, %bb12 ] 50 %lsr.iv = phi i32 [ %lsr.iv.next, %bb28 ], [ 0, %bb12 ] 51 %tmp29 = phi i32 [ 0, %bb12 ], [ %tmp54, %bb28 ] 52 %0 = bitcast ptr %arg1 to ptr 53 %1 = bitcast ptr %arg2 to ptr 54 %2 = bitcast ptr %arg to ptr 55 %uglygep14 = getelementptr i8, ptr %0, i32 %lsr.iv 56 %uglygep1415 = bitcast ptr %uglygep14 to ptr 57 %scevgep617 = bitcast ptr %uglygep1415 to ptr 58 %tmp34 = load i32, ptr %scevgep617, align 4 59 %uglygep8 = getelementptr i8, ptr %1, i32 %lsr.iv 60 %uglygep89 = bitcast ptr %uglygep8 to ptr 61 %scevgep418 = bitcast ptr %uglygep89 to ptr 62 %tmp35 = load i32, ptr %scevgep418, align 4 63 %tmp36 = xor i32 %tmp35, %tmp34 64 %uglygep2 = getelementptr i8, ptr %2, i32 %lsr.iv 65 %uglygep23 = bitcast ptr %uglygep2 to ptr 66 %scevgep219 = bitcast ptr %uglygep23 to ptr 67 %tmp37 = load i32, ptr %scevgep219, align 4 68 %tmp38 = add nsw i32 %tmp37, %tmp36 69 store i32 %tmp38, ptr %scevgep219, align 4 70 %uglygep33 = getelementptr i8, ptr %0, i32 %lsr.iv 71 %uglygep3334 = bitcast ptr %uglygep33 to ptr 72 %scevgep14 = getelementptr i32, ptr %uglygep3334, i32 1 73 %tmp39 = load i32, ptr %scevgep14, align 4 74 %uglygep27 = getelementptr i8, ptr %1, i32 %lsr.iv 75 %uglygep2728 = bitcast ptr %uglygep27 to ptr 76 %scevgep11 = getelementptr i32, ptr %uglygep2728, i32 1 77 %tmp40 = load i32, ptr %scevgep11, align 4 78 %tmp41 = xor i32 %tmp40, %tmp39 79 %uglygep20 = getelementptr i8, ptr %2, i32 %lsr.iv 80 %uglygep2021 = bitcast ptr %uglygep20 to ptr 81 %scevgep9 = getelementptr i32, ptr %uglygep2021, i32 1 82 %tmp42 = load i32, ptr %scevgep9, align 4 83 %tmp43 = add nsw i32 %tmp42, %tmp41 84 store i32 %tmp43, ptr %scevgep9, align 4 85 %uglygep30 = getelementptr i8, ptr %0, i32 %lsr.iv 86 %uglygep3031 = bitcast ptr %uglygep30 to ptr 87 %scevgep12 = getelementptr i32, ptr %uglygep3031, i32 2 88 %tmp44 = load i32, ptr %scevgep12, align 4 89 %uglygep24 = getelementptr i8, ptr %1, i32 %lsr.iv 90 %uglygep2425 = bitcast ptr %uglygep24 to ptr 91 %scevgep10 = getelementptr i32, ptr %uglygep2425, i32 2 92 %tmp45 = load i32, ptr %scevgep10, align 4 93 %tmp46 = xor i32 %tmp45, %tmp44 94 %uglygep17 = getelementptr i8, ptr %2, i32 %lsr.iv 95 %uglygep1718 = bitcast ptr %uglygep17 to ptr 96 %scevgep8 = getelementptr i32, ptr %uglygep1718, i32 2 97 %tmp47 = load i32, ptr %scevgep8, align 4 98 %tmp48 = add nsw i32 %tmp47, %tmp46 99 store i32 %tmp48, ptr %scevgep8, align 4 100 %uglygep11 = getelementptr i8, ptr %0, i32 %lsr.iv 101 %uglygep1112 = bitcast ptr %uglygep11 to ptr 102 %scevgep5 = getelementptr i32, ptr %uglygep1112, i32 3 103 %tmp49 = load i32, ptr %scevgep5, align 4 104 %uglygep5 = getelementptr i8, ptr %1, i32 %lsr.iv 105 %uglygep56 = bitcast ptr %uglygep5 to ptr 106 %scevgep3 = getelementptr i32, ptr %uglygep56, i32 3 107 %tmp50 = load i32, ptr %scevgep3, align 4 108 %tmp51 = xor i32 %tmp50, %tmp49 109 %uglygep = getelementptr i8, ptr %2, i32 %lsr.iv 110 %uglygep1 = bitcast ptr %uglygep to ptr 111 %scevgep1 = getelementptr i32, ptr %uglygep1, i32 3 112 %tmp52 = load i32, ptr %scevgep1, align 4 113 %tmp53 = add nsw i32 %tmp52, %tmp51 114 store i32 %tmp53, ptr %scevgep1, align 4 115 %tmp54 = add nuw i32 %tmp29, 4 116 %lsr.iv.next = add i32 %lsr.iv, 16 117 %loop.dec = call i32 @llvm.loop.decrement.reg.i32.i32.i32(i32 %lsr.iv15, i32 1) 118 %tmp56 = icmp ne i32 %loop.dec, 0 119 %lsr.iv.next16 = add nsw i32 %lsr.iv15, -1 120 br i1 %tmp56, label %bb28, label %bb13 121 122 bb57: ; preds = %bb16 123 %tmp58 = getelementptr inbounds i32, ptr %arg1, i32 %tmp25 124 %tmp59 = load i32, ptr %tmp58, align 4 125 %tmp60 = getelementptr inbounds i32, ptr %arg2, i32 %tmp25 126 %tmp61 = load i32, ptr %tmp60, align 4 127 %tmp62 = xor i32 %tmp61, %tmp59 128 %tmp63 = getelementptr inbounds i32, ptr %arg, i32 %tmp25 129 %tmp64 = load i32, ptr %tmp63, align 4 130 %tmp65 = add nsw i32 %tmp64, %tmp62 131 store i32 %tmp65, ptr %tmp63, align 4 132 %tmp66 = add nuw i32 %tmp14, 2 133 %tmp67 = icmp eq i32 %tmp6, 2 134 br i1 %tmp67, label %bb27, label %bb68 135 136 bb68: ; preds = %bb57 137 %tmp69 = getelementptr inbounds i32, ptr %arg1, i32 %tmp66 138 %tmp70 = load i32, ptr %tmp69, align 4 139 %tmp71 = getelementptr inbounds i32, ptr %arg2, i32 %tmp66 140 %tmp72 = load i32, ptr %tmp71, align 4 141 %tmp73 = xor i32 %tmp72, %tmp70 142 %tmp74 = getelementptr inbounds i32, ptr %arg, i32 %tmp66 143 %tmp75 = load i32, ptr %tmp74, align 4 144 %tmp76 = add nsw i32 %tmp75, %tmp73 145 store i32 %tmp76, ptr %tmp74, align 4 146 br label %bb27 147 } 148 149 declare i32 @llvm.start.loop.iterations.i32(i32) 150 declare i32 @llvm.loop.decrement.reg.i32.i32.i32(i32, i32) 151 152... 153--- 154name: test1 155alignment: 2 156exposesReturnsTwice: false 157legalized: false 158regBankSelected: false 159selected: false 160failedISel: false 161tracksRegLiveness: true 162hasWinCFI: false 163registers: [] 164liveins: 165 - { reg: '$r0', virtual-reg: '' } 166 - { reg: '$r1', virtual-reg: '' } 167 - { reg: '$r2', virtual-reg: '' } 168 - { reg: '$r3', virtual-reg: '' } 169frameInfo: 170 isFrameAddressTaken: false 171 isReturnAddressTaken: false 172 hasStackMap: false 173 hasPatchPoint: false 174 stackSize: 40 175 offsetAdjustment: 0 176 maxAlignment: 4 177 adjustsStack: false 178 hasCalls: false 179 stackProtector: '' 180 maxCallFrameSize: 0 181 cvBytesOfCalleeSavedRegisters: 0 182 hasOpaqueSPAdjustment: false 183 hasVAStart: false 184 hasMustTailInVarArgFunc: false 185 localFrameSize: 0 186 savePoint: '' 187 restorePoint: '' 188fixedStack: [] 189stack: 190 - { id: 0, name: '', type: spill-slot, offset: -40, size: 4, alignment: 4, 191 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 192 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 193 - { id: 1, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4, 194 stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false, 195 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 196 - { id: 2, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4, 197 stack-id: default, callee-saved-register: '$r11', callee-saved-restored: true, 198 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 199 - { id: 3, name: '', type: spill-slot, offset: -12, size: 4, alignment: 4, 200 stack-id: default, callee-saved-register: '$r10', callee-saved-restored: true, 201 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 202 - { id: 4, name: '', type: spill-slot, offset: -16, size: 4, alignment: 4, 203 stack-id: default, callee-saved-register: '$r9', callee-saved-restored: true, 204 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 205 - { id: 5, name: '', type: spill-slot, offset: -20, size: 4, alignment: 4, 206 stack-id: default, callee-saved-register: '$r8', callee-saved-restored: true, 207 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 208 - { id: 6, name: '', type: spill-slot, offset: -24, size: 4, alignment: 4, 209 stack-id: default, callee-saved-register: '$r7', callee-saved-restored: true, 210 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 211 - { id: 7, name: '', type: spill-slot, offset: -28, size: 4, alignment: 4, 212 stack-id: default, callee-saved-register: '$r6', callee-saved-restored: true, 213 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 214 - { id: 8, name: '', type: spill-slot, offset: -32, size: 4, alignment: 4, 215 stack-id: default, callee-saved-register: '$r5', callee-saved-restored: true, 216 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 217 - { id: 9, name: '', type: spill-slot, offset: -36, size: 4, alignment: 4, 218 stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true, 219 debug-info-variable: '', debug-info-expression: '', debug-info-location: '' } 220callSites: [] 221constants: [] 222machineFunctionInfo: {} 223body: | 224 ; CHECK-LABEL: name: test1 225 ; CHECK: bb.0.bb: 226 ; CHECK-NEXT: successors: %bb.3(0x30000000), %bb.1(0x50000000) 227 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11 228 ; CHECK-NEXT: {{ $}} 229 ; CHECK-NEXT: $sp = frame-setup t2STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr 230 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 36 231 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -4 232 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r11, -8 233 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r10, -12 234 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r9, -16 235 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r8, -20 236 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r7, -24 237 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r6, -28 238 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r5, -32 239 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $r4, -36 240 ; CHECK-NEXT: $sp = frame-setup tSUBspi $sp, 1, 14 /* CC::al */, $noreg 241 ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 40 242 ; CHECK-NEXT: tCBZ $r3, %bb.3 243 ; CHECK-NEXT: {{ $}} 244 ; CHECK-NEXT: bb.1.bb4: 245 ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000) 246 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3 247 ; CHECK-NEXT: {{ $}} 248 ; CHECK-NEXT: renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14 /* CC::al */, $noreg 249 ; CHECK-NEXT: renamable $r7 = t2ANDri renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg 250 ; CHECK-NEXT: tCMPi8 killed renamable $r4, 3, 14 /* CC::al */, $noreg, implicit-def $cpsr 251 ; CHECK-NEXT: tSTRspi killed renamable $r7, $sp, 0, 14 /* CC::al */, $noreg :: (store (s32) into %stack.0) 252 ; CHECK-NEXT: tBcc %bb.4, 2 /* CC::hs */, killed $cpsr 253 ; CHECK-NEXT: {{ $}} 254 ; CHECK-NEXT: bb.2: 255 ; CHECK-NEXT: successors: %bb.6(0x80000000) 256 ; CHECK-NEXT: liveins: $r0, $r1, $r2 257 ; CHECK-NEXT: {{ $}} 258 ; CHECK-NEXT: renamable $r8 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 259 ; CHECK-NEXT: renamable $lr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 260 ; CHECK-NEXT: tB %bb.6, 14 /* CC::al */, $noreg 261 ; CHECK-NEXT: {{ $}} 262 ; CHECK-NEXT: bb.3: 263 ; CHECK-NEXT: successors: %bb.12(0x80000000) 264 ; CHECK-NEXT: {{ $}} 265 ; CHECK-NEXT: renamable $lr = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 266 ; CHECK-NEXT: tB %bb.12, 14 /* CC::al */, $noreg 267 ; CHECK-NEXT: {{ $}} 268 ; CHECK-NEXT: bb.4.bb12: 269 ; CHECK-NEXT: successors: %bb.5(0x80000000) 270 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r3 271 ; CHECK-NEXT: {{ $}} 272 ; CHECK-NEXT: renamable $r3 = t2BICri killed renamable $r3, 3, 14 /* CC::al */, $noreg, $noreg 273 ; CHECK-NEXT: renamable $r4, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg 274 ; CHECK-NEXT: renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg 275 ; CHECK-NEXT: renamable $r8 = t2MOVi 0, 14 /* CC::al */, $noreg, $noreg 276 ; CHECK-NEXT: renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg 277 ; CHECK-NEXT: dead $lr = t2DLS renamable $r3 278 ; CHECK-NEXT: $lr = tMOVr killed $r3, 14 /* CC::al */, $noreg 279 ; CHECK-NEXT: renamable $r3, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg 280 ; CHECK-NEXT: {{ $}} 281 ; CHECK-NEXT: bb.5.bb28: 282 ; CHECK-NEXT: successors: %bb.5(0x7c000000), %bb.6(0x04000000) 283 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r3, $r8 284 ; CHECK-NEXT: {{ $}} 285 ; CHECK-NEXT: renamable $r5 = tLDRr renamable $r1, $r3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep617) 286 ; CHECK-NEXT: renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14 /* CC::al */, $noreg 287 ; CHECK-NEXT: renamable $r6 = tLDRr renamable $r2, $r3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep418) 288 ; CHECK-NEXT: dead $r12 = tMOVr $lr, 14 /* CC::al */, $noreg 289 ; CHECK-NEXT: renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14 /* CC::al */, $noreg, $noreg 290 ; CHECK-NEXT: renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14 /* CC::al */, $noreg 291 ; CHECK-NEXT: renamable $r6 = tLDRr renamable $r0, $r3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep219) 292 ; CHECK-NEXT: renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14 /* CC::al */, $noreg 293 ; CHECK-NEXT: tSTRr killed renamable $r5, renamable $r0, $r3, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep219) 294 ; CHECK-NEXT: renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14 /* CC::al */, $noreg 295 ; CHECK-NEXT: renamable $r4 = tLDRi renamable $r7, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep11) 296 ; CHECK-NEXT: renamable $r6 = tLDRi renamable $r5, 1, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep14) 297 ; CHECK-NEXT: renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14 /* CC::al */, $noreg, $noreg 298 ; CHECK-NEXT: renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14 /* CC::al */, $noreg 299 ; CHECK-NEXT: $r11 = t2ADDri $r6, 4, 14 /* CC::al */, $noreg, $noreg 300 ; CHECK-NEXT: renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg 301 ; CHECK-NEXT: t2LDMIA killed $r11, 14 /* CC::al */, $noreg, def $r4, def $r10, def $r11 :: (load (s32) from %ir.scevgep9), (load (s32) from %ir.scevgep8), (load (s32) from %ir.scevgep1) 302 ; CHECK-NEXT: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14 /* CC::al */, $noreg 303 ; CHECK-NEXT: tSTRi killed renamable $r4, renamable $r6, 1, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep9) 304 ; CHECK-NEXT: renamable $r9 = t2LDRi12 renamable $r5, 8, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep12) 305 ; CHECK-NEXT: renamable $r4 = tLDRi renamable $r7, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep10) 306 ; CHECK-NEXT: renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14 /* CC::al */, $noreg, $noreg 307 ; CHECK-NEXT: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14 /* CC::al */, $noreg 308 ; CHECK-NEXT: tSTRi killed renamable $r4, renamable $r6, 2, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep8) 309 ; CHECK-NEXT: renamable $r4 = tLDRi killed renamable $r5, 3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep5) 310 ; CHECK-NEXT: renamable $r5 = tLDRi killed renamable $r7, 3, 14 /* CC::al */, $noreg :: (load (s32) from %ir.scevgep3) 311 ; CHECK-NEXT: renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14 /* CC::al */, $noreg 312 ; CHECK-NEXT: renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14 /* CC::al */, $noreg 313 ; CHECK-NEXT: tSTRi killed renamable $r4, killed renamable $r6, 3, 14 /* CC::al */, $noreg :: (store (s32) into %ir.scevgep1) 314 ; CHECK-NEXT: $lr = t2LEUpdate killed renamable $lr, %bb.5 315 ; CHECK-NEXT: {{ $}} 316 ; CHECK-NEXT: bb.6.bb13: 317 ; CHECK-NEXT: successors: %bb.12(0x30000000), %bb.7(0x50000000) 318 ; CHECK-NEXT: liveins: $lr, $r0, $r1, $r2, $r8 319 ; CHECK-NEXT: {{ $}} 320 ; CHECK-NEXT: renamable $r5 = tLDRspi $sp, 0, 14 /* CC::al */, $noreg :: (load (s32) from %stack.0) 321 ; CHECK-NEXT: tCBZ $r5, %bb.12 322 ; CHECK-NEXT: {{ $}} 323 ; CHECK-NEXT: bb.7.bb16: 324 ; CHECK-NEXT: successors: %bb.8(0x40000000), %bb.9(0x40000000) 325 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r5, $r8 326 ; CHECK-NEXT: {{ $}} 327 ; CHECK-NEXT: renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp17) 328 ; CHECK-NEXT: tCMPi8 renamable $r5, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr 329 ; CHECK-NEXT: renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp19) 330 ; CHECK-NEXT: renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14 /* CC::al */, $noreg, $noreg 331 ; CHECK-NEXT: renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp22) 332 ; CHECK-NEXT: renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14 /* CC::al */, $noreg 333 ; CHECK-NEXT: t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14 /* CC::al */, $noreg :: (store (s32) into %ir.tmp22) 334 ; CHECK-NEXT: tBcc %bb.9, 1 /* CC::ne */, killed $cpsr 335 ; CHECK-NEXT: {{ $}} 336 ; CHECK-NEXT: bb.8: 337 ; CHECK-NEXT: successors: %bb.12(0x80000000) 338 ; CHECK-NEXT: {{ $}} 339 ; CHECK-NEXT: renamable $lr = t2MOVi 1, 14 /* CC::al */, $noreg, $noreg 340 ; CHECK-NEXT: tB %bb.12, 14 /* CC::al */, $noreg 341 ; CHECK-NEXT: {{ $}} 342 ; CHECK-NEXT: bb.9.bb57: 343 ; CHECK-NEXT: successors: %bb.10(0x40000000), %bb.11(0x40000000) 344 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r5, $r8 345 ; CHECK-NEXT: {{ $}} 346 ; CHECK-NEXT: renamable $r3 = nuw t2ADDri renamable $r8, 1, 14 /* CC::al */, $noreg, $noreg 347 ; CHECK-NEXT: tCMPi8 killed renamable $r5, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr 348 ; CHECK-NEXT: renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp58) 349 ; CHECK-NEXT: renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp60) 350 ; CHECK-NEXT: renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14 /* CC::al */, $noreg, $noreg 351 ; CHECK-NEXT: renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp63) 352 ; CHECK-NEXT: renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14 /* CC::al */, $noreg 353 ; CHECK-NEXT: t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14 /* CC::al */, $noreg :: (store (s32) into %ir.tmp63) 354 ; CHECK-NEXT: tBcc %bb.11, 1 /* CC::ne */, killed $cpsr 355 ; CHECK-NEXT: {{ $}} 356 ; CHECK-NEXT: bb.10: 357 ; CHECK-NEXT: successors: %bb.12(0x80000000) 358 ; CHECK-NEXT: {{ $}} 359 ; CHECK-NEXT: renamable $lr = t2MOVi 2, 14 /* CC::al */, $noreg, $noreg 360 ; CHECK-NEXT: tB %bb.12, 14 /* CC::al */, $noreg 361 ; CHECK-NEXT: {{ $}} 362 ; CHECK-NEXT: bb.11.bb68: 363 ; CHECK-NEXT: successors: %bb.12(0x80000000) 364 ; CHECK-NEXT: liveins: $r0, $r1, $r2, $r8 365 ; CHECK-NEXT: {{ $}} 366 ; CHECK-NEXT: renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14 /* CC::al */, $noreg, $noreg 367 ; CHECK-NEXT: renamable $lr = t2MOVi 3, 14 /* CC::al */, $noreg, $noreg 368 ; CHECK-NEXT: renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp69) 369 ; CHECK-NEXT: renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp71) 370 ; CHECK-NEXT: renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14 /* CC::al */, $noreg 371 ; CHECK-NEXT: renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14 /* CC::al */, $noreg :: (load (s32) from %ir.tmp74) 372 ; CHECK-NEXT: renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14 /* CC::al */, $noreg 373 ; CHECK-NEXT: t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14 /* CC::al */, $noreg :: (store (s32) into %ir.tmp74) 374 ; CHECK-NEXT: {{ $}} 375 ; CHECK-NEXT: bb.12.bb27: 376 ; CHECK-NEXT: liveins: $lr 377 ; CHECK-NEXT: {{ $}} 378 ; CHECK-NEXT: $r0 = tMOVr killed $lr, 14 /* CC::al */, $noreg 379 ; CHECK-NEXT: $sp = tADDspi $sp, 1, 14 /* CC::al */, $noreg 380 ; CHECK-NEXT: $sp = t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc, implicit killed $r0 381 bb.0.bb: 382 successors: %bb.3(0x30000000), %bb.1(0x50000000) 383 liveins: $r0, $r1, $r2, $r3, $r4, $r5, $r6, $r7, $r8, $r9, $r10, $r11, $lr 384 385 $sp = frame-setup t2STMDB_UPD $sp, 14, $noreg, killed $r4, killed $r5, killed $r6, killed $r7, killed $r8, killed $r9, killed $r10, killed $r11, killed $lr 386 frame-setup CFI_INSTRUCTION def_cfa_offset 36 387 frame-setup CFI_INSTRUCTION offset $lr, -4 388 frame-setup CFI_INSTRUCTION offset $r11, -8 389 frame-setup CFI_INSTRUCTION offset $r10, -12 390 frame-setup CFI_INSTRUCTION offset $r9, -16 391 frame-setup CFI_INSTRUCTION offset $r8, -20 392 frame-setup CFI_INSTRUCTION offset $r7, -24 393 frame-setup CFI_INSTRUCTION offset $r6, -28 394 frame-setup CFI_INSTRUCTION offset $r5, -32 395 frame-setup CFI_INSTRUCTION offset $r4, -36 396 $sp = frame-setup tSUBspi $sp, 1, 14, $noreg 397 frame-setup CFI_INSTRUCTION def_cfa_offset 40 398 tCBZ $r3, %bb.3 399 400 bb.1.bb4: 401 successors: %bb.2(0x40000000), %bb.4(0x40000000) 402 liveins: $r0, $r1, $r2, $r3 403 404 renamable $r4, dead $cpsr = tSUBi3 renamable $r3, 1, 14, $noreg 405 renamable $r7 = t2ANDri renamable $r3, 3, 14, $noreg, $noreg 406 tCMPi8 killed renamable $r4, 3, 14, $noreg, implicit-def $cpsr 407 tSTRspi killed renamable $r7, $sp, 0, 14, $noreg :: (store (s32) into %stack.0) 408 tBcc %bb.4, 2, killed $cpsr 409 410 bb.2: 411 successors: %bb.6(0x80000000) 412 liveins: $r0, $r1, $r2 413 414 renamable $r8 = t2MOVi 0, 14, $noreg, $noreg 415 renamable $lr = t2MOVi 0, 14, $noreg, $noreg 416 tB %bb.6, 14, $noreg 417 418 bb.3: 419 successors: %bb.12(0x80000000) 420 421 renamable $lr = t2MOVi 0, 14, $noreg, $noreg 422 tB %bb.12, 14, $noreg 423 424 bb.4.bb12: 425 successors: %bb.5(0x80000000) 426 liveins: $r0, $r1, $r2, $r3 427 428 renamable $r3 = t2BICri killed renamable $r3, 3, 14, $noreg, $noreg 429 renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg 430 renamable $r3, dead $cpsr = tSUBi8 killed renamable $r3, 4, 14, $noreg 431 renamable $r8 = t2MOVi 0, 14, $noreg, $noreg 432 renamable $r3 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg 433 $lr = t2DoLoopStart renamable $r3 434 $lr = tMOVr killed $r3, 14, $noreg 435 renamable $r3, dead $cpsr = tMOVi8 0, 14, $noreg 436 437 bb.5.bb28: 438 successors: %bb.5(0x7c000000), %bb.6(0x04000000) 439 liveins: $r0, $r1, $r2, $r3, $r8, $lr 440 441 renamable $r5 = tLDRr renamable $r1, $r3, 14, $noreg :: (load (s32) from %ir.scevgep617) 442 renamable $r7, dead $cpsr = tADDrr renamable $r2, renamable $r3, 14, $noreg 443 renamable $r6 = tLDRr renamable $r2, $r3, 14, $noreg :: (load (s32) from %ir.scevgep418) 444 $r12 = tMOVr $lr, 14, $noreg 445 renamable $r8 = nuw t2ADDri killed renamable $r8, 4, 14, $noreg, $noreg 446 renamable $r5, dead $cpsr = tEOR killed renamable $r5, killed renamable $r6, 14, $noreg 447 renamable $r6 = tLDRr renamable $r0, $r3, 14, $noreg :: (load (s32) from %ir.scevgep219) 448 renamable $lr = t2LoopDec killed renamable $lr, 1 449 renamable $r5 = nsw tADDhirr killed renamable $r5, killed renamable $r6, 14, $noreg 450 tSTRr killed renamable $r5, renamable $r0, $r3, 14, $noreg :: (store (s32) into %ir.scevgep219) 451 renamable $r5, dead $cpsr = tADDrr renamable $r1, renamable $r3, 14, $noreg 452 renamable $r4 = tLDRi renamable $r7, 1, 14, $noreg :: (load (s32) from %ir.scevgep11) 453 renamable $r6 = tLDRi renamable $r5, 1, 14, $noreg :: (load (s32) from %ir.scevgep14) 454 renamable $r9 = t2EORrr killed renamable $r4, killed renamable $r6, 14, $noreg, $noreg 455 renamable $r6, dead $cpsr = tADDrr renamable $r0, renamable $r3, 14, $noreg 456 $r11 = t2ADDri $r6, 4, 14, $noreg, $noreg 457 renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 16, 14, $noreg 458 t2LDMIA killed $r11, 14, $noreg, def $r4, def $r10, def $r11 :: (load (s32) from %ir.scevgep9), (load (s32) from %ir.scevgep8), (load (s32) from %ir.scevgep1) 459 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r9, 14, $noreg 460 tSTRi killed renamable $r4, renamable $r6, 1, 14, $noreg :: (store (s32) into %ir.scevgep9) 461 renamable $r9 = t2LDRi12 renamable $r5, 8, 14, $noreg :: (load (s32) from %ir.scevgep12) 462 renamable $r4 = tLDRi renamable $r7, 2, 14, $noreg :: (load (s32) from %ir.scevgep10) 463 renamable $r4 = t2EORrr killed renamable $r4, killed renamable $r9, 14, $noreg, $noreg 464 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r10, 14, $noreg 465 tSTRi killed renamable $r4, renamable $r6, 2, 14, $noreg :: (store (s32) into %ir.scevgep8) 466 renamable $r4 = tLDRi killed renamable $r5, 3, 14, $noreg :: (load (s32) from %ir.scevgep5) 467 renamable $r5 = tLDRi killed renamable $r7, 3, 14, $noreg :: (load (s32) from %ir.scevgep3) 468 renamable $r4, dead $cpsr = tEOR killed renamable $r4, killed renamable $r5, 14, $noreg 469 renamable $r4 = nsw tADDhirr killed renamable $r4, killed renamable $r11, 14, $noreg 470 tSTRi killed renamable $r4, killed renamable $r6, 3, 14, $noreg :: (store (s32) into %ir.scevgep1) 471 t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr 472 tB %bb.6, 14, $noreg 473 474 bb.6.bb13: 475 successors: %bb.12(0x30000000), %bb.7(0x50000000) 476 liveins: $lr, $r0, $r1, $r2, $r8 477 478 renamable $r5 = tLDRspi $sp, 0, 14, $noreg :: (load (s32) from %stack.0) 479 tCBZ $r5, %bb.12 480 481 bb.7.bb16: 482 successors: %bb.8(0x40000000), %bb.9(0x40000000) 483 liveins: $r0, $r1, $r2, $r5, $r8 484 485 renamable $lr = t2LDRs renamable $r1, renamable $r8, 2, 14, $noreg :: (load (s32) from %ir.tmp17) 486 tCMPi8 renamable $r5, 1, 14, $noreg, implicit-def $cpsr 487 renamable $r3 = t2LDRs renamable $r2, renamable $r8, 2, 14, $noreg :: (load (s32) from %ir.tmp19) 488 renamable $lr = t2EORrr killed renamable $lr, killed renamable $r3, 14, $noreg, $noreg 489 renamable $r3 = t2LDRs renamable $r0, renamable $r8, 2, 14, $noreg :: (load (s32) from %ir.tmp22) 490 renamable $r3 = nsw tADDhirr killed renamable $r3, killed renamable $lr, 14, $noreg 491 t2STRs killed renamable $r3, renamable $r0, renamable $r8, 2, 14, $noreg :: (store (s32) into %ir.tmp22) 492 tBcc %bb.9, 1, killed $cpsr 493 494 bb.8: 495 successors: %bb.12(0x80000000) 496 497 renamable $lr = t2MOVi 1, 14, $noreg, $noreg 498 tB %bb.12, 14, $noreg 499 500 bb.9.bb57: 501 successors: %bb.10(0x40000000), %bb.11(0x40000000) 502 liveins: $r0, $r1, $r2, $r5, $r8 503 504 renamable $r3 = nuw t2ADDri renamable $r8, 1, 14, $noreg, $noreg 505 tCMPi8 killed renamable $r5, 2, 14, $noreg, implicit-def $cpsr 506 renamable $r7 = t2LDRs renamable $r1, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp58) 507 renamable $r6 = t2LDRs renamable $r2, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp60) 508 renamable $r7 = t2EORrr killed renamable $r7, killed renamable $r6, 14, $noreg, $noreg 509 renamable $r6 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp63) 510 renamable $r7 = nsw tADDhirr killed renamable $r7, killed renamable $r6, 14, $noreg 511 t2STRs killed renamable $r7, renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store (s32) into %ir.tmp63) 512 tBcc %bb.11, 1, killed $cpsr 513 514 bb.10: 515 successors: %bb.12(0x80000000) 516 517 renamable $lr = t2MOVi 2, 14, $noreg, $noreg 518 tB %bb.12, 14, $noreg 519 520 bb.11.bb68: 521 successors: %bb.12(0x80000000) 522 liveins: $r0, $r1, $r2, $r8 523 524 renamable $r3 = nuw t2ADDri killed renamable $r8, 2, 14, $noreg, $noreg 525 renamable $lr = t2MOVi 3, 14, $noreg, $noreg 526 renamable $r1 = t2LDRs killed renamable $r1, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp69) 527 renamable $r2 = t2LDRs killed renamable $r2, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp71) 528 renamable $r1, dead $cpsr = tEOR killed renamable $r1, killed renamable $r2, 14, $noreg 529 renamable $r2 = t2LDRs renamable $r0, renamable $r3, 2, 14, $noreg :: (load (s32) from %ir.tmp74) 530 renamable $r1 = nsw tADDhirr killed renamable $r1, killed renamable $r2, 14, $noreg 531 t2STRs killed renamable $r1, killed renamable $r0, killed renamable $r3, 2, 14, $noreg :: (store (s32) into %ir.tmp74) 532 533 bb.12.bb27: 534 liveins: $lr 535 536 $r0 = tMOVr killed $lr, 14, $noreg 537 $sp = tADDspi $sp, 1, 14, $noreg 538 $sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $r5, def $r6, def $r7, def $r8, def $r9, def $r10, def $r11, def $pc, implicit killed $r0 539 540... 541