xref: /llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/it-block-mov.mir (revision 59c6bd156cc8b42758ce90909615748e21c6eee2) 
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2# RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp -run-pass=arm-low-overhead-loops %s -o - --verify-machineinstrs | FileCheck %s
3
4--- |
5  define hidden arm_aapcs_vfpcc void @cond_trip_count(ptr %0, i32 %1, ptr nocapture %2) local_unnamed_addr #1 {
6    ret void
7  }
8
9...
10---
11name:            cond_trip_count
12alignment:       4
13tracksRegLiveness: true
14registers:       []
15liveins:
16  - { reg: '$r0', virtual-reg: '' }
17  - { reg: '$r1', virtual-reg: '' }
18  - { reg: '$r2', virtual-reg: '' }
19frameInfo:
20  stackSize:       8
21  offsetAdjustment: 0
22  maxAlignment:    4
23fixedStack:      []
24stack:
25  - { id: 0, name: '', type: spill-slot, offset: -4, size: 4, alignment: 4,
26      stack-id: default, callee-saved-register: '$lr', callee-saved-restored: false,
27      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
28  - { id: 1, name: '', type: spill-slot, offset: -8, size: 4, alignment: 4,
29      stack-id: default, callee-saved-register: '$r4', callee-saved-restored: true,
30      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
31callSites:       []
32constants:
33  - id:              0
34    value:           'float 0.000000e+00'
35    alignment:       4
36    isTargetSpecific: false
37machineFunctionInfo: {}
38body:             |
39  ; CHECK-LABEL: name: cond_trip_count
40  ; CHECK: bb.0:
41  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.2(0x40000000)
42  ; CHECK-NEXT:   liveins: $lr, $r0, $r1, $r2, $r4
43  ; CHECK-NEXT: {{  $}}
44  ; CHECK-NEXT:   frame-setup tPUSH 14 /* CC::al */, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
45  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION def_cfa_offset 8
46  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $lr, -4
47  ; CHECK-NEXT:   frame-setup CFI_INSTRUCTION offset $r4, -8
48  ; CHECK-NEXT:   tCMPi8 renamable $r1, 2, 14 /* CC::al */, $noreg, implicit-def $cpsr
49  ; CHECK-NEXT:   renamable $r12 = t2MOVi 4, 14 /* CC::al */, $noreg, $noreg
50  ; CHECK-NEXT:   tBcc %bb.2, 2 /* CC::hs */, killed $cpsr
51  ; CHECK-NEXT: {{  $}}
52  ; CHECK-NEXT: bb.1:
53  ; CHECK-NEXT:   liveins: $r2
54  ; CHECK-NEXT: {{  $}}
55  ; CHECK-NEXT:   renamable $s0 = VLDRS %const.0, 0, 14 /* CC::al */, $noreg
56  ; CHECK-NEXT:   VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg
57  ; CHECK-NEXT:   tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
58  ; CHECK-NEXT: {{  $}}
59  ; CHECK-NEXT: bb.2:
60  ; CHECK-NEXT:   successors: %bb.3(0x80000000)
61  ; CHECK-NEXT:   liveins: $r0, $r1, $r2, $r12
62  ; CHECK-NEXT: {{  $}}
63  ; CHECK-NEXT:   renamable $r4, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
64  ; CHECK-NEXT:   tCMPi8 renamable $r1, 4, 14 /* CC::al */, $noreg, implicit-def $cpsr
65  ; CHECK-NEXT:   t2IT 11, 8, implicit-def $itstate
66  ; CHECK-NEXT:   $r12 = tMOVr renamable $r1, 11 /* CC::lt */, killed $cpsr, implicit killed renamable $r12, implicit killed $itstate
67  ; CHECK-NEXT:   renamable $r3 = t2SUBrr renamable $r1, killed renamable $r12, 14 /* CC::al */, $noreg, $noreg
68  ; CHECK-NEXT:   renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14 /* CC::al */, $noreg
69  ; CHECK-NEXT:   $r12 = tMOVr $r1, 14 /* CC::al */, $noreg
70  ; CHECK-NEXT:   renamable $r4 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14 /* CC::al */, $noreg, $noreg
71  ; CHECK-NEXT:   renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, $noreg, undef renamable $q0
72  ; CHECK-NEXT:   $r3 = tMOVr $r0, 14 /* CC::al */, $noreg
73  ; CHECK-NEXT:   $lr = MVE_DLSTP_32 killed renamable $r12
74  ; CHECK-NEXT: {{  $}}
75  ; CHECK-NEXT: bb.3:
76  ; CHECK-NEXT:   successors: %bb.3(0x7c000000), %bb.4(0x04000000)
77  ; CHECK-NEXT:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4
78  ; CHECK-NEXT: {{  $}}
79  ; CHECK-NEXT:   renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r3, 0, 0, $noreg, $noreg
80  ; CHECK-NEXT:   renamable $q0 = nnan ninf nsz MVE_VADDf32 killed renamable $q0, killed renamable $q1, 0, killed $noreg, $noreg, killed renamable $q0
81  ; CHECK-NEXT:   renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14 /* CC::al */, $noreg
82  ; CHECK-NEXT:   $lr = MVE_LETP killed renamable $lr, %bb.3
83  ; CHECK-NEXT: {{  $}}
84  ; CHECK-NEXT: bb.4:
85  ; CHECK-NEXT:   successors: %bb.5(0x80000000)
86  ; CHECK-NEXT:   liveins: $q0, $r0, $r1, $r2, $r4
87  ; CHECK-NEXT: {{  $}}
88  ; CHECK-NEXT:   renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14 /* CC::al */, $noreg
89  ; CHECK-NEXT:   dead $lr = tMOVr $r4, 14 /* CC::al */, $noreg
90  ; CHECK-NEXT:   $r3 = tMOVr $r1, 14 /* CC::al */, $noreg
91  ; CHECK-NEXT:   renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14 /* CC::al */, $noreg
92  ; CHECK-NEXT:   renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14 /* CC::al */, $noreg, implicit killed $q0
93  ; CHECK-NEXT:   $s2 = VMOVSR $r1, 14 /* CC::al */, $noreg
94  ; CHECK-NEXT:   renamable $s2 = VUITOS killed renamable $s2, 14 /* CC::al */, $noreg
95  ; CHECK-NEXT:   $lr = t2DLS killed $r4
96  ; CHECK-NEXT:   renamable $s4 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14 /* CC::al */, $noreg
97  ; CHECK-NEXT:   renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, $noreg, undef renamable $q0
98  ; CHECK-NEXT: {{  $}}
99  ; CHECK-NEXT: bb.5:
100  ; CHECK-NEXT:   successors: %bb.5(0x7c000000), %bb.6(0x04000000)
101  ; CHECK-NEXT:   liveins: $lr, $q0, $r0, $r1, $r2, $r3, $s4
102  ; CHECK-NEXT: {{  $}}
103  ; CHECK-NEXT:   renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg, $noreg
104  ; CHECK-NEXT:   $r4 = VMOVRS $s4, 14 /* CC::al */, $noreg
105  ; CHECK-NEXT:   MVE_VPST 2, implicit $vpr
106  ; CHECK-NEXT:   renamable $q2 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr, $noreg
107  ; CHECK-NEXT:   renamable $q2 = nnan ninf nsz MVE_VSUB_qr_f32 killed renamable $q2, killed renamable $r4, 1, renamable $vpr, $noreg, undef renamable $q2
108  ; CHECK-NEXT:   renamable $q0 = nnan ninf nsz MVE_VFMAf32 killed renamable $q0, killed renamable $q2, killed renamable $q2, 1, killed renamable $vpr, $noreg
109  ; CHECK-NEXT:   renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14 /* CC::al */, $noreg
110  ; CHECK-NEXT:   renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14 /* CC::al */, $noreg
111  ; CHECK-NEXT:   $lr = t2LEUpdate killed renamable $lr, %bb.5
112  ; CHECK-NEXT: {{  $}}
113  ; CHECK-NEXT: bb.6:
114  ; CHECK-NEXT:   liveins: $q0, $r1, $r2
115  ; CHECK-NEXT: {{  $}}
116  ; CHECK-NEXT:   renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14 /* CC::al */, $noreg
117  ; CHECK-NEXT:   renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 1, 14 /* CC::al */, $noreg
118  ; CHECK-NEXT:   renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14 /* CC::al */, $noreg
119  ; CHECK-NEXT:   renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14 /* CC::al */, $noreg, implicit killed $q0
120  ; CHECK-NEXT:   $s2 = VMOVSR killed $r0, 14 /* CC::al */, $noreg
121  ; CHECK-NEXT:   renamable $s2 = VUITOS killed renamable $s2, 14 /* CC::al */, $noreg
122  ; CHECK-NEXT:   renamable $s0 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14 /* CC::al */, $noreg
123  ; CHECK-NEXT:   VSTRS killed renamable $s0, killed renamable $r2, 0, 14 /* CC::al */, $noreg
124  ; CHECK-NEXT:   tPOP_RET 14 /* CC::al */, $noreg, def $r4, def $pc
125  ; CHECK-NEXT: {{  $}}
126  ; CHECK-NEXT: bb.7 (align 4):
127  ; CHECK-NEXT:   CONSTPOOL_ENTRY 0, %const.0, 4
128  bb.0:
129    successors: %bb.1(0x40000000), %bb.2(0x40000000)
130    liveins: $r0, $r1, $r2, $r4, $lr
131
132    frame-setup tPUSH 14, $noreg, killed $r4, killed $lr, implicit-def $sp, implicit $sp
133    frame-setup CFI_INSTRUCTION def_cfa_offset 8
134    frame-setup CFI_INSTRUCTION offset $lr, -4
135    frame-setup CFI_INSTRUCTION offset $r4, -8
136    tCMPi8 renamable $r1, 4, 14, $noreg, implicit-def $cpsr
137    renamable $r3 = t2MOVi 4, 14, $noreg, $noreg
138    t2IT 11, 8, implicit-def $itstate
139    $r3 = tMOVr renamable $r1, 11, killed $cpsr, implicit killed renamable $r3, implicit killed $itstate
140    tCMPi8 renamable $r1, 2, 14, $noreg, implicit-def $cpsr
141    renamable $r12 = t2MOVi 4, 14, $noreg, $noreg
142    tBcc %bb.2, 2, killed $cpsr
143
144  bb.1:
145    liveins: $r2
146
147    renamable $s0 = VLDRS %const.0, 0, 14, $noreg
148    VSTRS killed renamable $s0, killed renamable $r2, 0, 14, $noreg
149    tPOP_RET 14, $noreg, def $r4, def $pc
150
151  bb.2:
152    successors: %bb.3(0x80000000)
153    liveins: $r0, $r1, $r2, $r3, $r12
154
155    renamable $r3, dead $cpsr = tSUBrr renamable $r1, killed renamable $r3, 14, $noreg
156    renamable $r4, dead $cpsr = tMOVi8 1, 14, $noreg
157    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14, $noreg
158    tCMPi8 renamable $r1, 4, 14, $noreg, implicit-def $cpsr
159    renamable $lr = nuw nsw t2ADDrs renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
160    t2IT 11, 8, implicit-def $itstate
161    $r12 = tMOVr renamable $r1, 11, killed $cpsr, implicit killed renamable $r12, implicit killed $itstate
162    renamable $r3 = t2SUBrr renamable $r1, killed renamable $r12, 14, $noreg, $noreg
163    renamable $r3, dead $cpsr = tADDi8 killed renamable $r3, 3, 14, $noreg
164    $r12 = tMOVr $r1, 14, $noreg
165    renamable $r4 = nuw nsw t2ADDrs killed renamable $r4, killed renamable $r3, 19, 14, $noreg, $noreg
166    renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, $noreg, undef renamable $q0
167    $r3 = tMOVr $r0, 14, $noreg
168    $lr = t2DoLoopStart renamable $lr
169
170  bb.3:
171    successors: %bb.3(0x7c000000), %bb.4(0x04000000)
172    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $r4, $r12
173
174    renamable $vpr = MVE_VCTP32 renamable $r12, 0, $noreg, $noreg
175    renamable $lr = t2LoopDec killed renamable $lr, 1
176    MVE_VPST 4, implicit $vpr
177    renamable $q1 = nnan ninf nsz MVE_VLDRWU32 renamable $r3, 0, 1, renamable $vpr, $noreg
178    renamable $q0 = nnan ninf nsz MVE_VADDf32 killed renamable $q0, killed renamable $q1, 1, killed renamable $vpr, $noreg, renamable $q0
179    renamable $r12 = nsw t2SUBri killed renamable $r12, 4, 14, $noreg, $noreg
180    renamable $r3, dead $cpsr = nuw tADDi8 killed renamable $r3, 16, 14, $noreg
181    t2LoopEnd renamable $lr, %bb.3, implicit-def dead $cpsr
182    tB %bb.4, 14, $noreg
183
184  bb.4:
185    successors: %bb.5(0x80000000)
186    liveins: $q0, $r0, $r1, $r2, $r4
187
188    renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14, $noreg
189    $lr = tMOVr $r4, 14, $noreg
190    $r3 = tMOVr $r1, 14, $noreg
191    renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14, $noreg
192    renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14, $noreg, implicit $q0
193    $s2 = VMOVSR $r1, 14, $noreg
194    renamable $s2 = VUITOS killed renamable $s2, 14, $noreg
195    $lr = t2DoLoopStart killed $r4
196    renamable $s4 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14, $noreg
197    renamable $q0 = MVE_VMOVimmi32 0, 0, $noreg, $noreg, undef renamable $q0
198
199  bb.5:
200    successors: %bb.5(0x7c000000), %bb.6(0x04000000)
201    liveins: $lr, $q0, $r0, $r1, $r2, $r3, $s4
202
203    renamable $vpr = MVE_VCTP32 renamable $r3, 0, $noreg, $noreg
204    $r4 = VMOVRS $s4, 14, $noreg
205    MVE_VPST 2, implicit $vpr
206    renamable $q2 = nnan ninf nsz MVE_VLDRWU32 renamable $r0, 0, 1, renamable $vpr, $noreg
207    renamable $q2 = nnan ninf nsz MVE_VSUB_qr_f32 killed renamable $q2, killed renamable $r4, 1, renamable $vpr, $noreg, undef renamable $q2
208    renamable $q0 = nnan ninf nsz MVE_VFMAf32 killed renamable $q0, killed renamable $q2, renamable $q2, 1, killed renamable $vpr, $noreg
209    renamable $lr = t2LoopDec killed renamable $lr, 1
210    renamable $r3, dead $cpsr = nsw tSUBi8 killed renamable $r3, 4, 14, $noreg
211    renamable $r0, dead $cpsr = nuw tADDi8 killed renamable $r0, 16, 14, $noreg
212    t2LoopEnd renamable $lr, %bb.5, implicit-def dead $cpsr
213    tB %bb.6, 14, $noreg
214
215  bb.6:
216    liveins: $q0, $r1, $r2
217
218    renamable $s4 = nnan ninf nsz VADDS renamable $s0, renamable $s1, 14, $noreg
219    renamable $r0, dead $cpsr = tSUBi3 killed renamable $r1, 1, 14, $noreg
220    renamable $s4 = nnan ninf nsz VADDS renamable $s2, killed renamable $s4, 14, $noreg
221    renamable $s0 = nnan ninf nsz VADDS killed renamable $s3, killed renamable $s4, 14, $noreg, implicit $q0
222    $s2 = VMOVSR killed $r0, 14, $noreg
223    renamable $s2 = VUITOS killed renamable $s2, 14, $noreg
224    renamable $s0 = nnan ninf nsz VDIVS killed renamable $s0, killed renamable $s2, 14, $noreg
225    VSTRS killed renamable $s0, killed renamable $r2, 0, 14, $noreg
226    tPOP_RET 14, $noreg, def $r4, def $pc
227
228  bb.7 (align 4):
229    CONSTPOOL_ENTRY 0, %const.0, 4
230
231...
232