xref: /llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll (revision e0ed0333f0fed2e73f805afd58b61176a87aa3ad) 
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=thumbv8.1m.main -mattr=+mve.fp,+fp-armv8d16sp,+fp16,+fullfp16 -tail-predication=enabled %s -o - | FileCheck %s
3
4define arm_aapcs_vfpcc void @fast_float_mul(ptr nocapture %a, ptr nocapture readonly %b, ptr nocapture readonly %c, i32 %N) {
5; CHECK-LABEL: fast_float_mul:
6; CHECK:       @ %bb.0: @ %entry
7; CHECK-NEXT:    push {r4, r5, r6, r7, lr}
8; CHECK-NEXT:    cmp r3, #0
9; CHECK-NEXT:    beq.w .LBB0_11
10; CHECK-NEXT:  @ %bb.1: @ %vector.memcheck
11; CHECK-NEXT:    add.w r4, r2, r3, lsl #2
12; CHECK-NEXT:    cmp r4, r0
13; CHECK-NEXT:    add.w r4, r0, r3, lsl #2
14; CHECK-NEXT:    cset r12, hi
15; CHECK-NEXT:    cmp r4, r2
16; CHECK-NEXT:    csel r12, zr, r12, ls
17; CHECK-NEXT:    cmp r4, r1
18; CHECK-NEXT:    add.w r4, r1, r3, lsl #2
19; CHECK-NEXT:    cset lr, hi
20; CHECK-NEXT:    cmp r4, r0
21; CHECK-NEXT:    cset r4, hi
22; CHECK-NEXT:    tst.w r4, lr
23; CHECK-NEXT:    it eq
24; CHECK-NEXT:    cmpeq.w r12, #0
25; CHECK-NEXT:    beq .LBB0_4
26; CHECK-NEXT:  @ %bb.2: @ %for.body.preheader
27; CHECK-NEXT:    subs r4, r3, #1
28; CHECK-NEXT:    and r12, r3, #3
29; CHECK-NEXT:    cmp r4, #3
30; CHECK-NEXT:    bhs .LBB0_6
31; CHECK-NEXT:  @ %bb.3:
32; CHECK-NEXT:    movs r3, #0
33; CHECK-NEXT:    b .LBB0_8
34; CHECK-NEXT:  .LBB0_4: @ %vector.ph
35; CHECK-NEXT:    dlstp.32 lr, r3
36; CHECK-NEXT:  .LBB0_5: @ %vector.body
37; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
38; CHECK-NEXT:    vldrw.u32 q0, [r1], #16
39; CHECK-NEXT:    vldrw.u32 q1, [r2], #16
40; CHECK-NEXT:    vmul.f32 q0, q1, q0
41; CHECK-NEXT:    vstrw.32 q0, [r0], #16
42; CHECK-NEXT:    letp lr, .LBB0_5
43; CHECK-NEXT:    b .LBB0_11
44; CHECK-NEXT:  .LBB0_6: @ %for.body.preheader.new
45; CHECK-NEXT:    bic r3, r3, #3
46; CHECK-NEXT:    movs r4, #1
47; CHECK-NEXT:    subs r3, #4
48; CHECK-NEXT:    add.w lr, r4, r3, lsr #2
49; CHECK-NEXT:    movs r4, #0
50; CHECK-NEXT:    movs r3, #0
51; CHECK-NEXT:  .LBB0_7: @ %for.body
52; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
53; CHECK-NEXT:    adds r5, r1, r4
54; CHECK-NEXT:    adds r6, r2, r4
55; CHECK-NEXT:    adds r7, r0, r4
56; CHECK-NEXT:    adds r4, #16
57; CHECK-NEXT:    vldr s0, [r5]
58; CHECK-NEXT:    adds r3, #4
59; CHECK-NEXT:    vldr s2, [r6]
60; CHECK-NEXT:    vmul.f32 s0, s2, s0
61; CHECK-NEXT:    vstr s0, [r7]
62; CHECK-NEXT:    vldr s0, [r5, #4]
63; CHECK-NEXT:    vldr s2, [r6, #4]
64; CHECK-NEXT:    vmul.f32 s0, s2, s0
65; CHECK-NEXT:    vstr s0, [r7, #4]
66; CHECK-NEXT:    vldr s0, [r5, #8]
67; CHECK-NEXT:    vldr s2, [r6, #8]
68; CHECK-NEXT:    vmul.f32 s0, s2, s0
69; CHECK-NEXT:    vstr s0, [r7, #8]
70; CHECK-NEXT:    vldr s0, [r5, #12]
71; CHECK-NEXT:    vldr s2, [r6, #12]
72; CHECK-NEXT:    vmul.f32 s0, s2, s0
73; CHECK-NEXT:    vstr s0, [r7, #12]
74; CHECK-NEXT:    le lr, .LBB0_7
75; CHECK-NEXT:  .LBB0_8: @ %for.cond.cleanup.loopexit.unr-lcssa
76; CHECK-NEXT:    wls lr, r12, .LBB0_11
77; CHECK-NEXT:  @ %bb.9: @ %for.body.epil.preheader
78; CHECK-NEXT:    add.w r1, r1, r3, lsl #2
79; CHECK-NEXT:    add.w r2, r2, r3, lsl #2
80; CHECK-NEXT:    add.w r0, r0, r3, lsl #2
81; CHECK-NEXT:  .LBB0_10: @ %for.body.epil
82; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
83; CHECK-NEXT:    vldmia r1!, {s0}
84; CHECK-NEXT:    vldmia r2!, {s2}
85; CHECK-NEXT:    vmul.f32 s0, s2, s0
86; CHECK-NEXT:    vstmia r0!, {s0}
87; CHECK-NEXT:    le lr, .LBB0_10
88; CHECK-NEXT:  .LBB0_11: @ %for.cond.cleanup
89; CHECK-NEXT:    pop {r4, r5, r6, r7, pc}
90entry:
91  %cmp8 = icmp eq i32 %N, 0
92  br i1 %cmp8, label %for.cond.cleanup, label %vector.memcheck
93
94vector.memcheck:                                  ; preds = %entry
95  %scevgep = getelementptr float, ptr %a, i32 %N
96  %scevgep13 = getelementptr float, ptr %b, i32 %N
97  %scevgep16 = getelementptr float, ptr %c, i32 %N
98  %bound0 = icmp ugt ptr %scevgep13, %a
99  %bound1 = icmp ugt ptr %scevgep, %b
100  %found.conflict = and i1 %bound0, %bound1
101  %bound018 = icmp ugt ptr %scevgep16, %a
102  %bound119 = icmp ugt ptr %scevgep, %c
103  %found.conflict20 = and i1 %bound018, %bound119
104  %conflict.rdx = or i1 %found.conflict, %found.conflict20
105  br i1 %conflict.rdx, label %for.body.preheader, label %vector.ph
106
107for.body.preheader:                               ; preds = %vector.memcheck
108  %i = add i32 %N, -1
109  %xtraiter = and i32 %N, 3
110  %i1 = icmp ult i32 %i, 3
111  br i1 %i1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new
112
113for.body.preheader.new:                           ; preds = %for.body.preheader
114  %unroll_iter = sub i32 %N, %xtraiter
115  br label %for.body
116
117vector.ph:                                        ; preds = %vector.memcheck
118  %n.rnd.up = add i32 %N, 3
119  %n.vec = and i32 %n.rnd.up, -4
120  br label %vector.body
121
122vector.body:                                      ; preds = %vector.body, %vector.ph
123  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
124  %i2 = getelementptr inbounds float, ptr %b, i32 %index
125  %i3 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
126  %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i2, i32 4, <4 x i1> %i3, <4 x float> undef)
127  %i5 = getelementptr inbounds float, ptr %c, i32 %index
128  %wide.masked.load23 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i5, i32 4, <4 x i1> %i3, <4 x float> undef)
129  %i7 = fmul fast <4 x float> %wide.masked.load23, %wide.masked.load
130  %i8 = getelementptr inbounds float, ptr %a, i32 %index
131  call void @llvm.masked.store.v4f32.p0(<4 x float> %i7, ptr %i8, i32 4, <4 x i1> %i3)
132  %index.next = add i32 %index, 4
133  %i10 = icmp eq i32 %index.next, %n.vec
134  br i1 %i10, label %for.cond.cleanup, label %vector.body
135
136for.cond.cleanup.loopexit.unr-lcssa:              ; preds = %for.body, %for.body.preheader
137  %i.09.unr = phi i32 [ 0, %for.body.preheader ], [ %inc.3, %for.body ]
138  %lcmp.mod = icmp eq i32 %xtraiter, 0
139  br i1 %lcmp.mod, label %for.cond.cleanup, label %for.body.epil
140
141for.body.epil:                                    ; preds = %for.body.epil, %for.cond.cleanup.loopexit.unr-lcssa
142  %i.09.epil = phi i32 [ %inc.epil, %for.body.epil ], [ %i.09.unr, %for.cond.cleanup.loopexit.unr-lcssa ]
143  %epil.iter = phi i32 [ %epil.iter.sub, %for.body.epil ], [ %xtraiter, %for.cond.cleanup.loopexit.unr-lcssa ]
144  %arrayidx.epil = getelementptr inbounds float, ptr %b, i32 %i.09.epil
145  %i11 = load float, ptr %arrayidx.epil, align 4
146  %arrayidx1.epil = getelementptr inbounds float, ptr %c, i32 %i.09.epil
147  %i12 = load float, ptr %arrayidx1.epil, align 4
148  %mul.epil = fmul fast float %i12, %i11
149  %arrayidx2.epil = getelementptr inbounds float, ptr %a, i32 %i.09.epil
150  store float %mul.epil, ptr %arrayidx2.epil, align 4
151  %inc.epil = add nuw i32 %i.09.epil, 1
152  %epil.iter.sub = add i32 %epil.iter, -1
153  %epil.iter.cmp = icmp eq i32 %epil.iter.sub, 0
154  br i1 %epil.iter.cmp, label %for.cond.cleanup, label %for.body.epil
155
156for.cond.cleanup:                                 ; preds = %for.body.epil, %for.cond.cleanup.loopexit.unr-lcssa, %vector.body, %entry
157  ret void
158
159for.body:                                         ; preds = %for.body, %for.body.preheader.new
160  %i.09 = phi i32 [ 0, %for.body.preheader.new ], [ %inc.3, %for.body ]
161  %niter = phi i32 [ %unroll_iter, %for.body.preheader.new ], [ %niter.nsub.3, %for.body ]
162  %arrayidx = getelementptr inbounds float, ptr %b, i32 %i.09
163  %i13 = load float, ptr %arrayidx, align 4
164  %arrayidx1 = getelementptr inbounds float, ptr %c, i32 %i.09
165  %i14 = load float, ptr %arrayidx1, align 4
166  %mul = fmul fast float %i14, %i13
167  %arrayidx2 = getelementptr inbounds float, ptr %a, i32 %i.09
168  store float %mul, ptr %arrayidx2, align 4
169  %inc = or disjoint i32 %i.09, 1
170  %arrayidx.1 = getelementptr inbounds float, ptr %b, i32 %inc
171  %i15 = load float, ptr %arrayidx.1, align 4
172  %arrayidx1.1 = getelementptr inbounds float, ptr %c, i32 %inc
173  %i16 = load float, ptr %arrayidx1.1, align 4
174  %mul.1 = fmul fast float %i16, %i15
175  %arrayidx2.1 = getelementptr inbounds float, ptr %a, i32 %inc
176  store float %mul.1, ptr %arrayidx2.1, align 4
177  %inc.1 = or disjoint i32 %i.09, 2
178  %arrayidx.2 = getelementptr inbounds float, ptr %b, i32 %inc.1
179  %i17 = load float, ptr %arrayidx.2, align 4
180  %arrayidx1.2 = getelementptr inbounds float, ptr %c, i32 %inc.1
181  %i18 = load float, ptr %arrayidx1.2, align 4
182  %mul.2 = fmul fast float %i18, %i17
183  %arrayidx2.2 = getelementptr inbounds float, ptr %a, i32 %inc.1
184  store float %mul.2, ptr %arrayidx2.2, align 4
185  %inc.2 = or disjoint i32 %i.09, 3
186  %arrayidx.3 = getelementptr inbounds float, ptr %b, i32 %inc.2
187  %i19 = load float, ptr %arrayidx.3, align 4
188  %arrayidx1.3 = getelementptr inbounds float, ptr %c, i32 %inc.2
189  %i20 = load float, ptr %arrayidx1.3, align 4
190  %mul.3 = fmul fast float %i20, %i19
191  %arrayidx2.3 = getelementptr inbounds float, ptr %a, i32 %inc.2
192  store float %mul.3, ptr %arrayidx2.3, align 4
193  %inc.3 = add nuw i32 %i.09, 4
194  %niter.nsub.3 = add i32 %niter, -4
195  %niter.ncmp.3 = icmp eq i32 %niter.nsub.3, 0
196  br i1 %niter.ncmp.3, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body
197}
198
199define arm_aapcs_vfpcc float @fast_float_mac(ptr nocapture readonly %b, ptr nocapture readonly %c, i32 %N) {
200; CHECK-LABEL: fast_float_mac:
201; CHECK:       @ %bb.0: @ %entry
202; CHECK-NEXT:    cmp r2, #0
203; CHECK-NEXT:    itt eq
204; CHECK-NEXT:    vldreq s0, .LCPI1_0
205; CHECK-NEXT:    bxeq lr
206; CHECK-NEXT:  .LBB1_1: @ %vector.ph
207; CHECK-NEXT:    push {r7, lr}
208; CHECK-NEXT:    adds r3, r2, #3
209; CHECK-NEXT:    mov.w r12, #1
210; CHECK-NEXT:    bic r3, r3, #3
211; CHECK-NEXT:    vmov.i32 q0, #0x0
212; CHECK-NEXT:    subs r3, #4
213; CHECK-NEXT:    add.w r3, r12, r3, lsr #2
214; CHECK-NEXT:    dls lr, r3
215; CHECK-NEXT:  .LBB1_2: @ %vector.body
216; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
217; CHECK-NEXT:    vctp.32 r2
218; CHECK-NEXT:    subs r2, #4
219; CHECK-NEXT:    vpstt
220; CHECK-NEXT:    vldrwt.u32 q2, [r0], #16
221; CHECK-NEXT:    vldrwt.u32 q3, [r1], #16
222; CHECK-NEXT:    vmov q1, q0
223; CHECK-NEXT:    vfma.f32 q0, q3, q2
224; CHECK-NEXT:    le lr, .LBB1_2
225; CHECK-NEXT:  @ %bb.3: @ %middle.block
226; CHECK-NEXT:    vpsel q0, q0, q1
227; CHECK-NEXT:    vmov.f32 s4, s2
228; CHECK-NEXT:    vmov.f32 s5, s3
229; CHECK-NEXT:    vadd.f32 q0, q0, q1
230; CHECK-NEXT:    vmov r0, s1
231; CHECK-NEXT:    vadd.f32 q0, q0, r0
232; CHECK-NEXT:    pop {r7, pc}
233; CHECK-NEXT:    .p2align 2
234; CHECK-NEXT:  @ %bb.4:
235; CHECK-NEXT:  .LCPI1_0:
236; CHECK-NEXT:    .long 0x00000000 @ float 0
237entry:
238  %cmp8 = icmp eq i32 %N, 0
239  br i1 %cmp8, label %for.cond.cleanup, label %vector.ph
240
241vector.ph:                                        ; preds = %entry
242  %n.rnd.up = add i32 %N, 3
243  %n.vec = and i32 %n.rnd.up, -4
244  br label %vector.body
245
246vector.body:                                      ; preds = %vector.body, %vector.ph
247  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
248  %vec.phi = phi <4 x float> [ zeroinitializer, %vector.ph ], [ %i6, %vector.body ]
249  %i = getelementptr inbounds float, ptr %b, i32 %index
250  %i1 = call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 %index, i32 %N)
251  %wide.masked.load = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i, i32 4, <4 x i1> %i1, <4 x float> undef)
252  %i3 = getelementptr inbounds float, ptr %c, i32 %index
253  %wide.masked.load13 = call <4 x float> @llvm.masked.load.v4f32.p0(ptr %i3, i32 4, <4 x i1> %i1, <4 x float> undef)
254  %i5 = fmul fast <4 x float> %wide.masked.load13, %wide.masked.load
255  %i6 = fadd fast <4 x float> %i5, %vec.phi
256  %index.next = add i32 %index, 4
257  %i7 = icmp eq i32 %index.next, %n.vec
258  br i1 %i7, label %middle.block, label %vector.body
259
260middle.block:                                     ; preds = %vector.body
261  %i8 = select <4 x i1> %i1, <4 x float> %i6, <4 x float> %vec.phi
262  %rdx.shuf = shufflevector <4 x float> %i8, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
263  %bin.rdx = fadd fast <4 x float> %i8, %rdx.shuf
264  %rdx.shuf14 = shufflevector <4 x float> %bin.rdx, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
265  %bin.rdx15 = fadd fast <4 x float> %bin.rdx, %rdx.shuf14
266  %i9 = extractelement <4 x float> %bin.rdx15, i32 0
267  br label %for.cond.cleanup
268
269for.cond.cleanup:                                 ; preds = %middle.block, %entry
270  %a.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %i9, %middle.block ]
271  ret float %a.0.lcssa
272}
273
274define arm_aapcs_vfpcc float @fast_float_half_mac(ptr nocapture readonly %b, ptr nocapture readonly %c, i32 %N) {
275; CHECK-LABEL: fast_float_half_mac:
276; CHECK:       @ %bb.0: @ %entry
277; CHECK-NEXT:    cmp r2, #0
278; CHECK-NEXT:    itt eq
279; CHECK-NEXT:    vldreq s0, .LCPI2_0
280; CHECK-NEXT:    bxeq lr
281; CHECK-NEXT:  .LBB2_1: @ %vector.ph
282; CHECK-NEXT:    push {r4, r5, r7, lr}
283; CHECK-NEXT:    vpush {d8, d9, d10, d11, d12, d13}
284; CHECK-NEXT:    sub sp, #8
285; CHECK-NEXT:    adds r3, r2, #3
286; CHECK-NEXT:    vmov.i32 q5, #0x0
287; CHECK-NEXT:    bic r3, r3, #3
288; CHECK-NEXT:    sub.w r12, r3, #4
289; CHECK-NEXT:    movs r3, #1
290; CHECK-NEXT:    add.w lr, r3, r12, lsr #2
291; CHECK-NEXT:    sub.w r12, r2, #1
292; CHECK-NEXT:    adr r2, .LCPI2_1
293; CHECK-NEXT:    mov lr, lr
294; CHECK-NEXT:    vldrw.u32 q0, [r2]
295; CHECK-NEXT:    movs r3, #0
296; CHECK-NEXT:    vdup.32 q1, r12
297; CHECK-NEXT:    vdup.32 q2, r12
298; CHECK-NEXT:    b .LBB2_3
299; CHECK-NEXT:  .LBB2_2: @ %else24
300; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
301; CHECK-NEXT:    vmul.f16 q5, q6, q5
302; CHECK-NEXT:    adds r0, #8
303; CHECK-NEXT:    vcvtt.f32.f16 s23, s21
304; CHECK-NEXT:    vcvtb.f32.f16 s22, s21
305; CHECK-NEXT:    vcvtt.f32.f16 s21, s20
306; CHECK-NEXT:    vcvtb.f32.f16 s20, s20
307; CHECK-NEXT:    adds r1, #8
308; CHECK-NEXT:    adds r3, #4
309; CHECK-NEXT:    vadd.f32 q5, q3, q5
310; CHECK-NEXT:    subs.w lr, lr, #1
311; CHECK-NEXT:    bne .LBB2_3
312; CHECK-NEXT:    b .LBB2_19
313; CHECK-NEXT:  .LBB2_3: @ %vector.body
314; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
315; CHECK-NEXT:    vadd.i32 q4, q0, r3
316; CHECK-NEXT:    vmov q3, q5
317; CHECK-NEXT:    vcmp.u32 cs, q1, q4
318; CHECK-NEXT:    @ implicit-def: $q5
319; CHECK-NEXT:    vmrs r4, p0
320; CHECK-NEXT:    and r2, r4, #1
321; CHECK-NEXT:    rsbs r5, r2, #0
322; CHECK-NEXT:    movs r2, #0
323; CHECK-NEXT:    bfi r2, r5, #0, #1
324; CHECK-NEXT:    ubfx r5, r4, #4, #1
325; CHECK-NEXT:    rsbs r5, r5, #0
326; CHECK-NEXT:    bfi r2, r5, #1, #1
327; CHECK-NEXT:    ubfx r5, r4, #8, #1
328; CHECK-NEXT:    ubfx r4, r4, #12, #1
329; CHECK-NEXT:    rsbs r5, r5, #0
330; CHECK-NEXT:    bfi r2, r5, #2, #1
331; CHECK-NEXT:    rsbs r4, r4, #0
332; CHECK-NEXT:    bfi r2, r4, #3, #1
333; CHECK-NEXT:    lsls r4, r2, #31
334; CHECK-NEXT:    bne .LBB2_12
335; CHECK-NEXT:  @ %bb.4: @ %else
336; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
337; CHECK-NEXT:    lsls r4, r2, #30
338; CHECK-NEXT:    bmi .LBB2_13
339; CHECK-NEXT:  .LBB2_5: @ %else5
340; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
341; CHECK-NEXT:    lsls r4, r2, #29
342; CHECK-NEXT:    bmi .LBB2_14
343; CHECK-NEXT:  .LBB2_6: @ %else8
344; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
345; CHECK-NEXT:    lsls r2, r2, #28
346; CHECK-NEXT:    bpl .LBB2_8
347; CHECK-NEXT:  .LBB2_7: @ %cond.load10
348; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
349; CHECK-NEXT:    vldr.16 s22, [r0, #6]
350; CHECK-NEXT:    vins.f16 s21, s22
351; CHECK-NEXT:  .LBB2_8: @ %else11
352; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
353; CHECK-NEXT:    vcmp.u32 cs, q2, q4
354; CHECK-NEXT:    @ implicit-def: $q6
355; CHECK-NEXT:    vmrs r4, p0
356; CHECK-NEXT:    and r2, r4, #1
357; CHECK-NEXT:    rsbs r5, r2, #0
358; CHECK-NEXT:    movs r2, #0
359; CHECK-NEXT:    bfi r2, r5, #0, #1
360; CHECK-NEXT:    ubfx r5, r4, #4, #1
361; CHECK-NEXT:    rsbs r5, r5, #0
362; CHECK-NEXT:    bfi r2, r5, #1, #1
363; CHECK-NEXT:    ubfx r5, r4, #8, #1
364; CHECK-NEXT:    ubfx r4, r4, #12, #1
365; CHECK-NEXT:    rsbs r5, r5, #0
366; CHECK-NEXT:    bfi r2, r5, #2, #1
367; CHECK-NEXT:    rsbs r4, r4, #0
368; CHECK-NEXT:    bfi r2, r4, #3, #1
369; CHECK-NEXT:    lsls r4, r2, #31
370; CHECK-NEXT:    bne .LBB2_15
371; CHECK-NEXT:  @ %bb.9: @ %else15
372; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
373; CHECK-NEXT:    lsls r4, r2, #30
374; CHECK-NEXT:    bmi .LBB2_16
375; CHECK-NEXT:  .LBB2_10: @ %else18
376; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
377; CHECK-NEXT:    lsls r4, r2, #29
378; CHECK-NEXT:    bmi .LBB2_17
379; CHECK-NEXT:  .LBB2_11: @ %else21
380; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
381; CHECK-NEXT:    lsls r2, r2, #28
382; CHECK-NEXT:    bpl .LBB2_2
383; CHECK-NEXT:    b .LBB2_18
384; CHECK-NEXT:  .LBB2_12: @ %cond.load
385; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
386; CHECK-NEXT:    vldr.16 s20, [r0]
387; CHECK-NEXT:    lsls r4, r2, #30
388; CHECK-NEXT:    bpl .LBB2_5
389; CHECK-NEXT:  .LBB2_13: @ %cond.load4
390; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
391; CHECK-NEXT:    vldr.16 s22, [r0, #2]
392; CHECK-NEXT:    vins.f16 s20, s22
393; CHECK-NEXT:    lsls r4, r2, #29
394; CHECK-NEXT:    bpl .LBB2_6
395; CHECK-NEXT:  .LBB2_14: @ %cond.load7
396; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
397; CHECK-NEXT:    vldr.16 s21, [r0, #4]
398; CHECK-NEXT:    vmovx.f16 s22, s0
399; CHECK-NEXT:    vins.f16 s21, s22
400; CHECK-NEXT:    lsls r2, r2, #28
401; CHECK-NEXT:    bmi .LBB2_7
402; CHECK-NEXT:    b .LBB2_8
403; CHECK-NEXT:  .LBB2_15: @ %cond.load14
404; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
405; CHECK-NEXT:    vldr.16 s24, [r1]
406; CHECK-NEXT:    lsls r4, r2, #30
407; CHECK-NEXT:    bpl .LBB2_10
408; CHECK-NEXT:  .LBB2_16: @ %cond.load17
409; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
410; CHECK-NEXT:    vldr.16 s26, [r1, #2]
411; CHECK-NEXT:    vins.f16 s24, s26
412; CHECK-NEXT:    lsls r4, r2, #29
413; CHECK-NEXT:    bpl .LBB2_11
414; CHECK-NEXT:  .LBB2_17: @ %cond.load20
415; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
416; CHECK-NEXT:    vldr.16 s25, [r1, #4]
417; CHECK-NEXT:    vmovx.f16 s26, s0
418; CHECK-NEXT:    vins.f16 s25, s26
419; CHECK-NEXT:    lsls r2, r2, #28
420; CHECK-NEXT:    bpl.w .LBB2_2
421; CHECK-NEXT:  .LBB2_18: @ %cond.load23
422; CHECK-NEXT:    @ in Loop: Header=BB2_3 Depth=1
423; CHECK-NEXT:    vldr.16 s26, [r1, #6]
424; CHECK-NEXT:    vins.f16 s25, s26
425; CHECK-NEXT:    b .LBB2_2
426; CHECK-NEXT:  .LBB2_19: @ %middle.block
427; CHECK-NEXT:    vdup.32 q0, r12
428; CHECK-NEXT:    vcmp.u32 cs, q0, q4
429; CHECK-NEXT:    vpsel q0, q5, q3
430; CHECK-NEXT:    vmov.f32 s4, s2
431; CHECK-NEXT:    vmov.f32 s5, s3
432; CHECK-NEXT:    vadd.f32 q0, q0, q1
433; CHECK-NEXT:    vmov r0, s1
434; CHECK-NEXT:    vadd.f32 q0, q0, r0
435; CHECK-NEXT:    add sp, #8
436; CHECK-NEXT:    vpop {d8, d9, d10, d11, d12, d13}
437; CHECK-NEXT:    pop {r4, r5, r7, pc}
438; CHECK-NEXT:    .p2align 4
439; CHECK-NEXT:  @ %bb.20:
440; CHECK-NEXT:  .LCPI2_1:
441; CHECK-NEXT:    .long 0 @ 0x0
442; CHECK-NEXT:    .long 1 @ 0x1
443; CHECK-NEXT:    .long 2 @ 0x2
444; CHECK-NEXT:    .long 3 @ 0x3
445; CHECK-NEXT:  .LCPI2_0:
446; CHECK-NEXT:    .long 0x00000000 @ float 0
447entry:
448  %cmp8 = icmp eq i32 %N, 0
449  br i1 %cmp8, label %for.cond.cleanup, label %vector.ph
450
451vector.ph:                                        ; preds = %entry
452  %n.rnd.up = add i32 %N, 3
453  %n.vec = and i32 %n.rnd.up, -4
454  %trip.count.minus.1 = add i32 %N, -1
455  %broadcast.splatinsert11 = insertelement <4 x i32> undef, i32 %trip.count.minus.1, i32 0
456  %broadcast.splat12 = shufflevector <4 x i32> %broadcast.splatinsert11, <4 x i32> undef, <4 x i32> zeroinitializer
457  br label %vector.body
458
459vector.body:                                      ; preds = %vector.body, %vector.ph
460  %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
461  %vec.phi = phi <4 x float> [ zeroinitializer, %vector.ph ], [ %i7, %vector.body ]
462  %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 0
463  %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
464  %induction = add <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3>
465  %i = getelementptr inbounds half, ptr %b, i32 %index
466  %i1 = icmp ule <4 x i32> %induction, %broadcast.splat12
467  %wide.masked.load = call <4 x half> @llvm.masked.load.v4f16.p0(ptr %i, i32 2, <4 x i1> %i1, <4 x half> undef)
468  %i3 = getelementptr inbounds half, ptr %c, i32 %index
469  %wide.masked.load13 = call <4 x half> @llvm.masked.load.v4f16.p0(ptr %i3, i32 2, <4 x i1> %i1, <4 x half> undef)
470  %i5 = fmul fast <4 x half> %wide.masked.load13, %wide.masked.load
471  %i6 = fpext <4 x half> %i5 to <4 x float>
472  %i7 = fadd fast <4 x float> %vec.phi, %i6
473  %index.next = add i32 %index, 4
474  %i8 = icmp eq i32 %index.next, %n.vec
475  br i1 %i8, label %middle.block, label %vector.body
476
477middle.block:                                     ; preds = %vector.body
478  %i9 = select <4 x i1> %i1, <4 x float> %i7, <4 x float> %vec.phi
479  %rdx.shuf = shufflevector <4 x float> %i9, <4 x float> undef, <4 x i32> <i32 2, i32 3, i32 undef, i32 undef>
480  %bin.rdx = fadd fast <4 x float> %i9, %rdx.shuf
481  %rdx.shuf14 = shufflevector <4 x float> %bin.rdx, <4 x float> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef>
482  %bin.rdx15 = fadd fast <4 x float> %bin.rdx, %rdx.shuf14
483  %i10 = extractelement <4 x float> %bin.rdx15, i32 0
484  br label %for.cond.cleanup
485
486for.cond.cleanup:                                 ; preds = %middle.block, %entry
487  %a.0.lcssa = phi float [ 0.000000e+00, %entry ], [ %i10, %middle.block ]
488  ret float %a.0.lcssa
489}
490
491; Function Attrs: argmemonly nounwind readonly willreturn
492declare <4 x float> @llvm.masked.load.v4f32.p0(ptr, i32 immarg, <4 x i1>, <4 x float>)
493
494; Function Attrs: argmemonly nounwind willreturn
495declare void @llvm.masked.store.v4f32.p0(<4 x float>, ptr, i32 immarg, <4 x i1>)
496
497; Function Attrs: argmemonly nounwind readonly willreturn
498declare <4 x half> @llvm.masked.load.v4f16.p0(ptr, i32 immarg, <4 x i1>, <4 x half>)
499
500declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)
501