xref: /llvm-project/llvm/test/CodeGen/Thumb/stack-guard-xo.ll (revision e0ed0333f0fed2e73f805afd58b61176a87aa3ad)
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
2; RUN: llc < %s -mtriple=thumbv6m | FileCheck %s
3; RUN: llc < %s -mtriple=thumbv6m -mattr=+execute-only | FileCheck %s -check-prefix=V6M
4; RUN: llc < %s -mtriple=thumbv8m.base -mattr=+execute-only | FileCheck %s -check-prefix=V8MBASE
5
6define dso_local i32 @main() #0 {
7; CHECK-LABEL: main:
8; CHECK:       @ %bb.0: @ %entry
9; CHECK-NEXT:    push {r7, lr}
10; CHECK-NEXT:    sub sp, #24
11; CHECK-NEXT:    movs r0, #0
12; CHECK-NEXT:    str r0, [sp, #4]
13; CHECK-NEXT:    ldr r0, .LCPI0_0
14; CHECK-NEXT:    ldr r0, [r0]
15; CHECK-NEXT:    str r0, [sp, #20]
16; CHECK-NEXT:    add r0, sp, #8
17; CHECK-NEXT:    ldrb r0, [r0]
18; CHECK-NEXT:    ldr r1, [sp, #20]
19; CHECK-NEXT:    ldr r2, .LCPI0_0
20; CHECK-NEXT:    ldr r2, [r2]
21; CHECK-NEXT:    cmp r2, r1
22; CHECK-NEXT:    bne .LBB0_2
23; CHECK-NEXT:  @ %bb.1: @ %entry
24; CHECK-NEXT:    add sp, #24
25; CHECK-NEXT:    pop {r7, pc}
26; CHECK-NEXT:  .LBB0_2: @ %entry
27; CHECK-NEXT:    bl __stack_chk_fail
28; CHECK-NEXT:    .p2align 2
29; CHECK-NEXT:  @ %bb.3:
30; CHECK-NEXT:  .LCPI0_0:
31; CHECK-NEXT:    .long __stack_chk_guard
32;
33; V6M-LABEL: main:
34; V6M:       @ %bb.0: @ %entry
35; V6M-NEXT:    push {r7, lr}
36; V6M-NEXT:    sub sp, #24
37; V6M-NEXT:    movs r0, #0
38; V6M-NEXT:    str r0, [sp, #4]
39; V6M-NEXT:    mrs r12, apsr
40; V6M-NEXT:    movs r0, :upper8_15:__stack_chk_guard
41; V6M-NEXT:    lsls r0, r0, #8
42; V6M-NEXT:    adds r0, :upper0_7:__stack_chk_guard
43; V6M-NEXT:    lsls r0, r0, #8
44; V6M-NEXT:    adds r0, :lower8_15:__stack_chk_guard
45; V6M-NEXT:    lsls r0, r0, #8
46; V6M-NEXT:    adds r0, :lower0_7:__stack_chk_guard
47; V6M-NEXT:    msr apsr, r12
48; V6M-NEXT:    ldr r0, [r0]
49; V6M-NEXT:    str r0, [sp, #20]
50; V6M-NEXT:    add r0, sp, #8
51; V6M-NEXT:    ldrb r0, [r0]
52; V6M-NEXT:    ldr r1, [sp, #20]
53; V6M-NEXT:    mrs r12, apsr
54; V6M-NEXT:    movs r2, :upper8_15:__stack_chk_guard
55; V6M-NEXT:    lsls r2, r2, #8
56; V6M-NEXT:    adds r2, :upper0_7:__stack_chk_guard
57; V6M-NEXT:    lsls r2, r2, #8
58; V6M-NEXT:    adds r2, :lower8_15:__stack_chk_guard
59; V6M-NEXT:    lsls r2, r2, #8
60; V6M-NEXT:    adds r2, :lower0_7:__stack_chk_guard
61; V6M-NEXT:    msr apsr, r12
62; V6M-NEXT:    ldr r2, [r2]
63; V6M-NEXT:    cmp r2, r1
64; V6M-NEXT:    bne .LBB0_2
65; V6M-NEXT:  @ %bb.1: @ %entry
66; V6M-NEXT:    add sp, #24
67; V6M-NEXT:    pop {r7, pc}
68; V6M-NEXT:  .LBB0_2: @ %entry
69; V6M-NEXT:    bl __stack_chk_fail
70;
71; V8MBASE-LABEL: main:
72; V8MBASE:       @ %bb.0: @ %entry
73; V8MBASE-NEXT:    push {r7, lr}
74; V8MBASE-NEXT:    sub sp, #24
75; V8MBASE-NEXT:    movs r0, #0
76; V8MBASE-NEXT:    str r0, [sp, #4]
77; V8MBASE-NEXT:    movw r0, :lower16:__stack_chk_guard
78; V8MBASE-NEXT:    movt r0, :upper16:__stack_chk_guard
79; V8MBASE-NEXT:    ldr r0, [r0]
80; V8MBASE-NEXT:    str r0, [sp, #20]
81; V8MBASE-NEXT:    add r0, sp, #8
82; V8MBASE-NEXT:    ldrb r0, [r0]
83; V8MBASE-NEXT:    ldr r1, [sp, #20]
84; V8MBASE-NEXT:    movw r2, :lower16:__stack_chk_guard
85; V8MBASE-NEXT:    movt r2, :upper16:__stack_chk_guard
86; V8MBASE-NEXT:    ldr r2, [r2]
87; V8MBASE-NEXT:    cmp r2, r1
88; V8MBASE-NEXT:    bne .LBB0_2
89; V8MBASE-NEXT:  @ %bb.1: @ %entry
90; V8MBASE-NEXT:    add sp, #24
91; V8MBASE-NEXT:    pop {r7, pc}
92; V8MBASE-NEXT:  .LBB0_2: @ %entry
93; V8MBASE-NEXT:    bl __stack_chk_fail
94entry:
95  %retval = alloca i32, align 4
96  %buffer = alloca [9 x i8], align 1
97  store i32 0, ptr %retval, align 4
98  %arrayidx = getelementptr inbounds [9 x i8], ptr %buffer, i32 0, i32 0
99  %0 = load i8, ptr %arrayidx, align 1
100  %conv = zext i8 %0 to i32
101  ret i32 %conv
102}
103
104@aa = hidden local_unnamed_addr global i32 0, align 4
105@bb = hidden local_unnamed_addr global i64 0, align 8
106
107define dso_local i64 @cc() local_unnamed_addr #1 {
108; CHECK-LABEL: cc:
109; CHECK:       @ %bb.0: @ %entry
110; CHECK-NEXT:    push {r4, r5, r7, lr}
111; CHECK-NEXT:    sub sp, #8
112; CHECK-NEXT:    movs r0, #1
113; CHECK-NEXT:    lsls r3, r0, #31
114; CHECK-NEXT:    ldr r0, .LCPI1_0
115; CHECK-NEXT:    ldr r2, [r0]
116; CHECK-NEXT:    asrs r4, r2, #31
117; CHECK-NEXT:    eors r3, r4
118; CHECK-NEXT:    ldr r0, .LCPI1_1
119; CHECK-NEXT:    ldm r0!, {r1, r5}
120; CHECK-NEXT:    subs r0, r2, r1
121; CHECK-NEXT:    sbcs r3, r5
122; CHECK-NEXT:    subs r0, r2, r1
123; CHECK-NEXT:    ldr r1, .LCPI1_2
124; CHECK-NEXT:    ldr r1, [r1]
125; CHECK-NEXT:    str r1, [sp, #4]
126; CHECK-NEXT:    mov r1, r4
127; CHECK-NEXT:    sbcs r1, r5
128; CHECK-NEXT:    ands r3, r4
129; CHECK-NEXT:    ands r2, r0
130; CHECK-NEXT:    mov r4, r2
131; CHECK-NEXT:    orrs r4, r3
132; CHECK-NEXT:    cmp r4, #0
133; CHECK-NEXT:    beq .LBB1_2
134; CHECK-NEXT:  @ %bb.1: @ %entry
135; CHECK-NEXT:    mov r1, r3
136; CHECK-NEXT:  .LBB1_2: @ %entry
137; CHECK-NEXT:    beq .LBB1_4
138; CHECK-NEXT:  @ %bb.3: @ %entry
139; CHECK-NEXT:    mov r0, r2
140; CHECK-NEXT:  .LBB1_4: @ %entry
141; CHECK-NEXT:    ldr r2, [sp, #4]
142; CHECK-NEXT:    ldr r3, .LCPI1_2
143; CHECK-NEXT:    ldr r3, [r3]
144; CHECK-NEXT:    cmp r3, r2
145; CHECK-NEXT:    bne .LBB1_6
146; CHECK-NEXT:  @ %bb.5: @ %entry
147; CHECK-NEXT:    add sp, #8
148; CHECK-NEXT:    pop {r4, r5, r7, pc}
149; CHECK-NEXT:  .LBB1_6: @ %entry
150; CHECK-NEXT:    bl __stack_chk_fail
151; CHECK-NEXT:    .p2align 2
152; CHECK-NEXT:  @ %bb.7:
153; CHECK-NEXT:  .LCPI1_0:
154; CHECK-NEXT:    .long aa
155; CHECK-NEXT:  .LCPI1_1:
156; CHECK-NEXT:    .long bb
157; CHECK-NEXT:  .LCPI1_2:
158; CHECK-NEXT:    .long __stack_chk_guard
159;
160; V6M-LABEL: cc:
161; V6M:       @ %bb.0: @ %entry
162; V6M-NEXT:    push {r4, r5, r7, lr}
163; V6M-NEXT:    sub sp, #8
164; V6M-NEXT:    movs r0, #1
165; V6M-NEXT:    lsls r3, r0, #31
166; V6M-NEXT:    movs r0, :upper8_15:aa
167; V6M-NEXT:    lsls r0, r0, #8
168; V6M-NEXT:    adds r0, :upper0_7:aa
169; V6M-NEXT:    lsls r0, r0, #8
170; V6M-NEXT:    adds r0, :lower8_15:aa
171; V6M-NEXT:    lsls r0, r0, #8
172; V6M-NEXT:    adds r0, :lower0_7:aa
173; V6M-NEXT:    ldr r2, [r0]
174; V6M-NEXT:    asrs r4, r2, #31
175; V6M-NEXT:    eors r3, r4
176; V6M-NEXT:    movs r0, :upper8_15:bb
177; V6M-NEXT:    lsls r0, r0, #8
178; V6M-NEXT:    adds r0, :upper0_7:bb
179; V6M-NEXT:    lsls r0, r0, #8
180; V6M-NEXT:    adds r0, :lower8_15:bb
181; V6M-NEXT:    lsls r0, r0, #8
182; V6M-NEXT:    adds r0, :lower0_7:bb
183; V6M-NEXT:    ldm r0!, {r1, r5}
184; V6M-NEXT:    subs r0, r2, r1
185; V6M-NEXT:    sbcs r3, r5
186; V6M-NEXT:    subs r0, r2, r1
187; V6M-NEXT:    mrs r12, apsr
188; V6M-NEXT:    movs r1, :upper8_15:__stack_chk_guard
189; V6M-NEXT:    lsls r1, r1, #8
190; V6M-NEXT:    adds r1, :upper0_7:__stack_chk_guard
191; V6M-NEXT:    lsls r1, r1, #8
192; V6M-NEXT:    adds r1, :lower8_15:__stack_chk_guard
193; V6M-NEXT:    lsls r1, r1, #8
194; V6M-NEXT:    adds r1, :lower0_7:__stack_chk_guard
195; V6M-NEXT:    msr apsr, r12
196; V6M-NEXT:    ldr r1, [r1]
197; V6M-NEXT:    str r1, [sp, #4]
198; V6M-NEXT:    mov r1, r4
199; V6M-NEXT:    sbcs r1, r5
200; V6M-NEXT:    ands r3, r4
201; V6M-NEXT:    ands r2, r0
202; V6M-NEXT:    mov r4, r2
203; V6M-NEXT:    orrs r4, r3
204; V6M-NEXT:    cmp r4, #0
205; V6M-NEXT:    beq .LBB1_2
206; V6M-NEXT:  @ %bb.1: @ %entry
207; V6M-NEXT:    mov r1, r3
208; V6M-NEXT:  .LBB1_2: @ %entry
209; V6M-NEXT:    beq .LBB1_4
210; V6M-NEXT:  @ %bb.3: @ %entry
211; V6M-NEXT:    mov r0, r2
212; V6M-NEXT:  .LBB1_4: @ %entry
213; V6M-NEXT:    ldr r2, [sp, #4]
214; V6M-NEXT:    mrs r12, apsr
215; V6M-NEXT:    movs r3, :upper8_15:__stack_chk_guard
216; V6M-NEXT:    lsls r3, r3, #8
217; V6M-NEXT:    adds r3, :upper0_7:__stack_chk_guard
218; V6M-NEXT:    lsls r3, r3, #8
219; V6M-NEXT:    adds r3, :lower8_15:__stack_chk_guard
220; V6M-NEXT:    lsls r3, r3, #8
221; V6M-NEXT:    adds r3, :lower0_7:__stack_chk_guard
222; V6M-NEXT:    msr apsr, r12
223; V6M-NEXT:    ldr r3, [r3]
224; V6M-NEXT:    cmp r3, r2
225; V6M-NEXT:    bne .LBB1_6
226; V6M-NEXT:  @ %bb.5: @ %entry
227; V6M-NEXT:    add sp, #8
228; V6M-NEXT:    pop {r4, r5, r7, pc}
229; V6M-NEXT:  .LBB1_6: @ %entry
230; V6M-NEXT:    bl __stack_chk_fail
231;
232; V8MBASE-LABEL: cc:
233; V8MBASE:       @ %bb.0: @ %entry
234; V8MBASE-NEXT:    push {r4, r5, r7, lr}
235; V8MBASE-NEXT:    sub sp, #8
236; V8MBASE-NEXT:    movs r0, #1
237; V8MBASE-NEXT:    lsls r3, r0, #31
238; V8MBASE-NEXT:    movw r0, :lower16:aa
239; V8MBASE-NEXT:    movt r0, :upper16:aa
240; V8MBASE-NEXT:    ldr r2, [r0]
241; V8MBASE-NEXT:    asrs r4, r2, #31
242; V8MBASE-NEXT:    eors r3, r4
243; V8MBASE-NEXT:    movw r0, :lower16:bb
244; V8MBASE-NEXT:    movt r0, :upper16:bb
245; V8MBASE-NEXT:    ldm r0!, {r1, r5}
246; V8MBASE-NEXT:    subs r0, r2, r1
247; V8MBASE-NEXT:    sbcs r3, r5
248; V8MBASE-NEXT:    subs r0, r2, r1
249; V8MBASE-NEXT:    movw r1, :lower16:__stack_chk_guard
250; V8MBASE-NEXT:    movt r1, :upper16:__stack_chk_guard
251; V8MBASE-NEXT:    ldr r1, [r1]
252; V8MBASE-NEXT:    str r1, [sp, #4]
253; V8MBASE-NEXT:    mov r1, r4
254; V8MBASE-NEXT:    sbcs r1, r5
255; V8MBASE-NEXT:    ands r3, r4
256; V8MBASE-NEXT:    ands r2, r0
257; V8MBASE-NEXT:    mov r4, r2
258; V8MBASE-NEXT:    orrs r4, r3
259; V8MBASE-NEXT:    cmp r4, #0
260; V8MBASE-NEXT:    beq .LBB1_2
261; V8MBASE-NEXT:  @ %bb.1: @ %entry
262; V8MBASE-NEXT:    mov r1, r3
263; V8MBASE-NEXT:  .LBB1_2: @ %entry
264; V8MBASE-NEXT:    beq .LBB1_4
265; V8MBASE-NEXT:  @ %bb.3: @ %entry
266; V8MBASE-NEXT:    mov r0, r2
267; V8MBASE-NEXT:  .LBB1_4: @ %entry
268; V8MBASE-NEXT:    ldr r2, [sp, #4]
269; V8MBASE-NEXT:    movw r3, :lower16:__stack_chk_guard
270; V8MBASE-NEXT:    movt r3, :upper16:__stack_chk_guard
271; V8MBASE-NEXT:    ldr r3, [r3]
272; V8MBASE-NEXT:    cmp r3, r2
273; V8MBASE-NEXT:    bne .LBB1_6
274; V8MBASE-NEXT:  @ %bb.5: @ %entry
275; V8MBASE-NEXT:    add sp, #8
276; V8MBASE-NEXT:    pop {r4, r5, r7, pc}
277; V8MBASE-NEXT:  .LBB1_6: @ %entry
278; V8MBASE-NEXT:    bl __stack_chk_fail
279
280entry:
281  %0 = load i32, ptr @aa, align 4
282  %conv = sext i32 %0 to i64
283  %xor = xor i64 %conv, -9223372036854775808
284  %1 = load i64, ptr @bb, align 8
285  %sub = sub nsw i64 %xor, %1
286  %and = and i64 %sub, %conv
287  %tobool.not = icmp eq i64 %and, 0
288  %sub3 = sub nsw i64 %conv, %1
289  %spec.select = select i1 %tobool.not, i64 %sub3, i64 %and
290  ret i64 %spec.select
291}
292
293attributes #0 = { ssp "stack-protector-buffer-size"="8" }
294attributes #1 = {  sspreq }
295